Prototype Deep Learning Networks on FPGA

Estimate performance of series networks. Profile and retrieve inference results from target devices using MATLAB®

Deep Learning HDL Toolbox™ provides classes to create objects to deploy series deep learning networks to target FPGA and SoC boards. Before deploying deep learning networks onto target FPGA and SoC boards, leverage the methods to estimate the performance and resource utilization of the custom deep learning network. After you deploy the deep learning network, use MATLAB to retrieve the network prediction results from the target FPGA board.

Classes

dlhdl.WorkflowConfigure deployment workflow for deep learning neural network
dlhdl.TargetConfigure interface to target board for workflow deployment

Functions

activations Retrieve intermediate layer results for deployed deep learning network
validateConnectionValidate SSH connection and deployed bitstream
releaseRelease the connection to the target device
predictRun inference on deployed network and profile speed of neural network deployed on specified target device
estimateEstimate performance of specified deep learning network and bitstream for target device board
deploy Deploy the specified neural network to the target FPGA board
compile Compile workflow object

Topics

Prototype Deep Learning Networks on FPGA and SoCs Workflow

Accelerate the prototyping, deployment, design verification, and iteration of your custom deep learning network running on a fixed bitstream by using the dlhdl.Workflow object .

LIBIIO/Ethernet Connection Based Deployment

Rapidly deploy deep learning networks to FPGA boards using MATLAB.

Estimate Performance of Deep Learning Network Running with Bitstream

Estimate the throughput and initial latency for a given trained deep learning network running on a fixed bitstream.

Profile Inference Run

Obtain performance parameters of an inference run performed for a pretrained series network and a specified target FPGA board.

Multiple Frame Support

Improve the performance of your deployed deep learning network by using the multiple frame support feature.

Featured Examples

Logo Recognition Network

Logo Recognition Network

Create, compile, and deploy a dlhdl.Workflow object that has Logo Recognition Network as the network object using the Deep Learning HDL Toolbox™ Support Package for Xilinx FPGA and SoC. Use MATLAB® to retrieve the prediction results from the target device.

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Deploy Transfer Learning Network for Lane Detection

Deploy Transfer Learning Network for Lane Detection

Create, compile, and deploy a dlhdl.Workflow object that has a convolutional neural network. The network can detect and output lane marker boundaries as the network object using the Deep Learning HDL Toolbox™ Support Package for Xilinx FPGA and SoC. Use MATLAB® to retrieve the prediction results from the target device.

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Image Category Classification by Using Deep Learning

Image Category Classification by Using Deep Learning

Create, compile, and deploy a dlhdl.Workflow object with alexnet as the network object by using the Deep Learning HDL Toolbox™ Support Package for Intel FPGA and SoC. Use MATLAB® to retrieve the prediction results from the target device. Alexnet is a pretrained convolutional neural network that has been trained on over a million images and can classify images into 1000 object categories (such as keyboard, coffee, mug, pencil,and many animals). You can also use VGG-19 and Darknet-19 as the network objects.

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Defect Detection

Defect Detection

Deploy a custom trained series network to detect defects in objects such as hexagon nuts. The custom networks were trained by using transfer learning. Transfer learning is commonly used in deep learning applications. You can take a pretrained network and use it as a starting point to learn a new task. Fine-tuning a network with transfer learning is usually much faster and easier than training a network with randomly initialized weights from scratch. You can quickly transfer learned features to a new task using a smaller number of training signals. This example uses two trained series networks trainedDefNet.mat and trainedBlemDetNet.mat.

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Bicyclist and Pedestrian Classification by Using FPGA

Bicyclist and Pedestrian Classification by Using FPGA

Deploy a custom trained series network to detect pedestrians and bicyclists based on their micro-Doppler signatures. This network is taken from the Pedestrian and Bicyclist Classification Using Deep Learning example from the Phased Array Toolbox. For more details on network training and input data, see Pedestrian and Bicyclist Classification Using Deep Learning.

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Visualize Activations of a Deep Learning Network by Using LogoNet

Visualize Activations of a Deep Learning Network by Using LogoNet

Feed an image to a convolutional neural network and display the activations of the different layers of the network. Examine the activations and discover which features the network learns by comparing areas of activation to the original image. Channels in earlier layers learn simple features like color and edges, while channels in the deeper layers learn complex features. Identifying features in this way can help you understand what the network has learned.

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Running Convolution-Only Networks by using FPGA Deployment

Running Convolution-Only Networks by using FPGA Deployment

To understand and debug convolutional networks, running and visualizing data is a useful tool.This example shows how to deploy, run, and debug a convolution-only network by using FPGA deployment.

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Vehicle Detection Using YOLO v2 Deployed to FPGA

Vehicle Detection Using YOLO v2 Deployed to FPGA

Train and deploy a you look only once (YOLO) v2 object detector.

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