HDL-Optimized System Design

Choose algorithms for wireless communications hardware system design

These blocks implement hardware-friendly architectures and support HDL code generation when used with HDL Coder™. The blocks use a streaming sample interface with a bus for related control signals.

Blocks

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LTE Convolutional EncoderEncode binary samples using tail-biting convolutional algorithm
LTE Convolutional DecoderDecode convolutional-encoded samples using Viterbi algorithm
LTE CRC EncoderGenerate checksum and append to input sample stream
LTE CRC Decoder Detect errors in input samples using checksum
LTE Turbo EncoderEncode binary samples using turbo algorithm
LTE Turbo DecoderDecode turbo-encoded samples
NR LDPC EncoderPerform low-density parity-check (LDPC) encoding according to 5G NR standard
NR LDPC DecoderDecode input data using layered belief propagation with min-sum approximation algorithm
NR Polar EncoderPerform polar encoding according to 5G NR standard
NR Polar DecoderPerform polar decoding according to the 5G NR standard
Viterbi DecoderDecode convolutionally encoded data using Viterbi algorithm
DepuncturerReverse puncturing scheme to prepare for decoding
Convolutional EncoderEncode data bits using convolution coding — optimized for HDL code generation
PuncturerPunctures data according to puncture vector
RS DecoderDecode and recover message from Reed-Solomon (RS) codeword
LTE OFDM DemodulatorDemodulate time-domain OFDM samples and return LTE resource grid
LTE OFDM ModulatorModulate LTE resource grid and return time-domain OFDM samples
LTE Symbol DemodulatorDemodulate complex LTE data symbols to data bits or LLR values
LTE Symbol ModulatorModulate data bits to complex LTE data symbols
NR Symbol DemodulatorDemodulate complex NR data symbols to data bits or LLR values
NR Symbol ModulatorModulate data bits to complex NR data symbols
OFDM DemodulatorDemodulate time-domain OFDM samples and return subcarriers for custom communication protocols
OFDM ModulatorModulate frequency-domain OFDM subcarriers to time-domain samples for custom communication protocols
FFT 1536Computes fast-fourier-transform (FFT) for LTE standard transmission bandwidth of 15 MHz
OFDM Channel Estimator Estimate channel using input data and reference subcarriers
LTE Gold Sequence GeneratorGenerate Gold sequence

Featured Examples

Sample Rate Conversion for an LTE Receiver

Sample Rate Conversion for an LTE Receiver

Design and implement sample rate conversion for an LTE receiver front end. The model is compatible with the Wireless HDL Toolbox™ receiver reference applications, and supports HDL code generation with HDL Coder™.

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HDL Code Generation for Filtered OFDM (F-OFDM) Transmitter

HDL Code Generation for Filtered OFDM (F-OFDM) Transmitter

Filtered OFDM (F-OFDM) applies a filter to the symbols after the IFFT in the transmitter to improve bandwidth while maintaining the orthogonality of the complex symbols. This example implements a transmitter F-OFDM for HDL code generation. The example shows how to go from a MATLAB® reference model to an HDL-optimized Simulink® model. It includes converting from double to fixed-point types, and minimizing the resource use of the design on an FPGA.

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HDL Implementation of a Variable-Size FFT

HDL Implementation of a Variable-Size FFT

Implement a variable-size FFT using a single FFT core.

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Accelerate BER Measurement for Wireless HDL LTE Turbo Decoder

Accelerate BER Measurement for Wireless HDL LTE Turbo Decoder

The workflow to measure the BER of the Wireless HDL Toolbox™ Turbo Decoder using parsim to parallelize the simulations across EbNo points. This approach can be used to accelerate other Monte Carlo simulations.

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Wireless HDL Toolbox Documentation
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