Specify whether test bench forces clock enable input signals
'on' (default)
Selected (default)
Specify that the test bench forces the clock enable input signals to active high (1) or active low (0), depending on the setting of the clock enable input value.
'off'
Cleared
Specify that a user-defined external source forces the clock enable input signals.
To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.