HDL Coder™ generates portable, synthesizable VHDL® and Verilog® code from MATLAB® functions, Simulink® models, and Stateflow® charts. The generated HDL code can be used for FPGA programming or ASIC prototyping and design.
HDL Coder provides a workflow advisor that automates the programming of Xilinx®, Microsemi®, and Intel® FPGAs. You can control HDL architecture and implementation, highlight critical paths, and generate hardware resource utilization estimates. HDL Coder provides traceability between your Simulink model and the generated Verilog and VHDL code, enabling code verification for high-integrity applications adhering to DO-254 and other standards.
Support for industry standards is available through IEC Certification Kit (for ISO 26262 and IEC 61508).
Create Simulink Model for HDL Code Generation
Hands-on introduction to creating a model and checking compatibility for HDL code generation.
Check HDL Compatibility of Model Using HDL Code Advisor
Overview of the HDL Code Advisor, how to run various checks, and fix warnings associated with the checks.
Generate HDL Code from Simulink Model
Learn about the counter model and how to generate VHDL or Verilog code from models.
Verify Generated Code from Simulink Model Using HDL Test Bench
Learn how to generate a HDL test bench to verify the VHDL or Verilog Code.
HDL Code Generation and FPGA Synthesis Using Simulink HDL Workflow Advisor
Learn how to generate code and synthesize your design on the target hardware.
Getting Started with MATLAB to HDL Workflow
This example shows how to create a HDL Coder™ project and generate code from your MATLAB® design.
Basic HDL Code Generation and FPGA Synthesis from MATLAB by Using the Workflow Advisor
This example shows how to create a HDL Coder™ project, generate code for your MATLAB design, and synthesize the HDL code.
Show Blocks Supported for HDL Code Generation
Find HDL code generation supported blocks
Functions Supported for HDL Code Generation — Alphabetical List
Alphabetical list of built-in MATLAB and toolbox functions supported for HDL code generation.
Functions Supported for HDL Code Generation — Categorical List
Categorical list of built-in MATLAB and toolbox functions supported for HDL code generation.
Supported MATLAB Data Types, Operators, and Control Flow Statements
Supported data types, operators, and control flow statements for HDL code generation.
HDL Coder Overview
Generate VHDL and Verilog code for FPGA and ASIC designs using HDL Coder
Using Simulink to Deploy a MATLAB Algorithm on an FPGA or ASIC
Learn how to take a MATLAB DSP algorithm through Simulink, Fixed-Point
Designer, and HDL Coder, and target an FPGA or ASIC