Take advantage of executing code on a multicore processor by graphical partitioning. This example requires Simulink Coder™ to generate multithreaded code.

Take advantage of a multicore processor target with FPGA acceleration by graphically partitioning a model. This example requires Simulink Coder™ to generate multi-threaded code and HDL Coder™ to generate HDL code. You cannot generate HDL code on Macintosh systems.

Demonstrates how to implement a control algorithm containing multiple rates on Zynq. To take advantage of both the cores and the FPGA hardware, the example uses graphical partitioning approach such that code from different partitions are distributed across the cores and the hardware.

Illustrates how to take advantage of executing multithreaded code on a multicore processor using graphical partitioning. This example requires Simulink® Coder™ to generate multithreaded code.

Model multiple objects with identical dynamics using the For Each Subsystem. The number of objects is parameterized by the length of the input signal.

Use the For Each Subsystem. In this example the operations are performed on a vector for simplicity.

Use the For Each Subsystem. In this example the operations are performed on matrices.

Use the For Each Subsystem block to process submatrices data when neighboring submatrices overlap each other. To demonstrate this data processing approach, the example implements the image edge detection with linear filters using the For Each Subsystem block. Each For Each Subsystem block has a For Each block that needs to be configured for partitioning and concatenation.