This page describes configuration parameters that reside in the HDL Code Generation > Optimization > Resource sharing tab of the Configuration Parameters dialog box. Enable these parameters to save resources on the target device by specifying whether to share adders and multipliers in your design, and the minimum sharing bitwidth.
Enable this parameter to share adders with the resource sharing optimization. Resource sharing identifies Add or Sum blocks in your design that have two inputs and replaces them with a single Add or Sum block. This optimization saves area on the target FPGA device.
Default: Off
When resource sharing is enabled, this optimization shares adders with a bit width greater than or equal to the Adder sharing minimum bitwidth.
Do not share adders.
To share adders in your design, in the HDL Block Properties for the DUT Subsystem, specify the SharingFactor.
When you specify the Adder sharing minimum bitwidth, the code generator shares adders that have a bit width greater than or equal to the minimum bit width. The default minimum bit width for sharing adders is zero.
Property:
ShareAdders |
Type: character vector |
Value:
'on' | 'off' |
Default:
'off' |
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.
For example, you can use the ShareAdders
setting when you
generate HDL code for the symmetric_fir
subsystem inside the
sfir_fixed
model using either of these methods.
Pass the property as an argument to the makehdl
function.
makehdl('sfir_fixed/symmetric_fir', ... 'ShareAdders','on')
When you use hdlset_param
, you can set the parameter on the
model and then generate HDL code using
makehdl
.
hdlset_param('sfir_fixed','ShareAdders','on') makehdl('sfir_fixed/symmetric_fir')
Use this parameter to specify the minimum bit width that is required to share adders with the resource sharing optimization.
Default: 0
No minimum bit width for shared adders.
When resource sharing and adder sharing are enabled, share adders with a bit width greater than or equal to N.
To share adders in your design:
In the Resource Sharing tab, enable the Adders setting.
In the HDL Block Properties for the DUT Subsystem, specify the SharingFactor.
Property:
AdderSharingMinimumBitwidth |
Type: integer |
Value: integer greater than or equal to 0 |
Default: 0 |
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.
For example, you can use the AdderSharingMinimumBitwidth
setting
when you generate HDL code for the symmetric_fir
subsystem inside the
sfir_fixed
model using either of these methods.
Pass the property as an argument to the makehdl
function.
makehdl('sfir_fixed/symmetric_fir', ... 'AdderSharingMinimumBitwidth',16)
When you use hdlset_param
, you can set the parameter on the
model and then generate HDL code using
makehdl
.
hdlset_param('sfir_fixed','AdderSharingMinimumBitwidth',16) makehdl('sfir_fixed/symmetric_fir')
Enable this parameter to share multipliers with the resource sharing optimization. Resource sharing identifies Product or Gain blocks in your design that have two inputs and replaces them with a single Product or Gain block. This optimization saves area on the target FPGA device.Share multipliers with the resource sharing optimization.
Default: On
When resource sharing is enabled, share multipliers with a bit width greater than or equal to the Multiplier sharing minimum bitwidth. For successfully sharing multipliers, the input fixed-point data types must have the same wordlength. The fraction lengths and signs of the fixed-point data types can be different.
Do not share multipliers.
To share multipliers in your design, in the HDL Block Properties for the DUT Subsystem, specify the SharingFactor.
When you specify the Multiplier sharing minimum bitwidth, the code generator shares multipliers that have a bit width greater than or equal to the minimum bit width. The default minimum bit width for sharing multipliers is zero.
Property:
ShareMultipliers |
Type: character vector |
Value:
'on' | 'off' |
Default:
'on' |
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.
For example, you can use the ShareMultipliers
setting when you
generate HDL code for the symmetric_fir
subsystem inside the
sfir_fixed
model using either of these methods.
Pass the property as an argument to the makehdl
function.
makehdl('sfir_fixed/symmetric_fir', ... 'ShareMultipliers','on')
When you use hdlset_param
, you can set the parameter on the
model and then generate HDL code using
makehdl
.
hdlset_param('sfir_fixed','ShareMultipliers','on') makehdl('sfir_fixed/symmetric_fir')
Use this parameter to specify the minimum bit width that is required to share multipliers with the resource sharing optimization.
Default: 0
No minimum bit width for shared multipliers.
When resource sharing and multiplier sharing are enabled, share multipliers with a bit width greater than or equal to N.
To share multipliers in your design:
In the Resource Sharing tab, make sure that the Multipliers check box is selected.
In the HDL Block Properties for the DUT Subsystem, specify the SharingFactor.
Property:
MultiplierSharingMinimumBitwidth |
Type: integer |
Value: integer greater than or equal to 0 |
Default: 0 |
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.
For example, you can use the MultiplierSharingMinimumBitwidth
setting when you generate HDL code for the symmetric_fir
subsystem
inside the sfir_fixed
model using either of these methods.
Pass the property as an argument to the makehdl
function.
makehdl('sfir_fixed/symmetric_fir', ... 'MultiplierSharingMinimumBitwidth',16)
When you use hdlset_param
, you can set the parameter on the
model and then generate HDL code using
makehdl
.
hdlset_param('sfir_fixed','MultiplierSharingMinimumBitwidth',16) makehdl('sfir_fixed/symmetric_fir')
To share smaller multipliers with other larger multipliers by using the resource sharing optimization, specify the multiplier promotion threshold. This threshold specifies the maximum word-length by which HDL Coder™ promotes a multiplier for sharing with other multipliers.
Default: 0
No difference in word-length between the multipliers. In other words, HDL Coder shares multipliers that have the same word-lengths.
Maximum word-length by which HDL Coder promotes a multiplier for sharing with other multipliers. HDL Coder promotes and shares multipliers with different word-lengths, if the difference in word-lengths is less than or equal to N.
To share multipliers in your design:
In the Resource Sharing tab, make sure that the Multipliers check box is selected.
In the HDL Block Properties for the DUT Subsystem, specify the SharingFactor.
Property:
MultiplierPromotionThreshold |
Type: integer |
Value: integer greater than or equal to 0 |
Default: 0 |
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.
For example, you can use the MultiplierPromotionThreshold
setting
when you generate HDL code for the symmetric_fir
subsystem inside the
sfir_fixed
model using either of these methods.
Pass the property as an argument to the makehdl
function.
makehdl('sfir_fixed/symmetric_fir', ... 'MultiplierPromotionThreshold',8)
When you use hdlset_param
, you can set the parameter on the
model and then generate HDL code using
makehdl
.
hdlset_param('sfir_fixed','MultiplierPromotionThreshold',8) makehdl('sfir_fixed/symmetric_fir')
Share Multiply-Add blocks with the resource sharing optimization.
Default: On
When resource sharing is enabled, share Multiply-Add blocks with a bit width greater than or equal to Multiply-Add block sharing minimum bitwidth.
Do not share Multiply-Add blocks.
To share Multiply-Add blocks in your design, in the HDL Block Properties for the DUT Subsystem, specify the SharingFactor.
When you specify the Multiply-Add block sharing minimum bitwidth, the code generator shares Multiply-Add blocks that have a bit width greater than or equal to the minimum bit width. The default minimum bit width for sharing Multiply-Add blocks is zero.
Property:
ShareMultiplyAdds |
Type: character vector |
Value:
'on' | 'off' |
Default:
'on' |
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.
For example, you can use the ShareMultiplyAdds
setting when you
generate HDL code for the symmetric_fir
subsystem inside the
sfir_fixed
model using either of these methods.
Pass the property as an argument to the makehdl
function.
makehdl('sfir_fixed/symmetric_fir', ... 'ShareMultiplyAdds','on')
When you use hdlset_param
, you can set the parameter on the
model and then generate HDL code using
makehdl
.
hdlset_param('sfir_fixed','ShareMultiplyAdds','on') makehdl('sfir_fixed/symmetric_fir')
Use this parameter to specify the minimum bit width that is required to share Multiply-Add with the resource sharing optimization.
Default: 0
No minimum bit width for shared Multiply-Add blocks.
When resource sharing and Multiply-Add block sharing are enabled, share Multiply-Add blocks with a bit width greater than or equal to N.
To share Multiply-Add blocks in your design:
In the Resource Sharing tab, make sure that the Multiply-Add blocks check box is selected.
In the HDL Block Properties for the DUT Subsystem, specify the SharingFactor.
Property:
MultiplierAddSharingMinimumBitwidth |
Type: integer |
Value: integer greater than or equal to 0 |
Default: 0 |
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.
For example, you can use the MultiplierAddSharingMinimumBitwidth
setting when you generate HDL code for the symmetric_fir
subsystem
inside the sfir_fixed
model using either of these methods.
Pass the property as an argument to the makehdl
function.
makehdl('sfir_fixed/symmetric_fir', ... 'MultiplierAddSharingMinimumBitwidth',16)
When you use hdlset_param
, you can set the parameter on the
model and then generate HDL code using
makehdl
.
hdlset_param('sfir_fixed',MultiplierAddSharingMinimumBitwidth',16) makehdl('sfir_fixed/symmetric_fir')