RAM and ROM Blocks

Mimic RAMs and ROMs on hardware using blocks in HDL RAMs library

The HDL Coder block library contains many blocks that you can add to your develop your Simulink® modeling environment and develop your HDL algorithm. You can use blocks from the HDL Coder library to mimic RAM and ROM blocks on the target device.

To filter the Simulink Library Browser to show only HDL-supported blocks, enter hdllib.

Functions

hdllibDisplay blocks that are compatible with HDL code generation

Model Checks

Simulink Configuration Parameters

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RTL Customization Parameters for RAMs

Blocks

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Dual Port RAMDual port RAM with two output ports
Dual Port RAM SystemDual Port RAM block based on the hdl.RAM system object with ability to provide initial value
Dual Rate Dual Port RAMDual Port RAM that supports two rates
HDL FIFOStores sequence of input samples in first in, first out (FIFO) register
Simple Dual Port RAMDual port RAM with single output port
Simple Dual Port RAM SystemSimple Dual Port RAM block based on the hdl.RAM system object with ability to provide initial value
Single Port RAMSingle port RAM
Single Port RAM SystemSingle Port RAM block based on hdl.RAM system object with ability to provide initial value

Topics

Build a ROM Block with Simulink Blocks

HDL Coder™ does not provide a ROM block, but you can easily build one using basic Simulink blocks.

Use Simulink Templates for HDL Code Generation

Use Simulink templates for HDL code generation to create efficient hardware designs.

Featured Examples

Getting Started with RAM and ROM in Simulink®

Getting Started with RAM and ROM in Simulink®

Utilize RAM resources in your FPGA design using HDL Coder™.

Open Script

HDL Coder Documentation

Support