Finite impulse response (FIR) decimation filter—optimized for HDL code generation
The dsp.HDLFIRDecimation
System object™ implements a polyphase FIR decimation filter that is optimized for HDL code
generation. It provides a hardware-friendly interface with input and output control signals.
To provide a cycle-accurate simulation of the generated HDL code, the object models
architectural latency including pipeline registers and resource sharing.
The object accepts scalar or vector input. When you use vector input, the decimation factor must be an integer multiple of the vector size. The object uses a single-rate implementation. The output is scalar and a valid signal indicates which samples are valid after decimation. The waveform shows an input vector of four samples and a decimation factor of eight. The output sample is valid every second cycle.
The object provides two filter structures. The direct form systolic architecture provides a fully parallel implementation that makes efficient use of Intel® and Xilinx® DSP blocks. The direct form transposed architecture is a fully parallel implementation that is suitable for FPGA and ASIC applications. For a filter implementation that matches multipliers, pipeline registers, and pre-adders to the DSP configuration of your FPGA vendor, specify your target device when you generate HDL code.
The object implements one filter for each sample in the input vector. The object then shares this filter between the polyphase subfilters by interleaving the subfilter coefficients in time.
To filter and decimate input data with an HDL-optimized algorithm:
Create the dsp.HDLFIRDecimation
object and set its properties.
Call the object with arguments, as if it were a function.
To learn more about how System objects work, see What Are System Objects?.
creates a
default HDL-optimized FIR decimation filter System object.firDecim
= dsp.HDLFIRDecimation
firDecim = dsp.HDLFIRDecimation(dec,num)
sets the DecimationFactor
property to dec
and the Numerator
property to
num
.
sets properties using one or more name-value pairs in addition to any input argument
combination from previous syntaxes. Enclose each property name in quotes. For example,
firDecim
= dsp.HDLFIRDecimator(___,Name,Value
)'FilterStructure','Direct form transposed'
specifies the filter
architecture as a fully parallel implementation that is suitable for FPGA and ASIC
applications.
To use an object function, specify the
System object as the first input argument. For
example, to release system resources of a System object named obj
, use
this syntax:
release(obj)
Reset Behavior
By default, the dsp.HDLFIRFilter
object connects the generated
HDL global reset to only the control path registers. The two reset properties,
ResetInputPort and HDLGlobalReset, connect a reset signal to the data path registers.
Because of the additional routing and loading on the reset signal, resetting data
path registers can reduce synthesis performance .
The ResetInputPort
property enables the
reset
argument of the object. The reset signal implements a
local synchronous reset of the data path registers. For optimal use of FPGA
resources, this option does not connect the reset signal to registers targeted to
the DSP blocks of the FPGA.
The HDLGlobalReset
property connects the generated HDL global
reset signal to the data path registers. This property does not change the arguments
of the object or modify simulation behavior in MATLAB. The generated HDL global reset can be synchronous or asynchronous
depending on your HDL code generation settings. Depending on your device, using the
global reset might move registers out of the DSP blocks and increase resource
use.
When you set both the ResetInputPort
and
HDLGlobalReset
properties to true
, the
global and local reset signals clear the control and data path registers.
This System object implements the algorithms described on the FIR Decimation HDL Optimized block reference page.
Note
The output of the dsp.HDLFIRDecimation object does not match the output from the
dsp.FIRDecimation
object sample-for-sample. This difference is mainly
because of the phase that the samples are applied across the subfilters. To match the
dsp.FIRDecimation
object, apply DecimationFactor
– 1
zeroes to the dsp.HDLFIRDecimation object at the start of the data stream.
The dsp.HDLFIRDecimation object also uses slightly different data types for full-precision calculations. The different data types can also introduce differences in output values if the values overflow the internal datatypes.