Model and Architecture Design
Supported blocks, best practices, design patterns, compatibility checks, clocks and
reset
- Model Compatibility Checks
Description of the HDL Code Advisor, and how to use it to check and update your model
for compatibility with HDL code generation
- Model Design
Create supported block library and design HDL-compatible models by using blocks from
these libraries
- Block Configuration
Block implementation specification, model configuration
- Clocking and Multirate Design
Clock generation, HDL code generation guidelines for multirate models
- External Component Interfaces
HDL code instantiation, black box interfaces, Xilinx® System Generator, Altera® DSP Builder, HDL cosimulation
- HDL Import
Import HDL code into the Simulink® modeling environment using the importhdl function
- Model Protection
Create a protected model for simulation and code generation to share with a
third-party
- Native Floating Point
What is HDL Coder native floating-point, the various features supported, how to model
your design, generate HDL code, and verify the generated code
- Simscape Hardware-in-the-Loop Workflow
Simscape support for HDL code generation and workflow to generate HDL code from the
models and deploy to target hardware