| Test Condition | Constrain signal values in test cases |
sldv.condition | Test condition function for Stateflow charts and MATLAB Function blocks |
sldvextract | Extract subsystem or subchart contents into new model for analysis |
sldvtimer | Identify, change, and display timer optimizations |
sldvoptions | Create design verification options object |
sldvrun | Analyze model |
sldvgencov | Analyze models to obtain missing model coverage |
sldvlogsignals | Log simulation input port values |
sldvruntest | Simulate model by using input data |
sldvruntestopts | Generate simulation or execution options for sldvruntest or sldvruncgvtest |
sldvharnessopts | Default options for sldvmakeharness |
sldvmakeharness | Generate harness model |
sldvmergeharness | Merge test cases and initializations into one harness model |
sldvreport | Generate Simulink Design Verifier report |
Model Coverage Objectives for Test Generation
Decision coverage in Simulink® Design Verifier™ examines blocks and Stateflow® states that represent decision points in a model.
Modified Condition and Decision Coverage in Simulink Design Verifier
Describes the difference between MCDC coverage in Simulink Design Verifier and in Simulink Coverage™.
Enhanced MCDC Coverage in Simulink Design Verifier
Describes the Enhanced MCDC coverage concept and workflows.
Enhance Model Coverage of Older Release Models
Explains how to use cross release workflow for model upgrade by using Simulink Design Verifier.
Use Test Generation Advisor to Identify Analyzable Components
Use the Test Generation Advisor to guide model and component analysis.
Missing Coverage in Subsystems and Model Blocks
Explains how to convert subsystems to Model blocks before attempting to achieve missing coverage.
Debug Enhanced Modified Condition and Decision Coverage (MCDC) using Model Slicer
This example shows how to find the Simulink Design Verifier (SLDV) generated objectives related to a specific model object using Model Slicer.
Generate Test Cases for Model Decision Coverage
An example that walks you through the process of generating test cases for a model.
Export Test Cases to Simulink Test
Describes how to generate test cases in Simulink Test™ using Simulink Design Verifier analysis results, which can be generated by property proving, design error detection, and test case generation.
Test Generation on Model with C Caller Block
C Caller
Test Generation for Custom Code in a Stateflow Chart
Stateflow Chart
Design Verifier Pane: Test Generation
Specify options that control how Simulink Design Verifier generates tests for the models it analyzes.