Class: dlhdl.ProcessorConfig
Package: dlhdl
Use the setModuleProperty
method to set properties of modules
within the dlhdl.ProcessorConfig
object
setModuleProperty(ModuleName,Name,Value)
The
setModuleProperty(
method
sets the properties of the module mentioned in ModuleName
,Name,Value
)ModuleName
by using the
values specified as Name,Value
pairs.
ConvThreadNumber
for conv
Module Within the dlhdl.ProcessorConfig
ObjectCreate an example object by using the dlhdl.ProcessorConfig
class, and then use the setModuleProperty
method to set the value for
convThreadNumber
.
hPC = dlhdl.ProcessorConfig; hPC.setModuleProperty('conv','ConvThreadNumber',25) hPC
Once the code is executed, the result is:
hPC = Processing Module "conv" ConvThreadNumber: 25 InputMemorySize: [227 227 3] OutputMemorySize: [227 227 3] FeatureSizeLimit: 512 Processing Module "fc" FCThreadNumber: 4 InputMemorySize: 25088 OutputMemorySize: 4096 System Level Properties TargetPlatform: 'Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit' TargetFrequency: 200 SynthesisTool: 'Xilinx Vivado' ReferenceDesign: 'AXI-Stream DDR Memory Access : 5-AXIM' SynthesisToolChipFamily: 'Zynq UltraScale+' SynthesisToolDeviceName: 'xczu9eg-ffvb1156-2-e' SynthesisToolPackageName: '' SynthesisToolSpeedValue: ''
InputMemorySize
for fc
Module Within the dlhdl.ProcessorConfig
ObjectCreate an example object by using the dlhdl.ProcessorConfig
class, and then use the setModuleProperty
method to set the value for
InputMemorySize
.
hPC = dlhdl.ProcessorConfig; hPC.setModuleProperty('fc','InputMemorySize',25060) hPC
Once the code is executed, the result is:
hPC = Processing Module "conv" ConvThreadNumber: 25 InputMemorySize: [227 227 3] OutputMemorySize: [227 227 3] FeatureSizeLimit: 512 Processing Module "fc" FCThreadNumber: 4 InputMemorySize: 25060 OutputMemorySize: 4096 System Level Properties TargetPlatform: 'Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit' TargetFrequency: 200 SynthesisTool: 'Xilinx Vivado' ReferenceDesign: 'AXI-Stream DDR Memory Access : 5-AXIM' SynthesisToolChipFamily: 'Zynq UltraScale+' SynthesisToolDeviceName: 'xczu9eg-ffvb1156-2-e' SynthesisToolPackageName: '' SynthesisToolSpeedValue: ''
ModuleName
— Name of the module whose parameters are to be setThe dlhdl.ProcessorConfig
object module name, specified as a
character vector.
conv
Module PropertiesConvThreadNumber
— Number of parallel convolution processor kernel threadsThis parameter is the number of parallel 3-by-3 convolution kernel threads that
are a part of the conv
module within the
dlhdl.ProcessorConfig
object.
'ConvThreadNumber', 25
InputMemorySize
— Cache block RAM (BRAM) sizesThis parameter is a 3D matrix representing input image size limited by the
conv
module BRAM size within the
dlhdl.ProcessorConfig
object.
'InputMemorySize', [227 227 3]
OutputMemorySize
— Cache block RAM (BRAM) sizesThis parameter is a 3D matrix representing output image size limited by the
conv
module BRAM size within the
dlhdl.ProcessorConfig
object.
'OutputMemorySize', [227 227 3]
FeatureSizeLimit
— Maximum input and output feature sizeThis parameter is a positive integer representing the maximum input and output
feature size as a part of the conv
module within the
dlhdl.ProcessorConfig
object.
'FeatureSizeLimit', 512
Example: 'KernelDataType','single'
fc
Module PropertiesFCThreadNumber
— Number of parallel fully connected (fc) MAC threadsThis parameter is the number of parallel fc MAC threads that are a part of the
fc
module within the dlhdl.ProcessorConfig
object.
'FCThreadNumber', 8
InputMemorySize
— Cache block RAM (BRAM) sizesThis parameter is an unsigned integer representing cache BRAM size limited by the
fc
module BRAM size within the
dlhdl.ProcessorConfig
object.
'InputMemorySize', 25088
OutputMemorySize
— Cache block RAM (BRAM) sizesThis parameter is an unsigned integer representing cache BRAM size limited by the
fc
module BRAM size within the
dlhdl.ProcessorConfig
object.
'OutputMemorySize', 4096
Example: 'KernelDataType','single'