comm.HDLCRCGenerator
Generate CRC code bits and append to input data
Description
This HDL-optimized cyclic redundancy code (CRC) generator System object™ generates cyclic redundancy code (CRC) bits. Instead of frame processing, the
HDLCRCGenerator
System object processes streaming data. The object has frame synchronization control signals
for both input and output data streams.
To generate cyclic redundancy code bits:
Create the
comm.HDLCRCGeneratorobject and set its properties.Call the object with arguments, as if it were a function.
To learn more about how System objects work, see What Are System Objects?.
Creation
Syntax
Description
CRCGen = comm.HDLCRCGeneratorCRCGen. This object generates CRC bits according to a
specified generator polynomial and appends them to the input data.
CRCGen = comm.HDLCRCGenerator(Name,Value)
CRCGen = comm.HDLCRCGenerator('Polynomial',[1 0 0 0 1 0 0 0 0], ...
'FinalXORValue',[1 1 0 0 0 0 0 0]);CRCGen = comm.HDLCRCGenerator(poly,Name,Value)Polynomial property to
poly, and the other specified property names to the specified
values.
Properties
Usage
Description
Input Arguments
Output Arguments
Object Functions
To use an object function, specify the
System object as the first input argument. For
example, to release system resources of a System object named obj, use
this syntax:
release(obj)
Examples
CRC Encode and Decode for HDL
Encode and decode a signal using the HDL-optimized CRC generator and detector System objects. This example shows how to include each object in a function for HDL code generation.
Create a 32-bit message to be encoded, in two 16-bit columns.
msg = randi([0 1],16,2);
Run for 12 steps to accommodate the latency of both objects. Assign control signals for all steps. The first two samples are the valid data, and the remainder are processing latency.
numSteps = 12; startIn = logical([1 0 0 0 0 0 0 0 0 0 0 0]); endIn = logical([0 1 0 0 0 0 0 0 0 0 0 0]); validIn = logical([1 1 0 0 0 0 0 0 0 0 0 0]);
Pass random input to the HDLCRCGenerator System object™ while it is processing the input message. The random data is not encoded because the input valid signal is 0 for steps 3 to 10.
randIn = randi([0, 1],16,numSteps-2); dataIn = [msg randIn];
Write a function that creates and calls each System object™. You can generate HDL from these functions. The generator and detector objects both have a CRC length of 16 and use the default polynomial.
Note: This object syntax runs only in R2016b or later. If you are using an earlier release, replace each call of an object with the equivalent step syntax. For example, replace myObject(x) with step(myObject,x).
function [dataOut,startOut,endOut,validOut] = HDLCRC16Gen(dataIn,startIn,endIn,validIn) %HDLCRC16Gen % Generates CRC checksum using the comm.HDLCRCGenerator System object(TM) % dataIn is a binary column vector. % startIn, endIn, and validIn are logical scalar values. % You can generate HDL code from this function. persistent crcg16; if isempty(crcg16) crcg16 = comm.HDLCRCGenerator() end [dataOut,startOut,endOut,validOut] = crcg16(dataIn,startIn,endIn,validIn); end
function [dataOut,startOut,endOut,validOut,err] = HDLCRC16Det(dataIn,startIn,endIn,validIn) %HDLCRC16Det % Checks CRC checksum using the comm.HDLCRCDetector System object(TM) % dataIn is a binary column vector. % startIn, endIn, and validIn are logical scalar values. % You can generate HDL code from this function. persistent crcd16; if isempty(crcd16) crcd16 = comm.HDLCRCDetector() end [dataOut,startOut,endOut,validOut,err] = crcd16(dataIn,startIn,endIn,validIn); end
Call the CRC generator function. The encoded message is the original message plus a 16 bit checksum.
for i = 1:numSteps [dataOutGen(:,i),startOutGen(i),endOutGen(i),validOutGen(i)] = ... HDLCRC16Gen(logical(dataIn(:,i)),startIn(i),endIn(i),validIn(i)); end
crcg16 =
comm.HDLCRCGenerator with properties:
Polynomial: [1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 1]
InitialState: 0
DirectMethod: false
ReflectInput: false
ReflectCRCChecksum: false
FinalXORValue: 0
Add noise by flipping a bit in the message.
dataOutNoise = dataOutGen; dataOutNoise(2,4) = ~dataOutNoise(2,4);
Call the CRC detector function. The output of the detector is the input message with the checksum removed. If the input checksum was not correct, the err flag is set with the last word of the output.
for i = 1:numSteps [dataOut(:,i),startOut(i),endOut(i),validOut(i),err(i)] = ... HDLCRC16Det(logical(dataOutNoise(:,i)),startOutGen(i),endOutGen(i),validOutGen(i)); end
crcd16 =
comm.HDLCRCDetector with properties:
Polynomial: [1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 1]
InitialState: 0
DirectMethod: false
ReflectInput: false
ReflectCRCChecksum: false
FinalXORValue: 0
Use the Logic Analyzer to view the input and output signals.
channels = {'validIn','startIn','endIn',...
{'dataIn','Radix','Hexadecimal'},...
'validOutGen','startOutGen','endOutGen',...
{'dataOutGen','Radix','Hexadecimal'},...
{'dataOutNoise','Radix','Hexadecimal'},...
'validOut','startOut','endOut','err',...
{'dataOut','Radix','Hexadecimal'}};
la = dsp.LogicAnalyzer('Name','CRC Encode and Decode','NumInputPorts',length(channels),...
'BackgroundColor','Black','DisplayChannelHeight',8);
for ii = 1:length(channels)
if iscell(channels{ii})
% Display data signals as hexadecimal integers
c = channels{ii};
modifyDisplayChannel(la,ii,'Name',c{1},c{2},c{3})
% Convert binary column vector to integer
dat2 = uint16(bi2de(eval(c{1})'));
chanData{ii} = squeeze(dat2);
else
modifyDisplayChannel(la,ii,'Name',channels{ii})
chanData{ii} = squeeze(eval(channels{ii})');
end
end
la(chanData{:})
Algorithms
Timing Diagram
This waveform shows streaming data and the accompanying control signals for a CRC16 with an 8-bit binary vector input. To insert the checksum word, input frames must have enough space between the.
This waveform diagram shows continuous input data. The block also supports noncontinuous data. The output valid signal matches the input valid pattern.
