After you install MATLAB® and the support packages, to connect the host computer to one of the supported FPGA boards:
Connect the host computer to the FPGA board by using a USB JTAG cable.
To learn how to set up the JTAG connection, see JTAG Connection.
To learn how to set up each board, see Configure Board-Specific Setup Information.
Note
To download the weights faster, use USB 3.0 for the USB JTAG cable. Weight downloading can become slower if you use USB 2.0 for the cable.
Check whether the JTAG driver is installed on the host computer. Install the driver if it is not already installed.
Connect the host computer to the FPGA board by using an Ethernet cable. For more information, see Guided SD Card Setup (Deep Learning HDL Toolbox Support Package for Intel FPGA and SoC Devices) or Guided SD Card Setup (Deep Learning HDL Toolbox Support Package for Xilinx FPGA and SoC Devices).
To troubleshoot Ethernet connection issues for Intel boards, see Command Line Session with Intel SoC Device (Deep Learning HDL Toolbox Support Package for Intel FPGA and SoC Devices). To troubleshoot Ethernet connection issues for Xilinx boards, see Troubleshoot Xilinx Zynq Platform and Development Computer Connection (Deep Learning HDL Toolbox Support Package for Xilinx FPGA and SoC Devices).
Install and set up the path to the relevant third-party synthesis tool. To learn more, see the "Install Synthesis Tools and Set up Tool Path" section below.
Before you can deploy your neural network to one of the supported FPGA boards, you must install the required third-party synthesis tools. The workflow supports these synthesis tools:
Intel® Quartus® Prime Standard Edition 18.1 and later.
Xilinx® Vivado® Design Suite 2019.1 and later.
To run the workflow and deploy the network to the FPGA board, set up the tool path to
your installed Xilinx
Vivado or Intel
Quartus Prime standard edition executable file by running the
hdlsetuptoolpath function.
If your synthesis tool is Intel Quartus Prime, enter this command:
hdlsetuptoolpath('ToolName','Altera Quartus II','ToolPath',... 'C:\intel\18.1\quartus\bin\quartus.exe');
If your synthesis tool is Xilinx Vivado, enter this command:
hdlsetuptoolpath('ToolName','Xilinx Vivado','ToolPath',... 'C:\Xilinx\Vivado\2019.1\bin\vivado.bat');
See also hdlsetuptoolpath (HDL Coder).
To verify that the connection to the JTAG connection to the FPGA board has been setup and is ready, run the Get Started with Deep Learning FPGA Deployment on Intel Arria 10 SoC example. This example runs the entire workflow and displays the prediction results.
To verify that the Ethernet connection to the FPGA board has been setup and is ready to run, run the Get Started with Deep Learning FPGA Deployment on Xilinx ZCU102 SoC example. This example runs the entire workflow and displays the prediction results.