Enable or disable generation of an HTML optimization report. The report contains information about the results of distributed pipelining, streaming, sharing, delay balancing, and adaptive pipelining optimizations that are implemented in the generated code. The report includes hyperlinks back to referenced blocks, subsystems, or validation models. If you have floating-point data types in your model, you can generate HDL code with native floating point support or map your design to Intel® or Xilinx® FPGA floating-point libraries. When you map to FPGA floating-point libraries, the optimization report displays a target code generation section that displays the target device summary and a link to the generated model.
Default: Off
Create and display an HTML optimization report. To generate the report, after you enable this setting, click the Generate button. The code generation report contains a summary section and a code interface report along with the optimization report.
Do not create an HTML optimization report.
Property:
OptimizationReport |
Type: character vector |
Value:
'on' | 'off' |
Default:
'off' |
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.
For example, you can generate an optimization report when generating HDL code for
the symmetric_fir
subsystem inside the
sfir_fixed
model using either of these methods.
Pass in the OptimizationReport
property as an
argument to
makehdl
.
makehdl('sfir_fixed/symmetric_fir','OptimizationReport','on')
Enable the OptimizationReport
property using
hdlset_param
and then use
makehdl
.
hdlset_param('sfir_fixed','OptimizationReport','on') makehdl('sfir_fixed/symmetric_fir')