You can specify whether or not to generate HDL code by using the Generate HDL code parameter. In the Configuration Parameters dialog box, select HDL Code Generation > Global Settings > Advanced > Code generation output.
Enable or disable HDL code generation for the model or Subsystem. To specify the
Subsystem that you want to generate HDL code for, use the
Generate HDL for parameter. Then, click the
Generate button in the HDL Code
Generation pane. By default, the HDL code is generated in
VHDL
language and put into the
hdlsrc
folder.
Default: On
Select this setting to generate HDL code.
When you clear this setting, you cannot generate HDL code for the model.
Property:
GenerateHDLCode |
Type: character vector |
Value:
'on' | 'off' |
Default:
'on' |
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.
By default, the GenerateHDLCode
property is selected. To
generate code, use the makehdl
function. For example, this
command generates HDL code for the symmetric_fir
subsystem
inside the sfir_fixed
model.
makehdl('sfir_fixed/symmetric_fir')
Property:
CodeGenerationOutput |
Type: character vector |
Value:
'GenerateHDLCode' |
'GenerateHDLCodeAndDisplayGeneratedModel' 'DisplayGeneratedModelOnly' |
Default:
'GenerateHDLCode' |
By default, HDL Coder™ creates a model called the generated model when you generate HDL
code. The generated model uses HDL-specific block implementations, and it
implements the area and speed optimizations that you specify in your Simulink® model. The code generator creates the generated model but does not
display the model by default. To control display of the generated model, use the
CodeGenerationOutput
property.
This example shows how to generate HDL code, and then display the generated
model by using makehdl
.
makehdl('sfir_fixed/symmetric_fir', ... 'CodeGenerationOutput','GenerateHDLCodeAndDisplayGeneratedModel')
If you specify DisplayGeneratedModelOnly
, the code
generator displays the generated model but does not proceed to code
generation.