In the Configuration Parameter dialog box, you can select the types of the model that you want to generate. Select HDL Code Generation > Global Settings > Model Generation.
You can customize the name and layout of the generated model and the validation model by using Naming and Layout Options for Model Generation.
Enable or disable generation of the generated model that shows latency and numeric differences between your Simulink® DUT and the generated HDL code. Delays that the coder inserts are highlighted in the generated model.
Note
When you select Generated model, the Naming options and Layout options become available.
Default: On
Select this setting to generate the generated model. By default, HDL Coder™ generates code and the generated model. To generate only the generated model, clear the Generate HDL code check box.
Clear this setting when you do not want to generate the generated model. When you click the Generate button, HDL Coder generates code for the model.
Property:
GenerateModel |
Type: character vector |
Value:
'on' | 'off' |
Default:
'off' |
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.
By default, the GenerateHDLCode
property is enabled. You
can use this property in conjunction with the GenerateModel
property to specify whether to generate the generated model and the HDL code. To
generate the code and the generated model, run
makehdl
.
makehdl('sfir_fixed/symmetric_fir')
If you want to generate only the generated model, disable the
GenerateHDLCode
property and run
makehdl
.
hdlset_param('sfir_fixed', 'GenerateModel','on'); hdlset_param('sfir_fixed', 'GenerateHDLCode',off'); makehdl('sfir_fixed/symmetric_fir'
Enable or disable generation of a validation model that verifies the functional equivalence of the original model with the generated model. The validation model contains the original and the generated DUT models. You can use the generated DUT model to observe the effect of block settings and optimizations such as resource sharing, streaming, and delay balancing.
If you enable generation of a validation model, make sure that delay balancing is enabled on the model. In the HDL Code Generation > Optimization > General tab, select the Balance delays check box. Delay balancing keeps the generated DUT model synchronized with the original DUT model. Validation fails when there is a mismatch between delays in the original DUT model and delays in the generated DUT model.
Default: Off
Select this setting to generate the validation model. By default, HDL Coder generates code and the validation model. To generate only the validation model, clear the Generate HDL code check box.
Clear this setting when you do not want to generate the validation model. When you click the Generate button, HDL Coder generates code for the model.
Property:
GenerateValidationModel |
Type: character vector |
Value:
'on' | 'off' |
Default:
'off' |
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.
By default, the GenerateHDLCode
property is enabled. You
can use this property in conjunction with the
GenerateValidationModel
property to specify whether to
generate the validation model and the HDL code. To generate the code and the
validation model, enable the GenerateValidationModel
property with
makehdl
.
hdlset_param('sfir_fixed', 'GenerateValidationModel','on'); makehdl('sfir_fixed/symmetric_fir')
If you want to generate only the validation model, disable the
GenerateHDLCode
property and enable the
GenerateValidationModel
property with
makehdl
.
hdlset_param('sfir_fixed', 'GenerateValidationModel','on'); hdlset_param('sfir_fixed', 'GenerateHDLCode',off'); makehdl('sfir_fixed/symmetric_fir'