HDL Applications for Signal Processing Algorithms

Create and run HDL applications using DSP System Toolbox™ blocks

This section contains algorithms and HDL applications that you can develop by using blocks from DSP System Toolbox that are supported for HDL code generation. DSP System Toolbox provides algorithms, apps, and scopes for designing, simulating, and analyzing signal processing systems.

To filter the Simulink Library Browser to show only HDL-supported blocks in the DSP System Toolbox library, enter hdllib. For a filtered list of DSP System Toolbox blocks supported for HDL code generation, see DSP System Toolbox Block List (HDL Code Generation) (DSP System Toolbox).

Functions

hdllibDisplay blocks that are compatible with HDL code generation

Featured Examples

Programmable FIR Filter for FPGA

Programmable FIR Filter for FPGA

Implement a programmable FIR filter for hardware. You can program the filter to a desired response by loading the coefficients into internal registers using the host interface.

Open Script
Multichannel FIR Filter for FPGA

Multichannel FIR Filter for FPGA

Implement a discrete FIR filter with multiple input data streams for hardware.

Open Script
Implement FFT for FPGA Using FFT HDL Optimized Block

Implement FFT for FPGA Using FFT HDL Optimized Block

Use the FFT HDL Optimized block to implement a FFT for hardware.

Open Script
High Throughput Channelizer for FPGA

High Throughput Channelizer for FPGA

Implement a high throughput (Gigasamples per second, GSPS) channelizer for hardware by using a polyphase filter bank.

Open Script
HDL Implementation of a Digital Down-Converter for LTE

HDL Implementation of a Digital Down-Converter for LTE

Design a digital down-converter (DDC) for radio communication applications.

Open Script

HDL Coder Documentation

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