Getting Started with HDL Coder Native Floating-Point Support

Native floating-point support in HDL Coder™ enables you to generate code from your floating-point design. If your design has complex math and trigonometric operations or has data with a large dynamic range, use native floating-point.

In your Simulink^® model:

You can have single-precision and double-precision floating-point data types and operations.
You can have a combination of integer, fixed-point, and floating-point operations. By using Data Type Conversion blocks, you can perform conversions between single-precision and fixed-point data types.

The generated code:

Complies with the IEEE-754 standard of floating-point arithmetic.
Is target-independent. You can deploy the code on any generic FPGA or an ASIC.
Does not require floating-point processing units or hard floating-point DSP blocks on the target ASIC or FPGA.

HDL Coder supports:

Math and trigonometric functions
Large subset of Simulink blocks
Denormal numbers
Customizing the latency of the floating-point operator

Numeric Considerations and IEEE-754 Standard Compliance

HDL Coder generates code in compliance with the IEEE 754–2008 standard of floating-point arithmetic.

In the IEEE 754–2008 standard, the single-precision floating-point number is 32-bits. The 32-bit number encodes a 1-bit sign, an 8-bit exponent, and a 23-bit mantissa.

This graph is the normalized representation for floating-point numbers. You can compute the actual value of a normal number as:

$v a l u e = {(- 1)}^{s i g n} * (1 + \underset{i = 1}{\overset{23}{Σ}} b_{23 - i} 2^{- i}) * 2^{(e - 127)}$

The exponent field represents the exponent plus a bias of 127. The size of the mantissa is 24 bits. The leading bit is a 1, so the representation encodes the lower 23 bits.

To generate code that complies with the IEEE-754 standard, HDL Coder supports:

Round to nearest rounding mode
Denormal numbers
Exceptions such as NaN (Not a Number), Inf, and Zero
Customization of ULP (Units in the Last Place) and relative accuracy

For more information, see Numeric Considerations with Native Floating-Point.

Data Type Considerations

With native floating-point support, HDL Coder supports code generation from Simulink models that contain floating-point signals and fixed-point signals. You might want to model your design with floating-point types to:

Implement algorithms that have a large or unknown dynamic range that can fall outside the range of representable fixed-point types.
Implement complex math and trigonometric operations that are difficult to design in fixed point.
Obtain a higher precision and better accuracy.

Floating-point designs can potentially occupy more area on the target hardware. In your Simulink model, it is recommended to use floating-point data types in the algorithm data path and fixed-point data types in the algorithm control logic. This figure shows a section of a Simulink model that uses Single and fixed-point types. By using Data Type Conversion blocks, you can perform conversions between the single and fixed-point types.

Documentation