# MODELS

MODELNAME: mQAMAGC
PATH: examples/fixedpoint/main/mQAMAGC.slx
BLOCKTYPE_FREQUENCY: 1;5;14;30;1;3;1;1;8;1;2;11;4;2;1;17;4;1;1;1;1;8;1;1;1
CHECKSUM: AD9A20D4B755BB886D7E2C719FD4D0B8
PRODUCT: DSP System Toolbox;Fixed-Point Designer;MATLAB;Signal Processing Toolbox;Simulink
PRODUCT_BASECODE: PO
ANNOTATION:
 DSPStyle = off HDL optimized scrambler, implementing the scrambler polynomial [1 1 1 0 1], with initial states [0 0 0 0] Copyright 2020 The MathWorks, Inc. Automatic Gain Control Sample

BLOCK:
 Demux ; Ground ; SFunction ; Terminator ; Zero;Add;Automatic Gain Control;BIT_XOR;Bits In;Channel;ChannelGain;Complex to Real-Imag;Constant;Controller FSM;Controller FSM_DTC_Out;Data Address Counter;Data Generation & Packetization;Data Out;Data Source;Data Type Conversion;Data_In;Delay;Downsample;Enable;Gain;Group Bits;HDL Data Scrambler;In;Input Mux;Integer InI;Integer InQ;Integer Out I;Integer Out Q;Logical Operator;LoopGain;LoopGainDriver;LoopGainOutput;Out;Pipeline;Preamble Address Counter;Preamble Data Mux;Product;ProductDriverA;ProductDriverB;ProductOutput;Pulse Shaping;QAM Tx;RRC Interpolation Filter;Raw Data I;Raw Data Q;Real-Imag to Complex;Reference;Scrambled_Out;Step;SubSystem;Subtract;Sum;Symbol Mapping;Symbol Out;Time Scope;Unit Delay;Valid;Valid In;Valid Out;Valid out;data lookup;data lookup_DTC_In;data lookup_DTC_Out;dataIn;dataOut;gain;load data;load preamble;load_data;load_preamble;p;packet_bits;preamble lookup;preamble lookup_DTC_In;preamble lookup_DTC_Out;reset preamble;reset_preamble;x;y

BLOCKTYPE:
ComplexToRealImag;Constant;DataTypeConversion;Delay;Demux;DownSample;EnablePort;FIR Interpolation;Gain;Ground;HDL Counter;Inport;Logic;LookupNDDirect;MultiPortSwitch;Outport;Product;RealImagToComplex;S-Function;Scope;Step;Sum;Switch;Terminator;UnitDelay


MODELNAME: mSimpleFIR
PATH: examples/fixedpoint/main/mSimpleFIR.slx
BLOCKTYPE: Constant;DataTypeConversion;Inport;Outport;Product;Scope;Sin;Sum;Tapped Delay Line
BLOCKTYPE_FREQUENCY: 1;3;1;1;1;1;1;1;1
CHECKSUM: FD58939CFF5CB637121DC4AF32DF5DD8
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: PO
ANNOTATION:
Absolute Tolerance: 1e-2 Copyright 2021 The MathWorks, Inc. Behavioral constraints: Relative Tolerance: 1e-2

BLOCK:
Constant;Data Type Conversion;Embedded Efficient Filter;In;Out;Product;Reference;Scope;Sine Wave;SubSystem;Sum of Elements;Tapped Delay;input_signal;output_signal


MODELNAME: mSimpleFIR_fxp
PATH: examples/fixedpoint/main/mSimpleFIR_fxp.slx
BLOCKTYPE: Constant;DataTypeConversion;Inport;Outport;Product;Scope;Sin;Sum;Tapped Delay Line
BLOCKTYPE_FREQUENCY: 1;3;1;1;1;1;1;1;1
CHECKSUM: 2F0887DC55032DFB827A8FCB4EC5DB32
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: PO
ANNOTATION:
Absolute Tolerance: 1e-2 Copyright 2021 The MathWorks, Inc. Behavioral constraints: Relative Tolerance: 1e-2

BLOCK:
Constant;Data Type Conversion;Embedded Efficient Filter;In;Out;Product;Reference;Scope;Sine Wave;SubSystem;Sum of Elements;Tapped Delay;input_signal;outut_signal


MODELNAME: mSimpleFIR_fxp_ovf
PATH: examples/fixedpoint/main/mSimpleFIR_fxp_ovf.slx
BLOCKTYPE: Constant;DataTypeConversion;Inport;Outport;Product;Scope;Sin;Sum;Tapped Delay Line
BLOCKTYPE_FREQUENCY: 1;3;1;1;1;1;1;1;1
CHECKSUM: D70CA06E87902FA30B565A7840B84ED8
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: PO
ANNOTATION:
 Product block has an overflow Absolute Tolerance: 1e-2 Copyright 2021 The MathWorks, Inc. Behavioral constraints: Relative Tolerance: 1e-2

BLOCK:
Constant;Data Type Conversion;Embedded Efficient Filter;In;Out;Product;Reference;Scope;Sine Wave;SubSystem;Sum of Elements;Tapped Delay;input_signal;outut_signal


MODELNAME: modulo_by_constant_block_example
PATH: examples/fixedpoint/main/modulo_by_constant_block_example.slx
ANNOTATION: Copyright 2021-2024 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;2;1;2;6;1;3;1;1;1
CHECKSUM: 3349228507E49C746677342663DCB5D1
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: PO
BLOCK:
Cast To Single;Compare and Plot;Constant;DUT_FLT;DUT_FXP;Data Type Conversion;Delay;From Workspace;In;Minus;Mod;Modulo by Constant HDL Optimized;Reference;Scope;SubSystem;X;Y;built in;validIn;validOut

BLOCKTYPE:
Constant;DataTypeConversion;Delay;FromWorkspace;Inport;Math;Outport;Scope;Sum;fixed.system.internal.modbyconstant_hdl


MODELNAME: rotationAboutAxisModel
PATH: examples/fixedpoint/main/rotationAboutAxisModel.slx
ANNOTATION: AMBA AXI handshaking Copyright 2023 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;20;1;2;2;6;2;1;1;31;2;8;3;29;2;2;3;1;1;1;4;8;10;1;2;21;1
CHECKSUM: 8B9D3ED8392770B3E1AE75E23487A560
PRODUCT: Fixed-Point Designer;MATLAB;Simulink
PRODUCT_BASECODE: PO
BLOCK:
 Demux ; SFunction ; Terminator ;-u0(2)__z-;AND;Add;Add_wrap;Angle Compensation;Angle Compensation Function;Angle Compensation Recover;Angle Compensation Recover Function;CORDIC Rotate by Angle;CORDIC Rotate to Zero;CORDIC controller;Callback Button;Check if Simulation is Complete;Compare;Constant;Count_reg;DT_convert;Data Handler AMBA AXI Interface;Delay;Demux;Dir_logic;Display;Enable;Equal;Free_running;From_value;HDL Counter;Init_value;Inverse Scale Factor;Kernel;Logical Operator;MATLAB Function;Max_value;Mod_value;Mux;Number of Samples;Pos_step;R;RecordData;Reference;Reshape;Signal Specification;State Control;Step_value;Stop Simulation;SubSystem;Sub_wrap;Switch_dir;Switch_enb;Switch_load;Switch_max;Switch_reset;Switch_type;Switch_wrap;Terminator;Unary Minus;Unit Delay Enabled Synchronous;V_z-;Wrap;add;ang;angle;angleIn;angleOut;angle_z-;ax;compensatedAngle;const_dir;const_load;const_load_val;const_rst;count;dir_port;dn;enb;fb;isNeg;n;n(1)Out;n(2)_z-;n(3)_z-;n0(1)_z-;nOut;nSim;n_to_workspace;numSamples;quadrant;ready;readyIn;restart;simulationDone;step;sub;u;u0(1)_z-;u0(2)_z-;u0(3)_z-;uIn;uOut;validIn;validOut;validOut count;xIn;xOut;xy memory;y;yIn;yOut;z memory;zIn

BLOCKTYPE:
Compare To Constant;Constant;CustomCallbackButton;DataTypeConversion;Delay;Demux;Display;EnablePort;HDL Counter;Inport;Inverse CORDIC Gain;Logic;Mux;Outport;RelationalOperator;Reshape;S-Function;SignalSpecification;StateControl;Stop;Sum;Switch;Terminator;ToWorkspace;UnaryMinus;Unit Delay Enabled Synchronous;UnitDelay


MODELNAME: AirTrafficControlInSimulink
PATH: examples/fusion/main/AirTrafficControlInSimulink.slx
BLOCKTYPE_FREQUENCY: 1;2;3;3;8;1;6;2;3;1;1;1
CHECKSUM: 5D786B5E561889985A67D66D81548487
PRODUCT: MATLAB;Sensor Fusion and Tracking Toolbox;Simulink
PRODUCT_BASECODE: TF
ANNOTATION:
Scenario Visualization Scenario and Sensor Simulation Tracker IsScanDone  Air Traffic Control in Simulink

BLOCK:
 Demux ; SFunction ; Terminator ;Bus Selector;Detections;DetsIn;DetsOut;From;GNN Tracker;Global Nearest Neighbor Multi Object Tracker;Goto;IsScanDone;MATLAB Function;Reference;Scenario Visualization;Scenario and Sensor Simulation;SubSystem;Terminator;Tracker;Tracking Scenario Reader;Tracks;Tracks 

BLOCKTYPE:
BusSelector;Demux;From;Goto;Inport;MATLABSystem;Outport;S-Function;Terminator;TriggerPort;fusion.simulink.trackerGNN;fusion.simulink.trackingScenarioReader


MODELNAME: MarineSurveillanceInSimulink
PATH: examples/fusion/main/MarineSurveillanceInSimulink.slx
ANNOTATION: Extended Object Tracking With Radar For Marine Surveillance in Simulink
BLOCKTYPE_FREQUENCY: 1;1;1;1;1;3;1;1;1;1
CHECKSUM: 09C9505729B5FF92F4F1D4A3A0EDF248
PRODUCT: MATLAB;Sensor Fusion and Tracking Toolbox;Simulink
PRODUCT_BASECODE: TF
BLOCK:
 Demux ; SFunction ; Terminator ;Fusion Radar Sensor;InpDetection;Probability Hypothesis Density Tracker;Reference;Scenario To Platform;SubSystem;Terminator;Tracking Scenario Reader;Visualization;helperUpdateMeasurementNoise;outDetection

BLOCKTYPE:
Demux;Inport;MATLABSystem;Outport;S-Function;Terminator;fusion.simulink.fusionRadarSensor;fusion.simulink.referenceFrameTransform;fusion.simulink.trackerPHD;fusion.simulink.trackingScenarioReader


MODELNAME: TestTrackingArchitecturesInSimulink
PATH: examples/fusion/main/TestTrackingArchitecturesInSimulink.slx
ANNOTATION: Test Tracking Architectures in Simulink
BLOCKTYPE_FREQUENCY: 7;7;62;8;2;27;7;10;7;4;7;1;4
CHECKSUM: 0B89775A4D186E59E9D10D38E54C47E8
PRODUCT: MATLAB;Sensor Fusion and Tracking Toolbox;Simulink
PRODUCT_BASECODE: TF
BLOCK:
 Demux ; SFunction ; Terminator ;Detections;F3:Fuser;F3:Track Concatenation;F5:Fuser;F5:Region;F5:Track Concatenation;F6:Region;F6:Track Concatenation;GNNTracker;MATLAB System;Prediction Time;Reference;Scheduled GNN Tracker;SubSystem;T2:Detection Concatenation;T2:Radar;T2:Tracker;T3:Radar;T4:Radar;Terminator;Time;Tracking Architectures;Tracks;Tracks In;Tracks Out;TracksIn;TracksOut;Trigger;centralizedArchitecture;decentralizedArchitecture;getTracks;helperGetTracks;regionalArchitecture

BLOCKTYPE:
Demux;DiscretePulseGenerator;Inport;InportShadow;MATLABSystem;Outport;S-Function;Terminator;TriggerPort;fusion.simulink.trackFuser;fusion.simulink.trackerGNN;matlabshared.tracking.internal.DetectionConcatenation;matlabshared.tracking.internal.TrackConcatenation


MODELNAME: TrackCloselySpacedTargetSimulinkExample
PATH: examples/fusion/main/TrackCloselySpacedTargetSimulinkExample.slx
ANNOTATION: Track Closely Spaced Targets Under Ambiguity
BLOCKTYPE_FREQUENCY: 14;3;7;2;2;2
CHECKSUM: 2FF338CB76C8802876070457C3916294
PRODUCT: MATLAB;Sensor Fusion and Tracking Toolbox;Simulink
PRODUCT_BASECODE: TF
BLOCK:
ConfirmedTracks;DataLogReader;Detections;Global Nearest Neighbor Multi Object Tracker;Joint Probabilistic Data Association Multi Object Tracker;Reference;SubSystem;Time;Track-Oriented Multi-Hypothesis Tracker;TrackAssignmentMetrics;TrackerGNN_CV;TrackerGNN_IMM;TrackerJPDA_CV;TrackerJPDA_IMM;TrackerTOMHT_CV;TrackerTOMHT_IMM;Trackers;Visualization

BLOCKTYPE:
Inport;MATLABSystem;Outport;fusion.simulink.trackerGNN;fusion.simulink.trackerJPDA;fusion.simulink.trackerTOMHT


MODELNAME: TrackPointTargetsInDenseClutterSimulinkExample
PATH: examples/fusion/main/TrackPointTargetsInDenseClutterSimulinkExample.slx
BLOCKTYPE_FREQUENCY: 1;3;3;2;1;4;1;1;1;1;1;1
CHECKSUM: 5BF54712D12A311CD1327C35E2ADA6B4
PRODUCT: MATLAB;Sensor Fusion and Tracking Toolbox;Simulink
PRODUCT_BASECODE: TF
ANNOTATION:
Performance Analysis Scenario and Sensor Simulation Visualization Performance Analysis Tracking Algorithm  Track Point Target in Dense Clutter Using GM-PHD Tracker

BLOCK:
 Demux ; SFunction ; Terminator ;False Track Error;From;GOSPA Metric;GOSPA Visualization;Generalized Optimal Subpattern Assignment Metric;Goto;MATLAB Function;Missed Traget Error;Platforms;Probability Hypothesis Density Tracker;Reference;Scenario Visualization;SubSystem;Subsystem;Tracking Scenario Reader;Tracks;Truths

BLOCKTYPE:
Demux;From;Goto;Inport;MATLABSystem;Outport;S-Function;Scope;Terminator;fusion.simulink.trackGOSPAMetric;fusion.simulink.trackerPHD;fusion.simulink.trackingScenarioReader


MODELNAME: artificialPancreasWithFISTreeControl
PATH: examples/fuzzy/main/artificialPancreasWithFISTreeControl.slx
BLOCKTYPE_FREQUENCY: 4;1;1;13;1;1;2;2;21;1;2;32;9;1;2;2;2;30;10;1;3;1;18;1;1;1;1
CHECKSUM: 2A0C7C0093DD853CD0E2CD7A7C9A525A
PRODUCT: Embedded Coder;Fuzzy Logic Toolbox;Fuzzy Logic Toolbox Documentation;MATLAB;Simulink
PRODUCT_BASECODE: FL
ANNOTATION:
FISTREE Controller is enabled at every Ts sec. Discard first 3*Ts sec control outputs (which do not use valid BG rate and accel data) Fast channel Slow channel accessible glucose compartment subsystem non-accessible glucose compartment subsystem U_I Copyright 2021 The MathWorks, Inc.

BLOCK:
; Demux ; SFunction ; Terminator ;Action Port;Alternate Insulin Absorption Subsystem;BG_Accel;BG_Level;BG_Rate;Clock;Compare To Zero;Constant;Controller;Controller IO;Conversion Factor;Create BG Rates;Diabetic Patient;Divide;Enable;Endogenous Glucose Production extrapolated to zero insulin concentration;Exogenous Glucose;F01c;F01c Subsystem;FISTREE;FISTREE Controller;FLC;FR;FR Subsystem;From Workspace;Gain;Gin;Glucose;Glucose Monitoring System;Glucose Subsystem;Glucose Units Conversion;Gout;I;If;If Action Subsystem;Insulin;Insulin Action Subsystem;Insulin Pump;Insulin Subsystem;Insulin rate;Integrator I;Integrator Q;Integrator Q1a;Integrator Q1b;Integrator x;Math Function;Meal;Memory;Merge;Mux;Out;Pass Valid Output;Product;Q;Q1 subsystem;Q2 subsystem;Reference;Saturation;SubSystem;Subtract;Sum;Switch;Transfer Fcn;U_G;U_I;Zero-Order Hold;absorbedGlucose;blood glucose;carbohydrate;cho;clk;exogenous glucose;glucose;input;insulin;insulin infusion rate;insulin rate;k;ka;kb;observed glucose;observedGlucose;out;output;ts;u;u(t);x;y

BLOCKTYPE:
ActionPort;Clock;Compare To Zero;Constant;Demux;EnablePort;FromWorkspace;Fuzzy Inference System;Gain;Glucose Subsystem;If;Inport;Integrator;Math;Memory;Merge;Mux;Outport;Product;S-Function;Saturate;Scope;Sum;Switch;Terminator;TransferFcn;ZeroOrderHold


MODELNAME: comparepidcontrollers
PATH: examples/fuzzy/main/comparepidcontrollers.slx
ANNOTATION: Fuzzy PID Control with Type-2 FIS Copyright 2019 The MathWorks, Inc.
BLOCKTYPE: Abs;Derivative;Fuzzy Inference System;Gain;Inport;Integrator;LTI Block;Mux;Outport;Scope;Step;Sum
BLOCKTYPE_FREQUENCY: 3;3;2;11;6;6;3;3;12;1;1;6
CHECKSUM: A9A0E75510280CF73C13C971C40AC63E
PRODUCT: Control System Toolbox;Fuzzy Logic Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: FL
BLOCK:
Abs;Conventional PID;Derivative;Fuzzy Inference System;Gain;Integrator;LTI System;Mux;Out;Reference;Scope;SubSystem;Sum;Type-1 Fuzzy PID;Type-2 Fuzzy PID;iae;r;u;y


MODELNAME: fuzzyPID
PATH: examples/fuzzy/main/fuzzyPID.slx
ANNOTATION: PD Control PI Control Feed Forward Copyright 2017 The MathWorks Inc.
BLOCKTYPE_FREQUENCY: 1;1;1;7;2;1;1;1;1;1;2;2
CHECKSUM: 77388FF1DE7A1A9C74F35F62CD46F2B9
PRODUCT: Control System Toolbox;Fuzzy Logic Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: FL
BLOCK:
Discrete Derivative;Discrete-Time Integrator;Fuzzy Inference System;Fuzzy PID;GE;LTI System;Mux;Output;Reference;SubSystem;Sum;To Workspace;r;u;y

BLOCKTYPE:
Discrete Derivative;DiscreteIntegrator;Fuzzy Inference System;Gain;Inport;LTI Block;Mux;Outport;Scope;Step;Sum;ToWorkspace


MODELNAME: fuzzyPID_single
PATH: examples/fuzzy/main/fuzzyPID_single.slx
ANNOTATION: PD Control PI Control Feed Forward Copyright 2017 The MathWorks Inc.
BLOCKTYPE_FREQUENCY: 1;1;1;1;7;2;1;1;1;1;1;2;2
CHECKSUM: EBD9F12D8253953EAAC3F7E980976DE4
PRODUCT: Control System Toolbox;Fuzzy Logic Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: FL
BLOCK:
Data Type Conversion;Discrete Derivative;Discrete-Time Integrator;Fuzzy Inference System;Fuzzy PID;GE;LTI System;Mux;Output;Reference;SubSystem;Sum;To Workspace;r;u;y

BLOCKTYPE:
DataTypeConversion;Discrete Derivative;DiscreteIntegrator;Fuzzy Inference System;Gain;Inport;LTI Block;Mux;Outport;Scope;Step;Sum;ToWorkspace


MODELNAME: intermediateFISTree
PATH: examples/fuzzy/main/intermediateFISTree.slx
ANNOTATION: Copyright 2024 The MathWorks, Inc.
BLOCKTYPE: Constant;Demux;Display;Fuzzy Inference System (FIS) Tree;Mux;Saturate
BLOCKTYPE_FREQUENCY: 3;1;3;1;1;3
CHECKSUM: 0A5E1FDAF2037F7012C60CDC96FDA60A
PRODUCT: Fuzzy Logic Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: FL
BLOCK:
Demux;FIS Tree;Food Modified Rating;Food Rating;Mux;Reference;Saturation;Service Modified Rating;Service Rating;Tip Percentage;Weight


MODELNAME: mcb_pmsm_foc_fuzzy
PATH: examples/fuzzy/main/mcb_pmsm_foc_fuzzy.slx
BLOCKTYPE_FREQUENCY: 1;1;1;1;23;1;9;2;5;1;3;1;1;10;3;3;52;1;3;2;1;10;33;3;1;1;1;10;2;4;1;1;1;1;1;8;1;6;6
CHECKSUM: 904E972B349F6006C4877B20758657EE
PRODUCT: Embedded Coder;Fuzzy Logic Toolbox;MATLAB;Motor Control Blockset;Simulink
PRODUCT_BASECODE: FL
ANNOTATION:
Current Measurements Position & Speed Measurements QEP Scaling Delays PD Control  Copyright 2023 The MathWorks, Inc. Permanent Magnet Synchronous Motor - Fuzzy System Learning

BLOCK:
 Calculate Position and Speed;Add;Add Offset;Average-Value Inverter;Bus Selector;Calculate Phase Currents;Clarke Transform;Closed Loop Control;Constant;Control_System;Current Control;Current Sense Gain;Current_Controllers;DQ Limiter;Data Type Conversion;Data_Type;Data_Type_Fixed_Point;Data_Type_Float;Delay;Demux;Discrete Derivative;Discrete PI Controller with anti-windup & reset;Duty;Duty_abc;FPD;From;FromWs;Fuzzy Inference System;GE;Gain;Get ADC Count;Get Current Sense Voltage;Get_ADC_Volt;Get_PU;Get_PU ;Get_QEP_Counts;Goto;IIR Filter;I_fb;I_ref;Ia_ADC;Iab_meas_PU;Ib_ADC;Id;Id_ref;Ida_ref_PU;Idq;Idq_ref;Idq_ref_PU;In;IndexOffset;IndexOffset in PU;Info;Input Scaling;Inverse Park Transform;Inverter;Inverter and Motor;Iq;Iq_ref;Ki;Kp;Logical Operator;Mechanical to Electrical Position;Mod;Motor load;Mux;Offset;Offset voltage;Output Scaling;PI Controller;PI Controllers;PI_Controller_Id;PI_Controller_Iq;PU;PU_Conversion;PWM_Duty;Park Transform;PhaseCurr;Pos_PU;Q17 per unit conversion;QEP_Index_Latch;QEP_Position_Count;Quadrature Decoder;RT;Rate Transition;Reference;Saturate at ADC Vref;Saturate at inverter Vref;Scope;Selector;Sensor_Measurements;Signal Builder;Sim_fb;Sine-Cosine Lookup;Space Vector Generator;Speed Control;Speed Controller;Speed Measurement;Speed ref in PU;Speed_fb;Speed_meas;Speed_ref;Speef_fb;SubSystem;Sum;Surface Mount PMSM;Switch to closed loop ;Terminator;Theta_e;Theta_rad;To Workspace;V_ref;Vabc;Vabc in PU;Vabc_duty;Vd;Vd_ref;Vq;Vq_ref;Wrap;Zero_Cancellation;id;idq_ref_PU;in;iq;out;rad;speed;speed_PU;speed_fb;speed_ref;~1.65V in ADC counts

BLOCKTYPE:
ArithShift;Average Value Inverter;BusSelector;Clarke Transform;Constant;DQ Limiter;DataTypeConversion;Delay;Demux;Discrete Derivative;From;FromWorkspace;Fuzzy Inference System;Gain;Goto;IIR Filter;Inport;Inverse Park Transform;Logic;Math;Mechanical to Electrical Position;Mux;Outport;PID 1dof;PWM Modulation;Park Transform;Quadrature Decoder;RateTransition;Saturate;Scope;Selector;Sigbuilder block;Sine-Cosine Lookup;Speed Measurement;Step;Sum;Surface Mount PMSM;Terminator;ToWorkspace


MODELNAME: shower
PATH: examples/fuzzy/main/shower.slx
ANNOTATION: Temperature Control in a Shower Copyright (c) 2002-2018 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 16;1;4;1;4;2;2;6;6;8;8;2;2;4;6;2;2
CHECKSUM: 7038490CA8BCB277F33B295DA4E7FEC6
PRODUCT: Fuzzy Logic Toolbox;Fuzzy Logic Toolbox Documentation;MATLAB;Simulink
PRODUCT_BASECODE: FL
DESCRIPTION:
Temperature Control in a Shower This demo shows how to use a fuzzy-logic inference system in a Simulink(R) model. There are two inputs to the fuzzy controller: the water temperature and the flow rate. The controller uses these inputs to set the position of the hot and cold valves.

BLOCK:
Constant;Demux;Fuzzy Logic Controller;Inport;Integrator;Logical Operator;Mux;Outport;Reference;Relational operator;Saturation;SubSystem;Switch;To Workspace;cold water valve;flow;flow error;flow rate;flow rate (cold);flow rate (hot);flow scope;flow setpoint;flow variation;hot water valve;in_;max flow;max flow constant;max flow variation;out_;temp;temp (cold);temp (hot);temp error;temp scope;temp setpoint;temp variation;valve setting (cold);valve setting (hot)

BLOCKTYPE:
Constant;Demux;Fcn;Fuzzy Inference System;Inport;Integrator;Limited Integrator.;Logic;Mux;Outport;RelationalOperator;Saturate;Scope;SignalGenerator;Sum;Switch;ToWorkspace


MODELNAME: sllookuptable
PATH: examples/fuzzy/main/sllookuptable.slx
BLOCKTYPE_FREQUENCY: 3;3;1;18;6;3;1;3;3;1;1;6
CHECKSUM: 9181B4A2B09A1A87F240187ECD6C2BB5
PRODUCT: Control System Toolbox;Fuzzy Logic Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: FL
ANNOTATION:
PD Control PI Control Feed Forward PI Control PD Control Feed Forward Using Lookup Table to Implement a Fuzzy PID Controller Copyright (c) 2002-2018 The MathWorks, Inc.

BLOCK:
Conventional PID;Discrete Derivative;Discrete-Time Integrator;FIS using Lookup Table;Fuzzy Inference System;Fuzzy PID;Fuzzy PID using Lookup Table;GE;LTI System;Mux;Reference;Scope;SubSystem;Sum;r;u;y

BLOCKTYPE:
Discrete Derivative;DiscreteIntegrator;Fuzzy Inference System;Gain;Inport;LTI Block;Lookup_n-D;Mux;Outport;Scope;Step;Sum


MODELNAME: sltank
PATH: examples/fuzzy/main/sltank.slx
ANNOTATION: Copyright 2002-2023 The MathWorks, Inc. Water Level Control in a Tank
BLOCKTYPE_FREQUENCY: 3;1;3;1;2;5;2;2;1;4;6;1;1;1;3;4;1;3;1;1;1
CHECKSUM: 8D34B42D907DDFCE425A47B0EFCB8E98
PRODUCT: Fuzzy Logic Toolbox;Fuzzy Logic Toolbox Documentation;MATLAB;Simulink
PRODUCT_BASECODE: FL
BLOCK:
1/area;Comparison;Constant;Derivative;Fcn;Fuzzy Logic Controller;In_;Integrator;Level-2 MATLAB S-Function;Limited Integrator;Mux;Out_;Overflow sensor;PID Controller;Product;Reference;Saturation;Scope;Signal Generator;SubSystem;Subsystem;Sum;Switch;change;change scope;const;control;error;flow in;flow out;out flow;outletArea;overflow flag;source flow;sqrt(2gh);sum;tank ;tank max inflow;tank volume;water level

BLOCKTYPE:
Constant;Derivative;Fcn;Fuzzy Inference System;Gain;Inport;Integrator;Limited integrator.;M-S-Function;Mux;Outport;PID 1dof;Product;Relay;Saturate;Scope;SignalGenerator;Sum;Switch;Valve;Water tank


MODELNAME: sltankrule
PATH: examples/fuzzy/main/sltankrule.slx
ANNOTATION: Water Level Control in a Tank Copyright 2002-2023 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 3;1;3;1;2;5;2;2;1;4;6;1;1;1;3;4;1;3;1;1;1
CHECKSUM: 97379755324933B10B87296C99351863
PRODUCT: Fuzzy Logic Toolbox;Fuzzy Logic Toolbox Documentation;MATLAB;Simulink
PRODUCT_BASECODE: FL
DESCRIPTION:
Water Level Control in a Tank This demo shows how to use a fuzzy-logic inference system in a Simulink(R) model. There are two inputs to the fuzzy controller: the rate of change of the water level and the difference between the actual and the required water levels. The controller uses these inputs to control the inflow rate. When you run the model, the Rule Viewer updates dynamically to show which rule the fuzzy controller is using to set the flow rate.

BLOCK:
1/area;Constant;Derivative;Fcn;Fuzzy Controller with Ruleviewer;In_;Integrator;Level-2 MATLAB S-Function;Limited Integrator;Mux;Out_;Overflow sensor;PID Controller;Product;Reference;Saturation;Scope;Signal Generator;SubSystem;Subsystem;Sum;Switch;change;change scope;const;control;error;flow in;flow out;out flow;outletArea;overflow flag;source flow;sqrt(2gh);sum;tank ;tank max inflow;tank volume;water level

BLOCKTYPE:
Constant;Derivative;Fcn;Fuzzy Inference System;Gain;Inport;Integrator;Limited integrator.;M-S-Function;Mux;Outport;PID 1dof;Product;Relay;Saturate;Scope;SignalGenerator;Sum;Switch;Valve;Water tank


MODELNAME: edgeDetection
PATH: examples/gpucoder/main/edgeDetection.slx
ANNOTATION: Copyright 2021-2023 The MathWorks, Inc.
BLOCKTYPE: Constant;Demux;From Multimedia File;Inport;Outport;S-Function;Terminator;VideoViewer
BLOCKTYPE_FREQUENCY: 1;2;1;3;2;2;2;2
CHECKSUM: 31075BAB46A03239EA28535DC245DA36
PRODUCT: Computer Vision Toolbox;MATLAB;Simulink;Simulink Test Documentation
PRODUCT_BASECODE: GC
BLOCK:
 Demux ; SFunction ; Terminator ;Edge Detected;From Multimedia File;Original;RGB;RGB To Gray;Reference;Sobel Edge Detection;SubSystem;Threshold;edgeImage;gray;grayImage;threshold


MODELNAME: edgeDetectionInitial
PATH: examples/gpucoder/main/edgeDetectionInitial.slx
ANNOTATION: Copyright 2021-2023 The MathWorks, Inc.
BLOCKTYPE: Constant;Demux;From Multimedia File;Inport;Outport;S-Function;Terminator;VideoViewer
BLOCKTYPE_FREQUENCY: 1;2;1;2;2;2;2;2
CHECKSUM: 099BA671BB23E7F9566ADDCCB50CD0F8
PRODUCT: Computer Vision Toolbox;MATLAB;Simulink;Simulink Test Documentation
PRODUCT_BASECODE: GC
BLOCK:
 Demux ; SFunction ; Terminator ;Edge Detected;From Multimedia File;MATLAB Function;Original;Reference;SubSystem;Threshold;u;y


MODELNAME: fog_rectification_model
PATH: examples/gpucoder/main/fog_rectification_model.slx
BLOCKTYPE: Demux;Image From File;Inport;Outport;S-Function;Terminator
BLOCKTYPE_FREQUENCY: 2;1;3;1;2;2
CHECKSUM: 826EE0B69242BF047511D430CBB95CC7
PRODUCT_BASECODE: GC
ANNOTATION:
 GPU Code Generation for a Fog Rectification Simulink Model  Copyright 2020-2022 The Mathworks, Inc.

BLOCK:
 Demux ; SFunction ; Terminator ;Fog Rectification;Image From File;More Info;Reference;SubSystem;Visualization;input;inputImage;out;outputImage

PRODUCT:
Computer Vision Toolbox;Embedded Coder;Image Processing Toolbox;MATLAB;MATLAB Coder Documentation;Simulink


MODELNAME: lane_detection
PATH: examples/gpucoder/main/lane_detection.slx
ANNOTATION: Copyright 2020-2021 The MathWorks, Inc.
BLOCKTYPE: Demux;Image From File;Inport;Outport;S-Function;Terminator
BLOCKTYPE_FREQUENCY: 2;1;3;1;2;2
CHECKSUM: 0C1B94FFEA7161159A316FA4C7BD2111
PRODUCT_BASECODE: GC
BLOCK:
 Demux ; SFunction ; Terminator ;Image From File;Lane Detection;Reference;SubSystem;Visualization;inputImage;lanes;lanesStructArray

PRODUCT:
Computer Vision Toolbox;Embedded Coder;GPU Coder Documentation;Image Processing Toolbox;MATLAB;Simulink


MODELNAME: ArrayOfBusSignalWithRecordTypes
PATH: examples/hdlcoder/main/ArrayOfBusSignalWithRecordTypes.slx
BLOCK: Bus Creator;Bus Selector;Constant;DUT;In;Out;Scope;Selector;SubSystem;Unit Delay;Vector Concatenate
BLOCKTYPE: BusCreator;BusSelector;Concatenate;Constant;Inport;Outport;Scope;Selector;UnitDelay
BLOCKTYPE_FREQUENCY: 2;1;1;4;1;1;1;1;1
CHECKSUM: 3479409F5805DD24F8C86CACD260FC43
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
The bus object RecordBusObj is loaded from PreLoadFcn model callback.  Copyright 2023 The MathWorks Inc.


MODELNAME: AsynchronousClockUsingTriggerAsClock
PATH: examples/hdlcoder/main/AsynchronousClockUsingTriggerAsClock.slx
ANNOTATION: Copyright 2023 The MathWorks, Inc.
BLOCKTYPE: Compare To Constant;Delay;Gain;HDL Counter;Inport;Outport;Scope;Sum;TriggerPort
BLOCKTYPE_FREQUENCY: 2;3;1;1;5;3;1;1;2
CHECKSUM: DED7ED0BB15A4DE8BD92951D8D043D57
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Compare To Constant;DUT;Data;Delay;Gain;HDL Counter;In;Out;Reference;Scope;SubSystem;Trigger;Triggered Subsystem


MODELNAME: AsynchronousClockandResetUsingTriggerAsClock
PATH: examples/hdlcoder/main/AsynchronousClockandResetUsingTriggerAsClock.slx
ANNOTATION: Copyright 2023 The MathWorks, Inc.
BLOCKTYPE: Compare To Constant;Delay;Gain;HDL Counter;Inport;Outport;ResetPort;Scope;StateControl;TriggerPort
BLOCKTYPE_FREQUENCY: 4;3;1;2;11;5;2;1;4;2
CHECKSUM: BA2DABCD3CBC54018F6770830AA04CF6
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Compare To Constant;DUT;Data;Delay;Gain;HDL Counter;In;Out;Reference;Reset;Resettable Subsystem;Scope;State Control;SubSystem;Trigger;Triggered Subsystem;data


MODELNAME: BusSignalWithRecordTypes
PATH: examples/hdlcoder/main/BusSignalWithRecordTypes.slx
BLOCK: Bus Creator;Bus Selector;Constant;DUT;In;Out;Scope;SubSystem;Unit Delay
BLOCKTYPE: BusCreator;BusSelector;Constant;Inport;Outport;Scope;UnitDelay
BLOCKTYPE_FREQUENCY: 1;1;2;1;1;1;1
CHECKSUM: 82FF9B7780DCE0A265CB29904213902C
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Copyright 2023 The MathWorks Inc. The bus object BusRecordObj is loaded from PreLoadFcn model callback. 


MODELNAME: ClockAndResetModellingUsingTriggerAsClock
PATH: examples/hdlcoder/main/ClockAndResetModellingUsingTriggerAsClock.slx
ANNOTATION: Copyright 2023 The MathWorks, Inc.
BLOCKTYPE: Compare To Constant;Delay;Gain;HDL Counter;Inport;Outport;ResetPort;Scope;StateControl;TriggerPort
BLOCKTYPE_FREQUENCY: 2;2;1;2;6;3;1;1;1;1
CHECKSUM: C7EEA7962198C9F6884B47E99DCA9F1F
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Compare To Constant;DUT;Delay;Gain;HDL Counter;Input Data;Output;Reference;Reset;Resettable_Subsystem;Scope;State Control;SubSystem;Trigger;Triggered_Subsystem


MODELNAME: FrameBasedEdgeDetectionForHDLCodeGenExample
PATH: examples/hdlcoder/main/FrameBasedEdgeDetectionForHDLCodeGenExample.slx
ANNOTATION: Edge Detection and Image Overlay
BLOCKTYPE_FREQUENCY: 2;2;2;1;2;4;8;2;2;2
CHECKSUM: 768F8858EC17DFDFCEB2EAC8A4DEAB56
PRODUCT: Computer Vision Toolbox;Fixed-Point Designer;MATLAB;Simulink;Simulink Test Documentation
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;DUT;DUT Video Viewer;DUTPipelined;DUT_pipelined Video Viewer;Data Type Conversion;E;Gain;I;MATLAB Function;Matrix Concatenate;O;Reference;SubSystem;Video Source

BLOCKTYPE:
Concatenate;DataTypeConversion;Demux;From Multimedia File;Gain;Inport;Outport;S-Function;Terminator;VideoViewer


MODELNAME: MLHDLIncrementer
PATH: examples/hdlcoder/main/MLHDLIncrementer.slx
ANNOTATION: Copyright 2006-2023 The MathWorks, Inc.
BLOCKTYPE: Constant;Demux;Display;Inport;ManualSwitch;Outport;S-Function;Terminator;ToWorkspace
BLOCKTYPE_FREQUENCY: 3;1;1;4;1;2;1;1;1
CHECKSUM: 8F2FA06BCE9B9A8374E77ED8AD67745C
PRODUCT: Fixed-Point Designer;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Control;DUT_ML_Block;Display;In;Increment;Out;Preset;Preset Value;SubSystem;To Workspace;counter;ctr_preset;ctr_preset_val;function_inc


MODELNAME: PhasedClocksUsingTriggeredSubsystem
PATH: examples/hdlcoder/main/PhasedClocksUsingTriggeredSubsystem.slx
BLOCKTYPE_FREQUENCY: 1;1;5;1;11;1;5;12;17;1;2;1;5;5;1
CHECKSUM: 57E637E12A99E9AACBE225A3C5CEDE7A
PRODUCT: DSP System Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Bus Creator;Bus to Vector;Clock Generation;Compare To Constant;Counter Free-Running;Delay;Frame Conversion;Gain;In;Input Data;Input-Output Waveforms;Out;Parallel;Phase;Phased Clock Waveforms;Phased_Clock_DUT;Reference;Repeating Sequence Stair;Serial;Serializer;State Control;SubSystem;TestPattern;Trigger;TriggeredSubsystem;Unbuffer;trigger

BLOCKTYPE:
BusCreator;BusToVector;Compare To Constant;Counter Free-Running;Delay;FrameConversion;Gain;Inport;Outport;Repeating Sequence Stair;Scope;Serializer;StateControl;TriggerPort;Unbuffer


MODELNAME: ProgrammableFIRCDC
PATH: examples/hdlcoder/main/ProgrammableFIRCDC.slx
ANNOTATION: Copyright 2023 The MathWorks, Inc.
BLOCKTYPE: Constant;DataTypeConversion;Discrete FIR Filter;Inport;Outport;Scope;Signal From Workspace;Switch
BLOCKTYPE_FREQUENCY: 4;1;1;5;2;1;1;1
CHECKSUM: B4FB6D1FBC76282496CE92ACFE39EB30
PRODUCT: DSP HDL Toolbox;DSP System Toolbox;Fixed-Point Designer;MATLAB;Signal Processing Toolbox;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Constant;Data Type Conversion;Discrete FIR Filter;HDL Algorithm;HPFilterCoefficients;LPFilterCoefficients;Reference;Repeating Chirp Signals;Scope;SelectLP;SubSystem;Switch;dataIn;dataOut;highpass;lowpass;validIn;validOut


MODELNAME: RunningSum_Custom
PATH: examples/hdlcoder/main/RunningSum_Custom.slx
ANNOTATION: OversamplingFactor=12 Copyright 2018-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;3;1;1;1;5;4;1;1;1;3;3;2
CHECKSUM: 766D8C2EEABD2AA2957E7D5209D2948D
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Compare To Zero;Constant;CumSum_sl;Data Type Conversion;HDL Counter;Pulse Generator;Random Number;Reference;State Control;SubSystem;Subsystem;Switch;Terminator;Unit Delay;data;numel;out;reset;rst;sum;valid;validOut

BLOCKTYPE:
Compare To Zero;Constant;DataTypeConversion;DiscretePulseGenerator;HDL Counter;Inport;Outport;RandomNumber;StateControl;Sum;Switch;Terminator;UnitDelay


MODELNAME: RunningSum_OSmanual
PATH: examples/hdlcoder/main/RunningSum_OSmanual.slx
BLOCKTYPE_FREQUENCY: 1;3;1;3;1;1;6;1;4;1;1;4;1;4;3;1
CHECKSUM: F53A3028F0F6CC167565C29AB3E7146A
PRODUCT: DSP System Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
use of repeat and zoh blocks to deal with floating-point latency in feedback loop instead of oversampling the whole design Copyright 2016-2021 The MathWorks, Inc.

BLOCK:
Add;Compare To Zero;Constant;CumSum_sl;Data Type Conversion;Delay;HDL Counter;Logical Operator;Pulse Generator;Random Number;Reference;SubSystem;Subsystem;Switch;Terminator;Unit Delay;Unit Delay_enbsw;data;enable;in0_repeat;in1_repeat;in2_repeat;in3_repeat;numel;out;reset;rst;sum;valid;validOut

BLOCKTYPE:
Compare To Zero;Constant;DataTypeConversion;Delay;DiscretePulseGenerator;HDL Counter;Inport;Logic;Outport;RandomNumber;RateTransition;Repeat;Sum;Switch;Terminator;UnitDelay


MODELNAME: SystemVerilogFromSimulink
PATH: examples/hdlcoder/main/SystemVerilogFromSimulink.slx
BLOCK: Add;HDL_DUT;Random Integer Generator;Reference;Scope;SubSystem;in;out
BLOCKTYPE: Inport;Outport;Random Integer Generator;Scope;Sum
BLOCKTYPE_FREQUENCY: 2;1;2;1;1
CHECKSUM: 9279DAA9CFAD37F5F6EA08BA0E0C8E9A
PRODUCT: Communications Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 Note: This model is configured with hdlsetup  Add your design targeted for ASIC/FPGA inside HDL_DUT and then run the following command: makehdl(HDL_DUT)


MODELNAME: TappedDelayEnableResetModel
PATH: examples/hdlcoder/main/TappedDelayEnableResetModel.slx
BLOCKTYPE: Constant;Display;Inport;Outport;Scope;Tapped Delay Enabled Resettable Synchronous
BLOCKTYPE_FREQUENCY: 3;1;3;1;1;1
CHECKSUM: 4E2440D4A05A8858BA2A1AC69DEF20F8
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
The enb and rst values are loaded from InitFcn model callback. Input Reset Enable Copyright 2023 The MathWorks Inc.

BLOCK:
Constant;DUT;Display;Reference;Scope;SubSystem;Tapped Delay Enabled Resettable Synchronous;enb;rst;u;y


MODELNAME: TriggerAsClockSingle
PATH: examples/hdlcoder/main/TriggerAsClockSingle.slx
ANNOTATION: Copyright 2023 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;2;1;1;1;3;2;1;1;1
CHECKSUM: 0C40ABE1D5582131F7FEAB9EBCEE1200
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
DUT;Data Type Conversion;Delay;Gain;HDL Counter;In;Out;Pulse Generator;Reference;Scope;State Control;SubSystem;Trigger;Triggered Subsystem

BLOCKTYPE:
DataTypeConversion;Delay;DiscretePulseGenerator;Gain;HDL Counter;Inport;Outport;Scope;StateControl;TriggerPort


MODELNAME: atomic_partial_connected
PATH: examples/hdlcoder/main/atomic_partial_connected.slx
BLOCK: Constant;DUT;Display;Gain;In;Out;SubSystem;Terminator;add;mul;sys
BLOCKTYPE: Constant;Display;Gain;Inport;Outport;Product;Sum;Terminator
BLOCKTYPE_FREQUENCY: 2;2;5;10;6;2;2;2
CHECKSUM: 16FC69C21BAB3EEF7410493F1E463286
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Partially Dead (alive in sys1, dead in sys2) Partially Dead (dead in sys1, alive in sys2) Partially Dead (dead in sys1, alive in sys2) Partially Dead (alive in sys1, dead in sys2) Completely dead Completely Dead Completely dead


MODELNAME: delay_absorption_feedback_loop
PATH: examples/hdlcoder/main/delay_absorption_feedback_loop.slx
ANNOTATION: Copyright 2023 The MathWorks, Inc.
BLOCKTYPE: DataTypeConversion;Delay;DiscretePulseGenerator;Gain;Inport;Outport;RandomNumber;Scope;Sum;Switch
BLOCKTYPE_FREQUENCY: 2;1;1;3;5;2;1;1;1;1
CHECKSUM: F6B107B3C93D26162A8D2B9EC41CD8C9
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
DUT;Data Type Conversion;Delay;Feed_Forward;Gain;Out;Pulse Generator;Random Number;Scope;SubSystem;Sum;Switch;control_signal;data;feedback


MODELNAME: foreach_subsystem_example1
PATH: examples/hdlcoder/main/foreach_subsystem_example1.slx
ANNOTATION: Copyright 2016-2021 The MathWorks, Inc.
BLOCKTYPE: Constant;Delay;ForEach;Gain;Inport;Outport;Product;Scope;Sum
BLOCKTYPE_FREQUENCY: 3;1;1;1;6;2;1;1;1
CHECKSUM: E4CBB425ABFB650D80DA9652C515F644
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Constant;Delay;For Each;For Each Subsystem;Gain;In;Out;Product;Scope;SubSystem;Subsystem_Foreach


MODELNAME: foreach_subsystem_example2
PATH: examples/hdlcoder/main/foreach_subsystem_example2.slx
ANNOTATION: Copyright 2020-2021 The MathWorks, Inc.
BLOCKTYPE: Concatenate;Delay;ForEach;Gain;Inport;Outport;Scope;Selector;Sine Wave;Sum
BLOCKTYPE_FREQUENCY: 1;1;1;1;4;4;1;3;3;1
CHECKSUM: 5690B40BC0197C8BE9497F95B0429060
PRODUCT: DSP System Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;DUT;Delay;For Each;For Each Subsystem;Gain;In;Matrix Concatenate;Out;Reference;Scope;Selector;Sine Wave;SubSystem


MODELNAME: gmStateSpaceHDL_sschdlexThreePhaseConverter
PATH: examples/hdlcoder/main/gmStateSpaceHDL_sschdlexThreePhaseConverter.slx
CHECKSUM: FCB59D2412614C04639C225A4FB5B8FF
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Subcycle Averaging - FPGA Clock Rate ideal switch flag forces inputs to be complementary Open Circuit Connected to Positive Rail Connected to Negative Rail Short Between Rails Subcycle Averaging - FPGA Model Rate Output Voltages Based on Switch State - FPGA Model Rate Calculate State Based on Switch Control - FPGA Clock Rate Calculate State Based on Switch Control - FPGA Clock Rate Output Voltages Based on Switch State - FPGA Model Rate Subcycle Averaging - FPGA Model Rate Short Between Rails Connected to Negative Rail Connected to Positive Rail Open Circuit ideal switch flag forces inputs to be complementary Subcycle Averaging - FPGA Clock Rate Calculate State Based on Switch Control - FPGA Clock Rate Output Voltages Based on Switch State - FPGA Model Rate Subcycle Averaging - FPGA Model Rate Short Between Rails Connected to Negative Rail Connected to Positive Rail Open Circuit ideal switch flag forces inputs to be complementary Subcycle Averaging - FPGA Clock Rate Override External Signals Decode Fault Word Interface System Frame based data transfer to CPU Analog Interfaces & Scaling Converter & Grid Model PWM Generator Grid DC link and 3 phase 2 level converter Frame based signal logging on CPU Copyright 2023 The MathWorks, Inc. Feedback signals

BLOCK:
 Demux ; SFunction ; Terminator ;+;-;25 kV, 60 Hz;A+;A+ Close;A+ Fault;A+ Open;A-;A- Close;A- Fault;A- Open;AND;Abs;Add;B+;B+ Close;B+ Fault;B+ Open;B-;B- Close;B- Fault;B- Open;Bias;Bit Shift;Bitwise Operator;C+;C+ Close;C+ Fault;C+ Open;C-;C- Close;C- Fault;C- Open;CPU Signal Logging;Calculate Phase Voltage;Carrier;CarrierReset;Compare To Constant;Compare To Zero;Constant;Control;Counter;Counter Free-Running;Counter Limited;DAC trigger 1_;DAC_;DAC_Scaling;DQ Current Control;Data Type Conversion;Data Type Conversion Breaker;Data Type Conversion DAC;Data Type Conversion Iabc;Data Type Conversion Idc;Data Type Conversion Va;Data Type Conversion Vb;Data Type Conversion Vc;Data Type Conversion Vdc;Data Type Conversion Vg;DeadBand;Delay;Demux;Detect Change;Detect Increase;Enable;Extract Bits;FPGA;Fault;Fault_Word;File Log;For Each;For Each Subsystem;From;Gain;Gates;Generate Mode Vector;Goto;Grid Voltage;HDL Algorithm;HDL Counter;HDL Subsystem;I;IDC;I_DC;I_Phase;Ia;Iabc (pu);Iabc_conv;Iabc_grid;Ib;Ic;Idc;Ideal_Switch_Flag;In;Incorporate Fault Signals;Index;Input Concat;Inverse Park Transform;Inverter (2-Level HDL w faults);Iout;Logical Operator;Max;Minus;Mode Selection;Multiply;Multiply Input;Multiply State;Mux;NOT;Negative Rail Switch Characteristics;OR;Open Circuit;Out;Output;Output Demux;Output Mode Vector To Index;Output Sum;PCIe_FrameData;PID Controller;PWM Generator;PWM Period;Park Transform;Period;Positive Rail Switch Characteristics;Product;Rate Transition;Reference;Relational Operator;Reshape;S;S+;S-;Saturation;Scope;Sel;Selector;Signal Scaling;Simulink-PS Converter;Sinusoidal Measurement (PLL, Three-Phase);State;State Delay;State Mode Vector To Index;State Out;State Switch;State Update;Step;SubSystem;Subtract;Sum;Switch;Tapped Delay;Term;Terminator;Unary Minus;Unit Delay;Unit Delay Enabled Synchronous;V;V_minus;V_plus;Va;Vabc;Vabc_conv;Vabc_grid;Valid Out;Vb;Vc;Vdc;Vhalf;Vin;Vll;Vll_calculate;Vneg;Vout;Vpos;X;assertion;breaker;breaker_cmd;concat;dq;id_ref;ideal_switch_flag;idq;idq_ref;iq_ref;modWave;modWave_corr;omega;t;u;uncatalogued mode identifier;vdq_grid;vs;x

BLOCKTYPE:
Abs;Assertion;Bias;Bit Concat;Bit Shift;Bitwise Operator;Compare To Constant;Compare To Zero;Concatenate;Constant;Counter Free-Running;Counter Limited;DataTypeConversion;Delay;Demux;Detect Change;Detect Increase;Extract Bits;ForEach;From;Gain;Goto;HDL Counter;Inport;InportShadow;Inverse Park Transform;Logic;MinMax;Mux;Outport;PID 1dof;Park Transform;Product;RateTransition;RelationalOperator;Reshape;S-Function;Saturate;Scope;Selector;Sin;Sinusoidal Measurement (PLL, Three-Phase);Step;Sum;Switch;Tapped Delay Line;Terminator;UnaryMinus;Unit Delay Enabled Synchronous;UnitDelay;slrealtimeloggingblock

BLOCKTYPE_FREQUENCY:
1;1;1;1;3;3;18;7;1;41;1;1;59;4;13;1;1;18;1;92;24;70;19;122;21;1;24;6;14;62;2;2;27;35;7;1;1;3;2;5;1;1;2;36;16;1;17;1;1;21;6

PRODUCT:
Fixed-Point Designer;HDL Coder;HDL Coder Documentation;MATLAB;Simscape Electrical;Simulink;Simulink Real-Time


MODELNAME: gm_hdlcoder_constant_subsystem_boundary
PATH: examples/hdlcoder/main/gm_hdlcoder_constant_subsystem_boundary.slx
ANNOTATION: Copyright 2018-2021 The MathWorks, Inc.
BLOCKTYPE: Constant;Counter Free-Running;DataTypeConversion;FloatTypecast;Gain;Inport;Outport;Scope;Sum
BLOCKTYPE_FREQUENCY: 3;1;1;1;1;5;5;1;3
CHECKSUM: EF5DE4042BE676AD81C23867CFF8BADA
PRODUCT: Fixed-Point Designer;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Add_to_const;Constant;Constant_subsys;Counter Free-Running;DUT;Data Type Conversion;Gain;In;In3_wire;Out;Reference;Scope;SubSystem;Subsystem;out


MODELNAME: gm_hdlcoder_distributed_pipelining_soe
PATH: examples/hdlcoder/main/gm_hdlcoder_distributed_pipelining_soe.slx
ANNOTATION: Copyright 2018-2021 The MathWorks, Inc.
BLOCKTYPE: DataTypeConversion;Delay;Demux;Inport;Mux;Outport;Scope;Sum;ZeroOrderHold;chirp
BLOCKTYPE_FREQUENCY: 1;15;1;2;1;2;1;7;1;1
CHECKSUM: 36026EB1108E24CD185D291613F866EB
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Add_stage;Add_stage1_sum;Add_stage2_sum;Chirp Signal;DUT;Data Type Conversion;Delay;In;Mux;Out;Reference;Scope;SubSystem;Zero-Order Hold;rd_;t


MODELNAME: hdlFrame_Demosaic
PATH: examples/hdlcoder/main/hdlFrame_Demosaic.slx
BLOCKTYPE: DataTypeConversion;Demux;Image From File;Inport;Outport;S-Function;Terminator;VideoViewer
BLOCKTYPE_FREQUENCY: 4;1;1;2;6;1;1;2
CHECKSUM: 8408583682671CBC114F02A53FD46E34
PRODUCT: Computer Vision Toolbox;HDL Coder;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;B;DUT;Data Type Conversion;Equalized;G;I;Image From File;MATLAB Function;Original;R;Reference;Rout;SubSystem


MODELNAME: hdlFrame_FogRectification_2D_MLFB
PATH: examples/hdlcoder/main/hdlFrame_FogRectification_2D_MLFB.slx
BLOCKTYPE: Concatenate;Demux;Image From File;Inport;Outport;S-Function;Terminator;VideoViewer
BLOCKTYPE_FREQUENCY: 1;1;1;6;7;1;1;2
CHECKSUM: C32D2A45FF15833BDFAA09804929E799
PRODUCT: Computer Vision Toolbox;Fixed-Point Designer;HDL Coder;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Bu;DUT;Gu;Image From File;Input Video;MATLAB Function;Matrix Concatenate;Out;Output;Reference;Ru;SubSystem;b_in;b_out;g_in;g_out;r_in;r_out


MODELNAME: hdlFrame_FogRectification_2D_SLBlock
PATH: examples/hdlcoder/main/hdlFrame_FogRectification_2D_SLBlock.slx
BLOCKTYPE_FREQUENCY: 3;1;3;5;1;25;2;6;18;3;3;3;4;3;2
CHECKSUM: A6AB6AC4368E1EB5386A4E26A3FA4EB4
PRODUCT: Computer Vision Toolbox;Embedded Coder;Fixed-Point Designer;HDL Coder;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Add;B;B_in;Bout;ComputeMin;Constant;DUT;Data Type Conversion;G;G_in;Gain;Gout;Image From File;In;Min;ModifiedImage;Neighborhood;NeighborhoodConfig;OriginalImage;Out;Product;R;R_in;Reference;Reshape;Rout;SubSystem;Sum of Elements;anisotropicDiffusion;b;computeDarChannel;convertToGrayScale;darkChannel;diff_im;fogStage;g;im_gray;im_gray_single;invKoschmiederLaw;r;restoreB;restoreB_out;restoreG;restoreG_out;restoreR;restoreR_out;zeros2ones

BLOCKTYPE:
Constant;DataTypeConversion;Demux;Gain;Image From File;Inport;MinMax;Neighborhood;Outport;Product;Reshape;S-Function;Sum;Terminator;VideoViewer


MODELNAME: hdlFrame_ObjectDetecting
PATH: examples/hdlcoder/main/hdlFrame_ObjectDetecting.slx
BLOCKTYPE_FREQUENCY: 3;6;1;2;1;1;1;20;2;13;3;1;2;3;3;2;1
CHECKSUM: 93AB0AAC2C07046837CB39762749BD12
PRODUCT: Computer Vision Toolbox;Embedded Coder;HDL Coder Documentation;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;B;BW;ColorSplit;Compute Centroid;DUT;Data Type Conversion;Draw Markers;FindTarget;From Multimedia File;G;Gain;H;HSVtoBW;Htarg;Hthresh;HueTolerance ;Image;Image Resize;Logical Operator;Output;R;Reference;S;SatTolerance;SelB;SelG;SelR;Starg;Sthresh;SubSystem;TargetHue;TargetSat;TargetVal;V;ValTolerance;Video Source;Vtarg;Vthresh;abserr;centroid;err;lt;rgb2hsv

BLOCKTYPE:
Abs;Constant;DataTypeConversion;Demux;Draw Markers;From Multimedia File;Gain;Inport;Logic;Outport;RelationalOperator;Resize;S-Function;Selector;Sum;Terminator;VideoViewer


MODELNAME: hdlFrame_RGBFilter
PATH: examples/hdlcoder/main/hdlFrame_RGBFilter.slx
BLOCKTYPE: Concatenate;Constant;Image From File;Inport;Outport;RelationalOperator;Switch;VideoViewer
BLOCKTYPE_FREQUENCY: 3;6;1;12;6;3;3;1
CHECKSUM: A4010661B83C2265DEE36F694C7CE848
PRODUCT: Computer Vision Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
DESCRIPTION:
Sobel Edge Detection Using the MATLAB(R) Function Block This example shows how to use HDL Coder(TM) to check, generate, and verify HDL code for a Sobel Edge Detection block built using the MATLAB Function block.

BLOCK:
B;BMax;Bo;Constant;DUT;G;GMax;Go;Image From File;In;Matrix Concatenate;Out;R;RMax;Reference;Relational Operator;Rmax;Ro;SubSystem;Switch;filtered;selectB;selectG;selectR


MODELNAME: hdlFrame_Zynq_Histogram
PATH: examples/hdlcoder/main/hdlFrame_Zynq_Histogram.slx
ANNOTATION: Frame-Based Histogram Equalization Copyright 2022 The MathWorks, Inc.
BLOCKTYPE: Concatenate;Demux;Image From File;Inport;Outport;S-Function;Terminator;VideoViewer
BLOCKTYPE_FREQUENCY: 1;1;1;2;2;1;1;1
CHECKSUM: 4AE3CBE953B7D19E73D81F7E6986FA97
PRODUCT: Computer Vision Toolbox;Fixed-Point Designer;HDL Coder Documentation;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;DUT;Equalized;HistogramEq;Image From File;ImageIn;ImageOut;Matrix Concatenate;Reference;SubSystem;im_gray;im_out


MODELNAME: hdl_areaopt1
PATH: examples/hdlcoder/main/hdl_areaopt1.slx
ANNOTATION: Copyright 2009-2012 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;1;1;3;1;1;1;1;2;1;2
CHECKSUM: BB97F74847D2388A8E1F154CBEA6BF21
PRODUCT: Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Controller;Counter Free-Running;D;Data Type Conversion;Integer Delay;Out;P;Reference;Saturation;Scope;SubSystem;Sum;Tapped Delay;err_d;input register;one_by_Ts;output register

BLOCKTYPE:
Counter Free-Running;DataTypeConversion;Delay;Gain;Inport;Outport;Saturate;Scope;Sum;Tapped Delay Line;UnitDelay


MODELNAME: hdl_cosim_demo1
PATH: examples/hdlcoder/main/hdl_cosim_demo1.slx
ANNOTATION: Copyright 2009-2012 The MathWorks, Inc.
BLOCKTYPE: Counter Free-Running;DataTypeConversion;Inport;Outport;Product;Scope;Sum;UnitDelay
BLOCKTYPE_FREQUENCY: 2;1;2;1;1;1;1;1
CHECKSUM: 3E17E2783B15B91EFEB2524BE8529E21
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Counter Free-Running;Data Type Conversion;In;MAC;Out;Product;Reference;Scope;SubSystem;Sum;Unit Delay


MODELNAME: hdl_cosim_demo2
PATH: examples/hdlcoder/main/hdl_cosim_demo2.slx
ANNOTATION: Copyright 2009-2012 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;2;1;2;1;1;1;2;1;1
CHECKSUM: C5E6F989CD92BE1E77126BED271F5DE5
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Complex MAC;Complex to Real-Imag;Counter Free-Running;Data Type Conversion;In;Out;Product;Real-Imag to Complex;Reference;Scope;SubSystem;Sum;Unit Delay

BLOCKTYPE:
ComplexToRealImag;Counter Free-Running;DataTypeConversion;Inport;Outport;Product;RealImagToComplex;Scope;Sum;UnitDelay


MODELNAME: hdl_cosim_demo3
PATH: examples/hdlcoder/main/hdl_cosim_demo3.slx
ANNOTATION: Copyright 2009-2012 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;1;2;1;1;1;1;1;1
CHECKSUM: B633E58B5B3665E31D8543410047D5D3
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Counter Free-Running;Data Type Conversion;In;Out;Product;Reference;Scope;SubSystem;Sum;Tapped Delay;Unit Delay;Vector MAC

BLOCKTYPE:
Counter Free-Running;DataTypeConversion;Inport;Outport;Product;Scope;Sum;Tapped Delay Line;UnitDelay


MODELNAME: hdl_cosim_demo4
PATH: examples/hdlcoder/main/hdl_cosim_demo4.slx
ANNOTATION: Copyright 2009-2012 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;1;2;1;1;1;2;1;1
CHECKSUM: 2EA6323CE3C271E6418246DCBE8F350E
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Counter Free-Running;Data Type Conversion;In;LocalMR MAC;Out;Product;Reference;Scope;SubSystem;Sum;Sum of Elements;Tapped Delay;Unit Delay

BLOCKTYPE:
Counter Free-Running;DataTypeConversion;Inport;Outport;Product;Scope;Sum;Tapped Delay Line;UnitDelay


MODELNAME: hdl_delaybalancing
PATH: examples/hdlcoder/main/hdl_delaybalancing.slx
ANNOTATION: Copyright 2010-2014 The MathWorks, Inc.
BLOCKTYPE: DataTypeConversion;Gain;Inport;Outport;RateTransition;Scope;Sqrt;Sum;UniformRandomNumber
BLOCKTYPE_FREQUENCY: 2;2;1;1;1;1;1;1;1
CHECKSUM: BB3011A2478AABF42FB66E949F3DEC2C
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Data Type Conversion;Gain;In;Out;Rate Transition;Scope;Sqrt;SubSystem;Subsystem;Uniform Random Number


MODELNAME: hdlcoderFocCurrentFixptHdl
PATH: examples/hdlcoder/main/hdlcoderFocCurrentFixptHdl.slx
ANNOTATION: FOC Current Control Copyright 2014-2017 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 9;4;1;8;28;6;2;1;18;12;2;2;2;2;2;1;15;2;2;2
CHECKSUM: C3D36B3844272FE985EAC3FC7C129B25
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
A;ABC;ABC_SVM;Add;Alpha;Alpha_Gain;B;Beta;Beta_Gain;Clarke_Transform;Cos;Cos_Coefficient;Current_Command;Current_Measured;D;DQ_Current_Control;D_Command;D_Current;D_Current_Control;D_Voltage;Data Type Conversion;Data_Type_Convert;Delay_Register;Electrical_Position;Error;FOC_Current_Control;Gain;In;Integral_Gain;Inverse_Clarke_Transform;Inverse_Park_Transform;Max;Min;Mux;Negate;Normalize_Position;Not_Equal;Out;P;Park_Transform;Phase_Current;Phase_Voltage;Produc3t;Product;Proportional_Gain;Q;Q_Command;Q_Current;Q_Current_Control;Q_Voltage;Reference;Sample_Time;Saturate;Saturate_Output;Saturation_Dynamic;Saturation_Magnitude;Sin;Sin_Coefficient;Sine_Cosine;Sine_Cosine_LUT;Space_Vector_Modulation;SubSystem;Switch;Unit_Delay;Voltage;Zero

BLOCKTYPE:
Constant;DataTypeConversion;Delay;Gain;Inport;InportShadow;MinMax;Mux;Outport;Product;RelationalOperator;Saturate;Saturate Magnitude;Saturation Dynamic;Selector;Sine and Cosine;Sum;Switch;UnaryMinus;UnitDelay


MODELNAME: hdlcoderFocCurrentFloatHalfHdl
PATH: examples/hdlcoder/main/hdlcoderFocCurrentFloatHalfHdl.slx
BLOCKTYPE_FREQUENCY: 11;7;1;6;28;6;2;1;18;14;6;2;2;1;15;6;2;2
CHECKSUM: B8E4FA61646F6A405ED25C5141EC1197
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Saturate Magnitude Library Saturate Magnitude Library FOC Current Control Copyright 2014-2020 The MathWorks, Inc.

BLOCK:
A;ABC;ABC_SVM;Add;Alpha;B;Beta;Cast;Clarke_Transform;Cos;Cos_Coefficient;Current_Command;Current_Measured;D;DQ_Current_Control;D_Command;D_Current;D_Current_Control;D_Voltage;Data Type Conversion;Data_Type_Convert;Delay_Register;Electrical_Position;Error;FOC_Current_Control;Gain;In;Integral_Gain;Inverse_Clarke_Transform;Inverse_Park_Transform;Max;Min;Mux;Not_Equal;Out;P;Park_Transform;Phase_Current;Phase_Voltage;Produc3t;Product;Q;Q_Command;Q_Current;Q_Current_Control;Q_Voltage;Reference;Relational Operator;Sample_Time;Saturate_Output;Saturation_Magnitude;Sin;SinCosLUT;Sin_Coefficient;Sine_Cosine_LUT;Space_Vector_Modulation;SubSystem;Switch;Unary Minus;Unit_Delay;Voltage;Zero;currentControlPTerm

BLOCKTYPE:
Constant;DataTypeConversion;Delay;Gain;Inport;InportShadow;MinMax;Mux;Outport;Product;RelationalOperator;Saturate Magnitude;Selector;Sine and Cosine;Sum;Switch;UnaryMinus;UnitDelay


MODELNAME: hdlcoderFocCurrentFloatHdl
PATH: examples/hdlcoder/main/hdlcoderFocCurrentFloatHdl.slx
BLOCKTYPE_FREQUENCY: 9;4;1;8;30;6;2;1;22;12;6;2;2;1;15;6;1;2;2
CHECKSUM: ED1DC1A7621BB94BDD2CE84003D7D6DA
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Saturate Magnitude Library Saturate Magnitude Library FOC Current Control Copyright 2014-2017 The MathWorks, Inc.

BLOCK:
A;ABC;ABC_SVM;Add;Alpha;Alpha_Gain;B;Beta;Beta_Gain;Clarke_Transform;Cos;Cos_Coefficient;Current_Command;Current_Measured;D;DQ_Current_Control;D_Command;D_Current;D_Current_Control;D_Voltage;Data Type Conversion;Data_Type_Convert;Delay_Register;Electrical_Position;Error;FOC_Current_Control;Gain;In;Integral_Gain;Inverse_Clarke_Transform;Inverse_Park_Transform;Max;Min;Mux;Negate;Normalize_Position;Not_Equal;Out;P;Park_Transform;Phase_Current;Phase_Voltage;Produc3t;Product;Proportional_Gain;Q;Q_Command;Q_Current;Q_Current_Control;Q_Voltage;Reference;Relational Operator;Sample_Time;Saturate_Output;Saturation_Magnitude;Sin;SinCosLUT;SinCosTrig;Sin_Coefficient;Sine_Cosine;Sine_Cosine_LUT;Space_Vector_Modulation;SubSystem;Subsystem;Switch;Unit_Delay;Voltage;Zero

BLOCKTYPE:
Constant;DataTypeConversion;Delay;Gain;Inport;InportShadow;MinMax;Mux;Outport;Product;RelationalOperator;Saturate Magnitude;Selector;Sine and Cosine;Sum;Switch;Trigonometry;UnaryMinus;UnitDelay


MODELNAME: hdlcoderFocCurrentSingleTargetHdl
PATH: examples/hdlcoder/main/hdlcoderFocCurrentSingleTargetHdl.slx
ANNOTATION: Sine Cosine Coefficients FOC Current Control Copyright 2014-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 9;1;7;28;6;2;1;18;12;2;2;2;2;2;15;2;2;2;2
CHECKSUM: D36A9FDCF4B581A46D201D0E7507B1C7
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Negate;A;ABC;ABC_SVM;Add;Alpha;Alpha_Gain;B;Beta;Beta_Gain;Clarke_Transform;Cos;Cos_Coefficient;Current_Command;Current_Measured;D;DQ_Current_Control;D_Command;D_Current;D_Current_Control;D_Voltage;Delay_Register;Electrical_Position;Error;FOC_Current_Control;Gain;In;Integral_Gain;Inverse_Clarke_Transform;Inverse_Park_Transform;Max;Min;Mux;Not_Equal;Out;P;Park_Transform;Phase_Current;Phase_Voltage;Produc3t;Product;Proportional_Gain;Q;Q_Command;Q_Current;Q_Current_Control;Q_Voltage;Reference;Sample_Time;Saturate;Saturate_Output;Saturation_Dynamic;Saturation_Magnitude;Sin;Sin_Coefficient;Sine_Cosine;Space_Vector_Modulation;SubSystem;Switch;Trigonometric Function;Unit_Delay;Voltage;Zero

BLOCKTYPE:
Constant;Delay;Gain;Inport;InportShadow;MinMax;Mux;Outport;Product;RelationalOperator;Saturate;Saturate Magnitude;Saturation Dynamic;Selector;Sum;Switch;Trigonometry;UnaryMinus;UnitDelay


MODELNAME: hdlcoderFocCurrentTestBench
PATH: examples/hdlcoder/main/hdlcoderFocCurrentTestBench.slx
BLOCKTYPE_FREQUENCY: 4;9;3;3;1;4;2;2;1;4;1;1;1;1;15;4;2;2;1;1;2;14;12;1;4;1;4;4;1;1;1;8;1;7;1;3;3;1
CHECKSUM: 5916301EFAE5500C98F6E521B895B6BE
PRODUCT: HDL Coder Documentation;MATLAB;Simscape;Simscape Electrical;Simulink
PRODUCT_BASECODE: ES;HD
EXTERNALFILE_REFERENCE: hdlcoderFocCurrentFixptHdl___Model_Block___
ANNOTATION:
Continuous To Discrete Discrete To Continuous Inverter Average Voltage Clarke Transform Park Transform Measurements PMSM Velocity Load Motor And Load System Inputs Visualize Outputs Field-Oriented Control Current Control Test Bench Copyright 2014-2023 The MathWorks, Inc.

BLOCK:
A;ABC;Add;Alpha;Alpha_Gain;B;Beta;Beta_Gain;Bus Creator;Bus Selector;Bus_Creator;C;Clarke_Transform;Continuous_To_Discrete;Controlled_Voltage_Source;Controller;Cos_Coefficient;Current_Command;Current_Sensor;D;DT;Demux;Discrete_To_Continuous;Electrical Reference;Electrical_Position;Electrical_Reference;Enable;FromWs;Gain;Gmin;Ideal_Angular_Velocity_Source;Ideal_Rotational_Mot ion_Sensor;Ideal_Switch;Ideal_Torque_Sensor;Inverter_Average_Voltage;M;Measurements;Mechanical Rotational Reference;Mechanical_Rotational_Reference;Memory;Modulus;Motor_And_Load;Motor_Commands;Motor_Measurements;Mux;Out;PMSM;PS-Simulink Converter;Park_Transform;Permanent_Magnet_Synchronous_Motor;Phase_Current;Phase_Splitter;Phase_Voltage;Phase_Voltages;Product;Q;R;RT;Reference;Rotational_Friction;Rotor_Inertia;Selector;Signal_Builder_Experiments;Simulink-PS Converter;Simulink_To_PS;Sin_Coefficient;Sine_Cosine;Solver_Configuration;SubSystem;System_In;System_Inputs;System_Measurements;System_Response_Scope;T;Two_Pi;Velocity;Velocity_Load;Verify_Outputs;W;currentCommand (Ampere);velocityLoad (rad/sec)

BLOCKTYPE:
BusCreator;BusSelector;Constant;Controlled Voltage Source;Current Sensor (Three-Phase);DataTypeConversion;Demux;Electrical Reference;FromWorkspace;Gain;Ideal Angular Velocity Source;Ideal Rotational Motion Sensor;Ideal Torque Sensor;Inertia;Inport;InportShadow;Math;Mechanical Rotational Reference;Memory;ModelReference;Mux;Outport;PMIOPort;PMSM;PS-Simulink Converter;Phase Splitter;Product;RateTransition;Resistor;Rotational Friction;Scope;Selector;Sigbuilder block;Simulink-PS Converter;Solver Configuration;Sum;Switch;Trigonometry


MODELNAME: hdlcoderIncludeCustomHdlUsingDocBlockExample
PATH: examples/hdlcoder/main/hdlcoderIncludeCustomHdlUsingDocBlockExample.slx
BLOCKTYPE: Counter Limited;DataTypeConversion;DocBlock;Inport;Outport;Scope;UnitDelay
BLOCKTYPE_FREQUENCY: 1;1;2;2;2;1;1
CHECKSUM: 2CA30BF628EAFF97C8F18B08BAF71F66
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 1. Use a register for generating a clock bundle 2. Otherwise turn on the HDL Block Properties AddClockPort, AddClockEnablePort, AddResetPort to generate Clocks Verilog code VHDL code Set appropriate HDL Block properties within the BlackBox architecture for subsystem (C) 2015 The Mathworks, Inc.

BLOCK:
DUT;DocBlock;In;LegacyCodeSubs;Out;Reference;SubSystem;Unit Delay;counter;data_in;data_out;dtc;scope


MODELNAME: hdlcoderParkTransform
PATH: examples/hdlcoder/main/hdlcoderParkTransform.slx
ANNOTATION: Copyright 2020-2021 The MathWorks, Inc.
BLOCKTYPE: Constant;DataTypeConversion;Demux;From;Gain;Goto;Inport;Mux;Outport;Product;Scope;Sum;Trigonometry
BLOCKTYPE_FREQUENCY: 2;2;1;2;2;2;7;1;2;6;1;7;6
CHECKSUM: A0D311A1049B27220571DC08EDE37474
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
AddSub;Constant;DUT;Data Type Conversion;Demux;From;Gain;Goto;Ia;Iabc;Ib;Ic;Id;Iq;Mux;Product;Scope;ShiftedTheta;SubSystem;Subtract;Sum;Theta;sine


MODELNAME: hdlcoderParkTransformShare
PATH: examples/hdlcoder/main/hdlcoderParkTransformShare.slx
ANNOTATION: Copyright 2020-2024 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;2;1;2;2;2;6;1;2;6;1;4;6;1
CHECKSUM: 7DCC8EF28E1A9F6270394DE162E92980
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
AddSub;Constant;DUT;Data Type Conversion;Demux;From;Gain;Goto;Ia;Iabc;Ib;Ic;Id;Iq;Mux;Product;Scope;SubSystem;Sum;Theta;Unary Minus;cosine;sine

BLOCKTYPE:
Constant;DataTypeConversion;Demux;From;Gain;Goto;Inport;Mux;Outport;Product;Scope;Sum;Trigonometry;UnaryMinus


MODELNAME: hdlcoderUARTServoControllerExampleAltera
PATH: examples/hdlcoder/main/hdlcoderUARTServoControllerExampleAltera.slx
BLOCKTYPE_FREQUENCY: 4;5;37;18;1;1;3;1;79;4;80;1;18;3;1;29;2
CHECKSUM: 4F249E2ECCBC063657750DE62653B0B6
PRODUCT: DSP System Toolbox;MATLAB;Simulink;Stateflow
PRODUCT_BASECODE: ES;HD
ANNOTATION:
downsample to 33KHz pwm signal at 65Hz, pulse width from 0.36ms to 2.21ms  Example of an FPGA Servo Motor Controller with UART interface FPGA Board clock frequency: 100MHz  UART Baud rate: 115200 8-1-N

BLOCK:
 Demux ; Ground ; RotateAuto; SFunction ; Terminator ;Add;Constant;Data Type Conversion;Debug;Decoder;DegreeIn;Downsample;Ground;HDL Counter;Integer Delay;Logical Operator;Motor Degree;PWM Generator;PWM Signal;Pulse Generator;Reference;Relational Operator;Scope;Servo Control;ServoOut;Servo_Motor_Controller;SourceExample;Source_HostPC_SerialPort;SubSystem;Terminator;UART_Servo_on_FPGA;Unit Delay;baud;baud16_;baud_enb;baud_rate;c;cnt8_enb;data_in;data_out;din;done;dout;enable;error_ovr;error_stop;frame_detect;int_rd;int_wr;key_;pwm_output;rd;ready_in;ready_out;servo_debug;shift_enb;shift_in;shift_out;simple_uart;simple_uart_rx;simple_uart_tx;start_detect;u;uart_brenb;uart_dinp;uart_dout;uart_dvld;uart_fe;uart_ovr;uart_rd;uart_rdy;uart_rx;uart_rx_fsm;uart_rxd;uart_rxd_reg;uart_tx;uart_tx_fsm;uart_txd;uart_version;uart_version_number;uart_wr;version;wr;y

BLOCKTYPE:
Constant;DataTypeConversion;Delay;Demux;DiscretePulseGenerator;DownSample;Ground;HDL Counter;Inport;Logic;Outport;RelationalOperator;S-Function;Scope;Sum;Terminator;UnitDelay


MODELNAME: hdlcoderUARTServoControllerExampleXilinx
PATH: examples/hdlcoder/main/hdlcoderUARTServoControllerExampleXilinx.slx
BLOCKTYPE_FREQUENCY: 4;5;37;18;1;1;3;1;79;4;80;1;18;3;1;29;2
CHECKSUM: A4CF627BB892ECC487CF2BC3FAFF9239
PRODUCT: DSP System Toolbox;MATLAB;Simulink;Stateflow
PRODUCT_BASECODE: ES;HD
ANNOTATION:
downsample to 33KHz pwm signal at 65Hz, pulse width from 0.36ms to 2.21ms  Copyright 2009-2023 The Mathworks Inc. Example of an FPGA Servo Motor Controller with UART interface FPGA Board clock frequency: 100MHz  UART Baud rate: 115200 8-1-N

BLOCK:
 Demux ; Ground ; RotateAuto; SFunction ; Terminator ;Add;Constant;Data Type Conversion;Debug;Decoder;DegreeIn;Downsample;Ground;HDL Counter;Integer Delay;Logical Operator;Motor Degree;PWM Generator;PWM Signal;Pulse Generator;Reference;Relational Operator;Scope;Servo Control;ServoOut;Servo_Motor_Controller;SourceExample;Source_HostPC_SerialPort;SubSystem;Terminator;UART_Servo_on_FPGA;Unit Delay;baud;baud16_;baud_enb;baud_rate;c;cnt8_enb;data_in;data_out;din;done;dout;enable;error_ovr;error_stop;frame_detect;int_rd;int_wr;key_;pwm_output;rd;ready_in;ready_out;servo_debug;shift_enb;shift_in;shift_out;simple_uart;simple_uart_rx;simple_uart_tx;start_detect;u;uart_brenb;uart_dinp;uart_dout;uart_dvld;uart_fe;uart_ovr;uart_rd;uart_rdy;uart_rx;uart_rx_fsm;uart_rxd;uart_rxd_reg;uart_tx;uart_tx_fsm;uart_txd;uart_version;uart_version_number;uart_wr;version;wr;y

BLOCKTYPE:
Constant;DataTypeConversion;Delay;Demux;DiscretePulseGenerator;DownSample;Ground;HDL Counter;Inport;Logic;Outport;RelationalOperator;S-Function;Scope;Sum;Terminator;UnitDelay


MODELNAME: hdlcoder_AXI4StreamMaster
PATH: examples/hdlcoder/main/hdlcoder_AXI4StreamMaster.slx
ANNOTATION: Copyright 2020-2021 The MathWorks, Inc.
BLOCKTYPE: Constant;DataTypeConversion;EnablePort;HDL Counter;Inport;Logic;Outport;Scope
BLOCKTYPE_FREQUENCY: 2;2;1;1;1;1;3;3
CHECKSUM: 64A2DD8132BF583FB21DBBE1F360E995
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
AND;Constant;DUT;Data Type Conversion;Enable;HDL Counter;HDLCounter;In;Reference;Scope;SubSystem;count;y_out;yout_data;yout_valid


MODELNAME: hdlcoder_AXI4StreamMaster_sw
PATH: examples/hdlcoder/main/hdlcoder_AXI4StreamMaster_sw.slx
BLOCKTYPE_FREQUENCY: 1;1;1;3;2;2;1;3;2;1;3;1
CHECKSUM: D2EA9AF7D5860D9FE455DA1D862E837C
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Generated by HDL Workflow Advisor on 07-May-2020 19:27:35 Generated by HDL Workflow Advisor on 07-May-2020 19:27:35

BLOCK:
AXI4-Stream IIO Read;AXI4Reset;AXI4ResetModelSource;AXI4SlaveWrite;AXI4SlaveWrite_In;AXI_Read_y_out_DTC;Constant;DUT;Data Type Conversion;DataTypeConversion;Ground;In;Reference;Scope;SubSystem;Subsystem;Terminator;y_out;y_out_data_vector;yout_data;yout_valid

BLOCKTYPE:
AXI4-Interface Write;AXI4-Lite/AXI4 Interface;Constant;DataTypeConversion;Ground;Inport;Model Source;Outport;Scope;System Start;Terminator;matlabshared.libiio.axistream.read

PRODUCT:
Embedded Coder;Embedded Coder Support Package for Xilinx Zynq Platform;MATLAB;Simulink;SoC Blockset Support Package for Xilinx Devices


MODELNAME: hdlcoder_AXI4StreamSlave
PATH: examples/hdlcoder/main/hdlcoder_AXI4StreamSlave.slx
BLOCKTYPE: Delay;Dual-port RAM;HDL Counter;Inport;Outport;Scope;Signal From Workspace;Terminator;ToWorkspace
BLOCKTYPE_FREQUENCY: 1;1;2;6;4;1;2;1;1
CHECKSUM: 03F6C438EC59EBE98E56C2CAB06D0B9E
PRODUCT: DSP System Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
map to AXI Lite 0x100 map to AXI Stream Slave map to AXI Lite 0x104 Copyright 2020 The MathWorks, Inc.

BLOCK:
DUAL PORT RAM;DUT;Delay;Dual Port RAM;HDL Counter;Reference;Scope;Signal From Workspace;SubSystem;Subsystem;Terminator;To Workspace;axis_data_in;axis_valid_in;enb;rd_addr;rd_addr_reg;rd_dout;rd_dout_reg;wr_din;wr_dout;xin_data


MODELNAME: hdlcoder_AXI4StreamSlave_sw
PATH: examples/hdlcoder/main/hdlcoder_AXI4StreamSlave_sw.slx
BLOCKTYPE_FREQUENCY: 1;1;1;5;1;2;1;5;1;4;3;2;1;4;1;1
CHECKSUM: 7F801177A5B4AF25E98F797AD7A6A7E1
PRODUCT_BASECODE: ES;HD
ANNOTATION:
map to AXI Lite 0x104 map to AXI Stream Slave map to AXI Lite 0x100 Generated by HDL Workflow Advisor on 08-May-2020 16:49:02 Copyright 2020 The MathWorks, Inc. Generated by HDL Workflow Advisor on 08-May-2020 16:49:02

BLOCK:
AXI4-Stream IIO Write;AXI4Reset;AXI4ResetModelSource;AXI4SlaveRead;AXI4SlaveRead_rd_dout_reg;AXI4SlaveWrite;AXI4SlaveWrite_rd_addr_reg;AXI_Read_y_out_DTC;AXI_Write;Counter;DUT;Data Type Conversion;DataTypeConversion;Delay;Ground;HDL Counter;Reference;Scope;Signal From Workspace;SubSystem;Subsystem;Terminator;To Workspace;axis_data_in;axis_valid_in;rd_addr_reg;rd_dout_reg;xin_data;y_out;yout_data

BLOCKTYPE:
AXI4-Interface Read;AXI4-Interface Write;AXI4-Lite/AXI4 Interface;DataTypeConversion;Delay;Ground;HDL Counter;Inport;Model Source;Outport;Scope;Signal From Workspace;System Start;Terminator;ToWorkspace;matlabshared.libiio.axistream.write

PRODUCT:
DSP System Toolbox;Embedded Coder;Embedded Coder Support Package for Xilinx Zynq Platform;MATLAB;Simulink;SoC Blockset Support Package for Xilinx Devices


MODELNAME: hdlcoder_I2C_adau1761
PATH: examples/hdlcoder/main/hdlcoder_I2C_adau1761.slx
BLOCKTYPE: Demux;Inport;Outport;S-Function;Terminator
BLOCKTYPE_FREQUENCY: 1;4;17;1;1
CHECKSUM: F21363E132C84BB732409E4EDBFBDF22
PRODUCT: MATLAB;Simulink;Stateflow
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 Stateflow Chart for I2C Configuration of ADAU1761   I2C Master Controller   Using IP Core Generation Workflow: I2C IP generation Copyright 2016-2017 The MathWorks, Inc.

BLOCK:
 Demux ; SFunction ; Terminator ;ADDR;I2C_ADAU;I2C_MasterController;Reference;SCL;SDA;SubSystem;busy;byte_mode;databyte;enb;i2c_cfg;mode;n_ack;reg_addr;reg_byte_mode;reg_mode;rw;slv_addr


MODELNAME: hdlcoder_I2C_ssm2603
PATH: examples/hdlcoder/main/hdlcoder_I2C_ssm2603.slx
ANNOTATION: Using IP Core Generation Workflow: I2C IP generation Copyright 2016-2018 The MathWorks, Inc.
BLOCKTYPE: Demux;Inport;Outport;S-Function;Terminator
BLOCKTYPE_FREQUENCY: 1;2;14;1;3
CHECKSUM: 456C9946334ABF699FC8AD1A7F3EEDCB
PRODUCT: MATLAB;Simulink;Stateflow
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;I2C_CLK;I2C_DATA;I2C_MasterController;I2C_SSM;MUTEN;Reference;SCL;SDA;SubSystem;Terminator;busy;databyte;enb;i2c_cfg;mode;n_ack;reg_addr;reg_byte_mode;rw;slv_addr


MODELNAME: hdlcoder_I2S_adau1761
PATH: examples/hdlcoder/main/hdlcoder_I2S_adau1761.slx
ANNOTATION: Using IP Core Generation Workflow: I2S IP generation Copyright 2016 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;4;1;3;3;1;2;1;17;16;1;2;1
CHECKSUM: 413FF315C8B82FF6A3E6D3ADF0D4CBB2
PRODUCT: Fixed-Point Designer;HDL Coder;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Audio_in_data;Audio_in_valid ;Audio_left_in;Audio_left_out;Audio_out_data ;Audio_out_valid ;Audio_right_in;Audio_right_out;BCLK;Bit Concat;Bit Slice;Bit_Slice;Bit_clock;Data Type Conversion;Delay;From Workspace;I2S_Subsystem;I2S_Testbench;I2S_controller;In;Input Data;LRCLK;Left_Right_select;Model Info;Out;Pulse Generator;Reference;Run Demo;SDATA;Scope;Serial_data_in;Serial_data_out;Serial_data_out ;SubSystem;Subsystem;new_sample

BLOCKTYPE:
Bit Concat;Bit Slice;CMBlock;DataTypeConversion;Delay;Demux;DiscretePulseGenerator;FromWorkspace;Inport;Outport;S-Function;Scope;Terminator


MODELNAME: hdlcoder_I2S_ssm2603
PATH: examples/hdlcoder/main/hdlcoder_I2S_ssm2603.slx
BLOCKTYPE_FREQUENCY: 1;4;1;3;3;1;2;1;20;16;1;2;1
CHECKSUM: DDC410065A457F1F9C127409EC958C5C
PRODUCT: Fixed-Point Designer;HDL Coder;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Using IP Core Generation Workflow: I2S IP generation for Zybo / ArrowSocKit Copyright 2016-2017 The MathWorks, Inc.

BLOCK:
 Demux ; SFunction ; Terminator ;Audio_in_data;Audio_in_valid ;Audio_left_in;Audio_left_out;Audio_out_data ;Audio_out_valid ;Audio_right_in;Audio_right_out;BCLK;Bit Concat;Bit Slice;Bit_Slice;Bit_clock;Data Type Conversion;Delay;From Workspace;I2S_Subsystem;I2S_Testbench;I2S_controller;In;Input Data;LRCLK;Model Info;Out;PBCLK;Pulse Generator;RECLK;Reference;Run Demo;SDATA;Scope;Serial_data_in;Serial_data_out;Serial_data_out ;SubSystem;Subsystem;new_sample

BLOCKTYPE:
Bit Concat;Bit Slice;CMBlock;DataTypeConversion;Delay;Demux;DiscretePulseGenerator;FromWorkspace;Inport;Outport;S-Function;Scope;Terminator


MODELNAME: hdlcoder_LUT_BRAM_mapping
PATH: examples/hdlcoder/main/hdlcoder_LUT_BRAM_mapping.slx
ANNOTATION: Copyright 2019 The MathWorks, Inc.
BLOCKTYPE: DataTypeConversion;Delay;Inport;Lookup_n-D;Outport;Ramp;Scope;ZeroOrderHold
BLOCKTYPE_FREQUENCY: 3;3;2;2;2;1;1;1
CHECKSUM: D8CC20B3A9282D798AE313BF09A8DD5A
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Data Type Conversion;Delay;Delay_adjust;In;LUT;LUT_BRAM;Out;Ramp;Reference;Scope;SubSystem;Zero-Order Hold


MODELNAME: hdlcoder_MLFB_avoid_algebraic_loops
PATH: examples/hdlcoder/main/hdlcoder_MLFB_avoid_algebraic_loops.slx
ANNOTATION: Copyright 2014-2019 The MathWorks, Inc.
BLOCKTYPE: DataTypeConversion;Delay;Demux;Inport;Outport;S-Function;Scope;SignalEditor;Terminator
BLOCKTYPE_FREQUENCY: 1;1;2;6;4;2;1;1;2
CHECKSUM: 531EBC851C6BE796A828F0EB95DD6CE5
PRODUCT: HDL Coder Documentation;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Data Type Conversion;Delay;In;MATLAB Function;Out;Reference;Scope;Signal Builder;SubSystem;Subsystem_AlgLoop_Issue;Subsystem_LoopIssue_Resolved;u;y


MODELNAME: hdlcoder_MLFB_share_pipeline
PATH: examples/hdlcoder/main/hdlcoder_MLFB_share_pipeline.slx
ANNOTATION: Copyright 2019-2021 The MathWorks, Inc.
BLOCKTYPE: Counter Limited;Delay;Demux;Gain;Inport;Outport;S-Function;Scope;Sum;Terminator
BLOCKTYPE_FREQUENCY: 2;2;3;6;19;9;3;2;4;3
CHECKSUM: C0DCF66684108A1540DE10DF98ED3B0C
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Add;Counter Limited;Delay;Gain;HDL_DUT_distpipe;HDL_DUT_sharing;In;MATLAB Function;Out;Reference;Scope;SubSystem;Subsystem;u;v;w;x;y


MODELNAME: hdlcoder_MLFB_simple_datapath
PATH: examples/hdlcoder/main/hdlcoder_MLFB_simple_datapath.slx
ANNOTATION: Copyright 2019-2021 The MathWorks, Inc.
BLOCKTYPE: Constant;Demux;Inport;Outport;Product;S-Function;Scope;Terminator
BLOCKTYPE_FREQUENCY: 6;1;10;5;1;1;1;1
CHECKSUM: 360A3AEE9B7988F1E838DBE8A288A0C0
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Constant;HDL_DUT;MATLAB Function;Product;Scope;SubSystem;c;d;e;f;in;out;y


MODELNAME: hdlcoder_RemoveUnconnectedPorts
PATH: examples/hdlcoder/main/hdlcoder_RemoveUnconnectedPorts.slx
ANNOTATION: Copyright 2019-2021 The MathWorks, Inc.
BLOCKTYPE: BusCreator;BusSelector;Constant;Delay;Gain;Inport;Outport;Terminator
BLOCKTYPE_FREQUENCY: 1;1;4;1;1;10;6;1
CHECKSUM: 43EC5023A4F951022DD1B71329456F8A
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
<signal1>;<signal2>;Bus Creator;Bus Selector;Constant;Delay_;Gain_;In;In Bus Element;Out;Out Bus Element;SubSystem;Terminator;dut;inner_Subsystem;mid_Subsystem


MODELNAME: hdlcoder_absorb_delay_streaming
PATH: examples/hdlcoder/main/hdlcoder_absorb_delay_streaming.slx
ANNOTATION: StreamingFactor=10 Copyright 2015-2023 The MathWorks, Inc.
BLOCKTYPE: Delay;Gain;Inport;Outport;Product;Random Integer Generator;Scope;Tapped Delay Line
BLOCKTYPE_FREQUENCY: 1;2;4;2;1;2;1;2
CHECKSUM: 264ABE0E131AB900B05989CF1BAF6A71
PRODUCT: Communications Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
DUT;Delay;Gain;In;Out;Product;Random Integer Generator;Reference;Scope;SubSystem;Subsystem;Tapped Delay


MODELNAME: hdlcoder_absorb_delays
PATH: examples/hdlcoder/main/hdlcoder_absorb_delays.slx
ANNOTATION: Copyright 2020 The MathWorks, Inc.
BLOCKTYPE: Compare To Constant;Counter Free-Running;Delay;HDL Counter;Inport;Outport;Product;Scope
BLOCKTYPE_FREQUENCY: 2;2;1;1;2;2;1;1
CHECKSUM: 355A12E92488D51A75FDFE250DD905B8
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Compare To Constant;Counter Free-Running;Delay;Divide;HDL Counter;HDL_DUT;In;Out;Reference;Scope;SubSystem


MODELNAME: hdlcoder_audio_filter
PATH: examples/hdlcoder/main/hdlcoder_audio_filter.slx
BLOCKTYPE_FREQUENCY: 1;1;2;1;4;1;4;2;2;6;2;3;4;1;17;1;1;20;1;1;5
CHECKSUM: FD290B4A067B61FB54263F2F2D1E4E2C
PRODUCT: DSP System Toolbox;HDL Coder;HDL Coder Documentation;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Using IP Core Generation Workflow: Audio Filtering Copyright 2016 The MathWorks, Inc. control from processor connect to LED pin connect to Audio Data In (AXI4-Stream) connect to Audio Data Out (AXI4-Stream) connect to Audio Valid In (AXI4-Stream) connect to Audio Valid Out (AXI4-Stream) connect to LED pin connect to LED pin connect to LED pin

BLOCK:
Audio Device Writer;Audio_Filter;BP_en;Band_Pass;Band_Pass_Filter;Band_Pass_LED;Band_pass;Bit Concat;Bit Shift;Bit Slice;Buffer;BufferingOut;Concatenation;Constant;Control_Logic_To_Enable_Filters;Data Type Conversion;DataTypeConversionIn;DataTypeConversionOut;Data_Type_Conversion_In;Data_Type_Conversion_Out;Data_in;Data_out;Demux;Discrete FIR Filter;Enable;Filter Select;Filter_block;Filter_select;From Multimedia File;HP_en;High_Pass;High_Pass_filter;High_pass;High_pass_LED;In;Input to Switch;LP_en;Low_Pass;Low_Pass_filter;Low_pass;Low_pass_LED;Matrix Concatenate;Multiport Switch;Mux;No Filter;Out;Pass_Through;Pass_through_LED;Reference;Run Demo;Spectrum Analyzer;SubSystem;Sum;Terminator;Valid_in;Valid_out

BLOCKTYPE:
Audio Device Writer;Audio Filter Selection;Bit Concat;Bit Shift;Bit Slice;Buffer;Compare To Constant;Concatenate;Constant;DataTypeConversion;Demux;DiscreteFir;EnablePort;From Multimedia File;Inport;MultiPortSwitch;Mux;Outport;SpectrumAnalyzer;Sum;Terminator


MODELNAME: hdlcoder_audio_filter_biquad
PATH: examples/hdlcoder/main/hdlcoder_audio_filter_biquad.slx
DESCRIPTION: Model Contains Audio Equalizer
BLOCKTYPE_FREQUENCY: 1;1;3;2;1;4;1;4;2;2;6;2;4;1;17;1;1;20;1;1;5
CHECKSUM: 365FB4DAF60C915478AF7D30D499F750
PRODUCT: DSP System Toolbox;HDL Coder;HDL Coder Documentation;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Copyright 2017 The MathWorks, Inc. control from processor connect to LED pin Using IP Core Generation Workflow: Audio Filtering connect to Audio Valid In (AXI4-Stream) connect to Audio Data In (AXI4-Stream) connect to Audio Data Out (AXI4-Stream) connect to Audio Valid Out (AXI4-Stream) connect to LED pin connect to LED pin connect to LED pin

BLOCK:
Audio Device Writer;Audio_Filter;BP_en;BiQuad_BPF ;BiQuad_HPF;BiQuad_HPF ;BiQuad_HPF_LED;BiQuad_LPF;BiQuad_LPF ;BiQuad_LPF_LED;Biquad Filter BPF;Biquad Filter HPF;Biquad Filter LPF;Biquad_BPF_LED;Bit Concat;Bit Shift;Bit Slice;Buffer;BufferingOut;Concatenation;Constant;Control_Logic_To_Enable_Filters;Data Type Conversion;DataTypeConversionIn;DataTypeConversionOut;Data_Type_Conversion_In;Data_Type_Conversion_Out;Data_in;Data_out;Demux;Enable;Filter Select;Filter_block;Filter_select;From Multimedia File;HP_en;In;Input to Switch;LP_en;Matrix Concatenate;Multiport Switch;Mux;No Filter;Out;Pass_Through;Pass_through_LED;Reference;Run Demo;Spectrum Analyzer;SubSystem;Sum;Terminator;Valid_in;Valid_out

BLOCKTYPE:
Audio Device Writer;Audio Filter Selection;Biquad Filter;Bit Concat;Bit Shift;Bit Slice;Buffer;Compare To Constant;Concatenate;Constant;DataTypeConversion;Demux;EnablePort;From Multimedia File;Inport;MultiPortSwitch;Mux;Outport;SpectrumAnalyzer;Sum;Terminator


MODELNAME: hdlcoder_audiofiltering
PATH: examples/hdlcoder/main/hdlcoder_audiofiltering.slx
ANNOTATION: Copyright 2009-2011 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 2;12;432;2;436;2;2;12;2;2;12;2;2;2;434
CHECKSUM: 7029789A5CD98A398ADCCC97A191296C
PRODUCT: DSP System Toolbox;MATLAB;Signal Processing Toolbox;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Analysis;Analysis_unfiltered;Audio filter;Band-Limited White Noise;BodyDelay;BodyLSum;BodyRDelay;BodyRSum;CleanupScopes;ConvertIn;ConvertOut;ConvertState;Data Type Conversion;Filter_left;Filter_right;From;Generated Filter Block;Goto;HeadSumR;Highpass Filter;In;Input;Mux;Out;Out_noise;Output;Reference;Scope;Scope unfiltered;Sine Wave;Spectrum Scope;Spectrum Scope unfiltered;SubSystem;Sum;Switch left;Switch right;b(1);b(10);b(100);b(101);b(102);b(103);b(104);b(105);b(106);b(107);b(108);b(109);b(11);b(110);b(111);b(112);b(113);b(114);b(115);b(116);b(117);b(118);b(119);b(12);b(120);b(121);b(122);b(123);b(124);b(125);b(126);b(127);b(128);b(129);b(13);b(130);b(131);b(132);b(133);b(134);b(135);b(136);b(137);b(138);b(139);b(14);b(140);b(141);b(142);b(143);b(144);b(145);b(146);b(147);b(148);b(149);b(15);b(150);b(151);b(152);b(153);b(154);b(155);b(156);b(157);b(158);b(159);b(16);b(160);b(161);b(162);b(163);b(164);b(165);b(166);b(167);b(168);b(169);b(17);b(170);b(171);b(172);b(173);b(174);b(175);b(176);b(177);b(178);b(179);b(18);b(180);b(181);b(182);b(183);b(184);b(185);b(186);b(187);b(188);b(189);b(19);b(190);b(191);b(192);b(193);b(194);b(195);b(196);b(197);b(198);b(199);b(2);b(20);b(200);b(201);b(202);b(203);b(204);b(205);b(206);b(207);b(208);b(209);b(21);b(210);b(211);b(212);b(213);b(214);b(215);b(22);b(23);b(24);b(25);b(26);b(27);b(28);b(29);b(3);b(30);b(31);b(32);b(33);b(34);b(35);b(36);b(37);b(38);b(39);b(4);b(40);b(41);b(42);b(43);b(44);b(45);b(46);b(47);b(48);b(49);b(5);b(50);b(51);b(52);b(53);b(54);b(55);b(56);b(57);b(58);b(59);b(6);b(60);b(61);b(62);b(63);b(64);b(65);b(66);b(67);b(68);b(69);b(7);b(70);b(71);b(72);b(73);b(74);b(75);b(76);b(77);b(78);b(79);b(8);b(80);b(81);b(82);b(83);b(84);b(85);b(86);b(87);b(88);b(89);b(9);b(90);b(91);b(92);b(93);b(94);b(95);b(96);b(97);b(98);b(99);left in;left out;left stereo channel;right in;right out;right stereo channel

BLOCKTYPE:
Band-Limited White Noise.;DataTypeConversion;Delay;From;Gain;Goto;Highpass Filter;Inport;ManualSwitch;Mux;Outport;Scope;Sine Wave;SpectrumAnalyzer;Sum


MODELNAME: hdlcoder_axi_master
PATH: examples/hdlcoder/main/hdlcoder_axi_master.slx
ANNOTATION: Copyright 2017-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 4;3;1;5;2;6;3;1;1;34;4;1;40;1;2;3;1;1;1;2;1;5;1
CHECKSUM: D490E19AEBDBF7FE2FBBBD548E18AE88
PRODUCT: Fixed-Point Designer;HDL Coder Documentation;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Bus Creator;Bus Selector;Compare To Constant;Constant;DDR;DDR Read Controller;DDR Write Controller;DDR_Access_Controller;DUT;Data Type Conversion;Delay;Direct Lookup Table (n-D);EdgeDetection;Enable;Enabled Subsystem;HDL Counter;In;Input;Logical Operator;MATLAB Function;Out;Product;Rate Transition;Reference;Scope;Signal Builder;Simple Dual Port RAM;SubSystem;Sum;Switch;Terminator;Unit Delay;axim_rd_data;axim_rd_m2s;axim_rd_s2m;axim_wr_data;axim_wr_m2s;axim_wr_ready;axim_wr_s2m;burst_len;count_out;d;ddr_read_done;ddr_read_start;ddr_write_done;ddr_write_start;dma_len;dma_read_ready;dma_write_ready;e;latch;length_in;q;ram_addr;ram_rd_addr;ram_read_data;ram_wr_addr;ram_wr_data;ram_wren;rd_addr;rd_aready;rd_avalid;rd_data;rd_dvalid;rd_len;rd_ready;ready_out;rst;start;start_counter;valid_out;wr_addr;wr_len;wr_ready;wr_valid

BLOCKTYPE:
BusCreator;BusSelector;Compare To Constant;Constant;DataTypeConversion;Delay;Demux;EnablePort;HDL Counter;Inport;Logic;LookupNDDirect;Outport;Product;RateTransition;S-Function;Scope;SignalEditor;Simple Dual-port RAM;Sum;Switch;Terminator;UnitDelay


MODELNAME: hdlcoder_axi_multirate_sharing
PATH: examples/hdlcoder/main/hdlcoder_axi_multirate_sharing.slx
ANNOTATION: Copyright 2015-2018 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;4;2;1;1;2;1;12;6;6;2;1;8;1;8
CHECKSUM: 21492DE320B5BD3267F856DDC2DD0DDA
PRODUCT: HDL Coder;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Constant;DUT;Data Type Conversion;DataSource;Delay;Enable;From Workspace;In;Model Info;Out;Pulse Generator;Rate Transition;Reference;Run Demo;SubSystem;Subsystem;Terminator;a;delayed_xout;h_in;m;symmetric_fir;ud;x_in;x_in_data;x_in_valid;y_out;y_out_data;y_out_pre;y_out_valid

BLOCKTYPE:
CMBlock;Constant;DataTypeConversion;Delay;DiscretePulseGenerator;EnablePort;FromWorkspace;Inport;Outport;Product;RateTransition;Scope;Sum;Terminator;UnitDelay


MODELNAME: hdlcoder_axi_slave_bus_data_type
PATH: examples/hdlcoder/main/hdlcoder_axi_slave_bus_data_type.slx
BLOCKTYPE_FREQUENCY: 4;3;4;1;7;6;12;3;1;2;45;7;1;40;4;3;1;1;1;6;5;1;2
CHECKSUM: 69FE0147B3C6DFCAF3BC529E12A00697
PRODUCT: Fixed-Point Designer;HDL Coder Documentation;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 IP Core Generation Workflow: External Memory Access   AXI4-Lite Slave  AXI4 Master  AXI4-Lite Slave (Bus)  AXI4-Lite Slave  AXI4-Lite Slave  AXI4-Lite Slave  AXI4 Master  AXI4 Master  AXI4 Master  AXI4 Master  AXI4 Master

BLOCK:
 Demux ; SFunction ; Terminator ;Bit Slice;Bus Creator;Bus Selector;C;CC;Constant;D;DC;DDR;DDR Read Conroller;DDR Write Conroller;DDR_Access;DUT;Data Type Conversion;Data Type Prop Duplicate;Delay;EdgeDetection;Enable;HDL Counter;In;In1_row;In2_col;InputSubsystem;Internal_Memory;LO;Logical Operator;MAC;Matrix_Vector_Multiplication;Matrix_mul_top;Multiply-Add;Out;OutputSubsystem;RO;Reference;Relational Operator;Signal Builder-Simulation;Simple Dual Port RAM System;SubSystem;Subtract;Switch;Terminator;To Workspace;VEC_SIZE;Vector_RAM;acc_sw;addr_bit_sel;axim_rd_data;axim_rd_m2s;axim_rd_s2m;axim_wr_data;axim_wr_m2s;axim_wr_s2m;burst_from_ddr;burst_len;burst_start;count_out;data_val;ddr_read_done;ddr_write_done;mac_out;mat;mat_data_d;mat_data_sw;mat_in;mat_in_enb;mat_vec_sel;mat_vec_top;matrix_info;mul_out;ramRdData;ramRdVal;ram_addr;ram_rd_addr;ram_rd_data;ram_rd_val_d;ram_read_data;ram_wr_addr;ram_wr_data;ram_wr_en;ram_wren;rd_addr;rd_aready;rd_avalid;rd_dvalid;rd_len;rd_val;start;to Matlab;to_MATLAB;val;val_out ;valid_out;vec;vec_data_sw;vec_enb;vec_size;vec_wr_add;wr_addr;wr_complete;wr_len;wr_ready;wr_valid

BLOCKTYPE:
Bit Slice;BusCreator;BusSelector;Compare To Constant;Constant;DataTypeConversion;Delay;Demux;EnablePort;HDL Counter;Inport;Logic;Multiply-Add;Outport;RelationalOperator;S-Function;SignalEditor;Simple Dual-port RAM;Sum;Switch;Terminator;ToWorkspace;hdl.RAM


MODELNAME: hdlcoder_axi_video_multirate
PATH: examples/hdlcoder/main/hdlcoder_axi_video_multirate.slx
ANNOTATION: Copyright 2018-2021 The MathWorks, Inc.
BLOCKTYPE: BusSelector;Constant;DownSample;Gain;Inport;Outport;Pixel Control Bus Creator;Scope;Upsample
BLOCKTYPE_FREQUENCY: 1;4;1;2;7;8;1;3;1
CHECKSUM: 3FA9FEEAFBE5C75249DF99C972966A02
PRODUCT: DSP System Toolbox;MATLAB;Simulink;Vision HDL Toolbox
PRODUCT_BASECODE: ES;HD
BLOCK:
Constant;Downsample;Gain;Multirate_DUT;Out;Pixel Control Bus Creator;Pixel Control Bus Selector;Reference;Scope;SubSystem;Upsample;Video_Algorithm;ctrlIn;ctrlOut;pixelIn;pixelOut;readyIn;readyOut;slow;slowOut


MODELNAME: hdlcoder_blackbox_redundant_logic
PATH: examples/hdlcoder/main/hdlcoder_blackbox_redundant_logic.slx
ANNOTATION: Removed Preserved Copyright 2020 The MathWorks, Inc.
BLOCKTYPE: Constant;Display;Gain;Inport;Outport;Sum;Terminator
BLOCKTYPE_FREQUENCY: 7;1;1;5;4;8;6
CHECKSUM: CA18136D5DE5A6A42AE07FD82EC76E02
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Constant;DUT;Display;Gain;In;Out;Output;SubSystem;Subsystem;Terminator;bbx_with_connected_out;bbx_with_i;bbx_with_in;bbx_with_io;bbx_with_no_io;bbx_with_unconnected_out;no_io_subsys_bbx_with_in;sink_bbx;subsys_bbx_no_io


MODELNAME: hdlcoder_bus_nested
PATH: examples/hdlcoder/main/hdlcoder_bus_nested.slx
ANNOTATION: Copyright 2018-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 4;2;2;1;1;2;1;5;1;3;1;1;1
CHECKSUM: 6BAD10689E3801D16CB5C0C5CCBC09FA
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 CounterForParam;Bus Creator;Bus Selector;Data Type Conversion;DataOut;DataValidOut;Delay;Enable;Enabled Subsystem;HDL_DUT;In;Multiport Switch;Out;Param;Product;Reference;Scope;Sine Wave;SubSystem;data;data1_En;sin

BLOCKTYPE:
BusCreator;BusSelector;Constant;Counter Limited;DataTypeConversion;Delay;EnablePort;Inport;MultiPortSwitch;Outport;Product;Scope;Sin


MODELNAME: hdlcoder_bus_nested_assignment
PATH: examples/hdlcoder/main/hdlcoder_bus_nested_assignment.slx
ANNOTATION: Copyright 2019-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;4;2;3;1;1;2;1;5;1;3;1;1;1
CHECKSUM: A2D816956D84CBD0E33BABD1E6981ADB
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 CounterForParam;Bus Assignment;Bus Creator;Bus Selector;Data Type Conversion;DataOut;DataValidOut;Delay;Enable;Enabled Subsystem;HDL_DUT;In;Multiport Switch;Out;Param;Product;Reference;Scope;Sine Wave;SubSystem;data;data1_En;sin

BLOCKTYPE:
BusAssignment;BusCreator;BusSelector;Constant;Counter Limited;DataTypeConversion;Delay;EnablePort;Inport;MultiPortSwitch;Outport;Product;Scope;Sin


MODELNAME: hdlcoder_bus_nested_simplified
PATH: examples/hdlcoder/main/hdlcoder_bus_nested_simplified.slx
ANNOTATION: Copyright 2019-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 2;1;1;2;1;15;1;11;1;1;1
CHECKSUM: 7A1E856E64BA4E758D35BA3B2908FF10
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 CounterForParam;<data1_En>;Bus_Creator_Subsystem;Bus_Selection_Subsystem;Data Type Conversion;DataOut;DataValidOut;Delay;Enable;Enabled Subsystem;HDL_DUT;In Bus Element;Multiport Switch;Out;Out Bus Element;Param;Product;Reference;Scope;Sine Wave;SubSystem;data;data1_En;sin

BLOCKTYPE:
Constant;Counter Limited;DataTypeConversion;Delay;EnablePort;Inport;MultiPortSwitch;Outport;Product;Scope;Sin


MODELNAME: hdlcoder_chart_datatype_casting
PATH: examples/hdlcoder/main/hdlcoder_chart_datatype_casting.slx
ANNOTATION: Copyright 2020 The MathWorks, Inc.
BLOCKTYPE: DataTypeConversion;Demux;DiscretePulseGenerator;Inport;Outport;S-Function;Scope;Terminator
BLOCKTYPE_FREQUENCY: 1;1;1;2;4;1;1;1
CHECKSUM: 02CFCF506CA50B5C2580660435F04BBE
PRODUCT: Fixed-Point Designer;MATLAB;Simulink;Stateflow
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Chart;DUT;Data Type Conversion;In;Out;Pulse Generator;Scope;SubSystem;in;out


MODELNAME: hdlcoder_chart_ifnelsecond
PATH: examples/hdlcoder/main/hdlcoder_chart_ifnelsecond.slx
ANNOTATION: Copyright 2019 The MathWorks, Inc.
BLOCKTYPE: DataTypeConversion;Demux;Inport;Outport;S-Function;Scope;Sin;Terminator
BLOCKTYPE_FREQUENCY: 1;2;3;4;2;1;1;2
CHECKSUM: D929CA21742AE91ECDD4CD0A1C205894
PRODUCT: MATLAB;Simulink;Stateflow
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Data Type Conversion;In;Out;Scope;Sine Wave;SubSystem;dut_chart;ifnelse_chart;in;onlyif_chart;out


MODELNAME: hdlcoder_clockdemo
PATH: examples/hdlcoder/main/hdlcoder_clockdemo.slx
ANNOTATION: Copyright 2011-2012 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;2;1;2;1;2;4;2;1;1;1
CHECKSUM: 4950DDF9EEAB0E00810EC6B69142575A
PRODUCT: DSP System Toolbox;MATLAB;Signal Processing Toolbox;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Chirp Signal;CombSum;DUT;Data Type Conversion;Input;Input_data;IntSum;Integer Delay;Output;Rate Transition;Reference;Scope;SubSystem;Unit Delay;Up Sample;Zero-Order Hold

BLOCKTYPE:
DataTypeConversion;Delay;Inport;Outport;RateTransition;Scope;Sum;UnitDelay;Upsample;ZeroOrderHold;chirp


MODELNAME: hdlcoder_comment_through_out
PATH: examples/hdlcoder/main/hdlcoder_comment_through_out.slx
BLOCKTYPE: DataTypeConversion;DataTypeDuplicate;Delay;Gain;Inport;Math;Outport;Repeating Sequence Stair;Scope
BLOCKTYPE_FREQUENCY: 16;8;2;2;10;8;12;1;2
CHECKSUM: EA972FCC884FA6BAA672774CDE98EA7C
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Unsupported Block Unsupported Block Unsupported Block Unsupported Block HDL Block Property = BlackBox Unsupported Block Unsupported Block Unsupported Block Unsupported Block HDL Block Property = BlackBox

BLOCK:
BlackBoxSub;DT Conv;DUT_CommentOut;DUT_CommentThrough;Data Type Duplicate;Delay;Gain;Generated_CommentOut;Generated_CommentThrough;In;Math Function;NotGenerated;Out;Reference;Repeating Sequence Stair;Scope;SubSystem


MODELNAME: hdlcoder_constant_simplification
PATH: examples/hdlcoder/main/hdlcoder_constant_simplification.slx
BLOCKTYPE: Constant;Math;Outport;Product;Sum;Trigonometry
BLOCKTYPE_FREQUENCY: 20;6;34;3;1;6
CHECKSUM: E7C65377ECCAD7ADA51F221C27672B20
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Math Functions Exponential and pow functions Transpose and conjugate functions Trigonometric Functions Basic sin and cos functions Arctangent and Hyperbolic functions Copyright 2019-2021 The MathWorks, Inc.

BLOCK:
Basic Math Operations;Constant;Cos+jSin;Divide;Math Function;Math Functions;Out;Product;Product of Elements;SubSystem;Sum of Elements;Trigonometric Function;Trigonometric Functions


MODELNAME: hdlcoder_constant_subsystem_boundary
PATH: examples/hdlcoder/main/hdlcoder_constant_subsystem_boundary.slx
ANNOTATION: Copyright 2018-2021 The MathWorks, Inc.
BLOCKTYPE: Constant;Counter Free-Running;DataTypeConversion;FloatTypecast;Gain;Inport;Outport;Scope;Sum
BLOCKTYPE_FREQUENCY: 4;1;1;1;1;5;5;1;4
CHECKSUM: A002F6C48455527CF35CBB34C9966353
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Constant;Constant_subsys;Counter Free-Running;DUT;Data Type Conversion;Float Typecast;Gain;In;Out;Reference;Scope;SubSystem;Subsystem;out


MODELNAME: hdlcoder_data_capture
PATH: examples/hdlcoder/main/hdlcoder_data_capture.slx
BLOCKTYPE_FREQUENCY: 1;5;1;1;2;1;1;1;2;32;1;2;18;2;1;3;1
CHECKSUM: 055F695A5B0CB158149BE7E51998AAC6
PRODUCT: HDL Coder;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Add More Debug_FIFO blocks here if you need to buffer up more than one signal value at a time DUT can also control these signals using state machine Copyright 2012-2014 The MathWorks, Inc. Data Capture In FPGA FIFONumber shows how many data elements are in the FIFO control from processor control from processor control from processor Direct data output FIFO captureddata FIFO captureddata

BLOCK:
 Demux ; SFunction ; Terminator ;CapturedDataOut;Constant;Data Type Conversion;DataCapture;DataIn;DataOut;Debug_FIFO;Debug_FIFOs;Delay;DetectChange;DirectDataOut;Display;EnableCapture;EnableFIFO;EnableRead;FIFONumber;FIFO_Controller;FifoNum;HDL Counter;HDL FIFO;In;Logical Operator;Model Info;OriginalDUT;Out;PopFIFO;Pulse Generator;PushFIFO;Reference;RetrieveData;Run Demo;SubSystem;Terminator;Time Scope;Trigonometric Function;enableFIFO;enableRead;fifo_empty;fifo_full;fifo_pop;fifo_push;popFIFO;pushFIFO

BLOCKTYPE:
CMBlock;Constant;DataTypeConversion;Delay;Demux;DiscretePulseGenerator;Display;HDL Counter;HDL_FIFO;Inport;Logic;ManualSwitch;Outport;S-Function;Scope;Terminator;Trigonometry


MODELNAME: hdlcoder_dfir_sharing_singlerate
PATH: examples/hdlcoder/main/hdlcoder_dfir_sharing_singlerate.slx
ANNOTATION: Real Input ,Complex Coeff Complex Coeff Real Coeff Copyright 2017 The MathWorks, Inc.
BLOCKTYPE: DataTypeConversion;DiscreteFir;Inport;Mux;Outport;RealImagToComplex;Repeating Sequence Stair
BLOCKTYPE_FREQUENCY: 2;5;4;1;10;1;1
CHECKSUM: 70A37B11813BF298113C3F633D77F8AE
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
DUT;Data Type Conversion;Discrete FIR Filter;In;Mux;Out;Real-Imag to Complex;Reference;Repeating Sequence Stair;SubSystem


MODELNAME: hdlcoder_distpipe_multiplier_chain
PATH: examples/hdlcoder/main/hdlcoder_distpipe_multiplier_chain.slx
ANNOTATION: Copyright 2019-2023 The MathWorks, Inc.
BLOCKTYPE: Counter Free-Running;DataTypeConversion;Demux;Inport;Outport;S-Function;Scope;Terminator;UnitDelay
BLOCKTYPE_FREQUENCY: 8;8;1;16;2;1;1;1;9
CHECKSUM: 20ED03AA1359B8524CCB1D4E41FBB5B9
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Counter Free-Running;Data Type Conversion;HDL_DUT;In;Out;Reference;Scope;SubSystem;Unit Delay;mult_chain;x;y


MODELNAME: hdlcoder_distributed_pipelining_soe
PATH: examples/hdlcoder/main/hdlcoder_distributed_pipelining_soe.slx
ANNOTATION: Copyright 2018-2021 The MathWorks, Inc.
BLOCKTYPE: DataTypeConversion;Delay;Inport;Mux;Outport;Scope;Sum;ZeroOrderHold;chirp
BLOCKTYPE_FREQUENCY: 1;9;2;1;2;1;1;1;1
CHECKSUM: 17946CA75B47AC1CF2F790187CD857CB
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Chirp Signal;DUT;Data Type Conversion;Delay;Delay_pipe;In;Mux;Out;Reference;Scope;SubSystem;Zero-Order Hold


MODELNAME: hdlcoder_dual_rate_dual_port_RAM
PATH: examples/hdlcoder/main/hdlcoder_dual_rate_dual_port_RAM.slx
ANNOTATION: Copyright 2018-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 2;1;1;4;1;5;2;4;1;3
CHECKSUM: 3B7DA6DED3835C8642D03BCD430DEE59
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Constant;DUT;Delay;Dual Rate Dual Port RAM;HDL Counter;In;Out;Probe;Rate Transition;Reference;Scope;SubSystem;Terminator

BLOCKTYPE:
Constant;Delay;Dual-rate dual-port RAM;HDL Counter;Inport;Outport;Probe;RateTransition;Scope;Terminator


MODELNAME: hdlcoder_external_memory
PATH: examples/hdlcoder/main/hdlcoder_external_memory.slx
BLOCKTYPE_FREQUENCY: 4;2;3;1;1;7;6;12;3;1;2;47;7;1;42;4;3;1;1;1;6;5;1;2
CHECKSUM: 8BF4C7711D715929DF3045E8AC2C0D8B
PRODUCT: Fixed-Point Designer;HDL Coder;HDL Coder Documentation;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 Using IP Core Generation Workflow: External Memory Access   AXI4-Lite Slave  AXI4 Master  AXI4-Lite Slave  AXI4-Lite Slave  AXI4-Lite Slave  AXI4-Lite Slave  AXI4-Lite Slave  AXI4-Lite Slave  AXI4 Master  AXI4 Master  AXI4 Master  AXI4 Master  AXI4 Master Copyright 2017 The MathWorks, Inc.

BLOCK:
 Demux ; SFunction ; Terminator ;Bit Slice;Bus Creator;Bus Selector;C;CC;Constant;D;DC;DDR;DDR Read Conroller;DDR Write Conroller;DDR_Access;DUT;Data Type Conversion;Data Type Prop Duplicate;Delay;EdgeDetection;Enable;HDL Counter;In;In1_row;In2_col;InputSubsystem;Internal_Memory;LO;Logical Operator;MAC;Matrix_Vector_Multiplication;Matrix_mul_top;Model Info;Multiply-Add;Out;OutputSubsystem;RO;Reference;Relational Operator;Run Demo;Signal Builder-Simulation;Simple Dual Port RAM System;SubSystem;Subtract;Switch;Terminator;To Workspace;VEC_SIZE;Vector_RAM;acc_sw;addr_bit_sel;axim_rd_data;axim_rd_m2s;axim_rd_s2m;axim_wr_data;axim_wr_m2s;axim_wr_s2m;burst_from_ddr;burst_len;burst_start;count_out;data_val;ddr_read_done;ddr_write_done;mac_out;mat;mat_data_d;mat_data_sw;mat_in;mat_in_enb;mat_vec_sel;mat_vec_top;matrix_mul_on;matrix_size;mul_out;ramRdData;ramRdVal;ram_addr;ram_rd_addr;ram_rd_data;ram_rd_val_d;ram_read_data;ram_wr_addr;ram_wr_data;ram_wr_en;ram_wren;rd_addr;rd_aready;rd_avalid;rd_dvalid;rd_len;rd_val;start;to Matlab;to_MATLAB;val;val_out ;valid_out;vec;vec_data_sw;vec_enb;vec_size;vec_wr_add;wr_addr;wr_complete;wr_len;wr_ready;wr_valid

BLOCKTYPE:
Bit Slice;BusCreator;BusSelector;CMBlock;Compare To Constant;Constant;DataTypeConversion;Delay;Demux;EnablePort;HDL Counter;Inport;Logic;Multiply-Add;Outport;RelationalOperator;S-Function;SignalEditor;Simple Dual-port RAM;Sum;Switch;Terminator;ToWorkspace;hdl.RAM


MODELNAME: hdlcoder_float_typecast_example
PATH: examples/hdlcoder/main/hdlcoder_float_typecast_example.slx
BLOCKTYPE: Bit Concat;Bit Slice;Constant;Display;FloatTypecast;Inport;Outport;Sum
BLOCKTYPE_FREQUENCY: 1;3;2;8;2;1;1;1
CHECKSUM: 7B34AE91F719439EDF3F70B5FA193D44
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 Adding 1 to exponent multiplies original value by 2. Extract sign, exponent and mantissa from IEEE-754 Single-Precision value Modify exponent, concatenate components, and typecast bits back to single data type Copyright 2020 The MathWorks, Inc.

BLOCK:
Add;Bit Concat;Constant;Display;Exponent;Exponent + ;Extract Exponent;Extract Mantissa;Extract Sign;Float Typecast;HDL_DUT;In;Mantissa;Out;Reference;Sign;SubSystem


MODELNAME: hdlcoder_foreach_cordic
PATH: examples/hdlcoder/main/hdlcoder_foreach_cordic.slx
BLOCKTYPE_FREQUENCY: 1;2;1;1;1;6;2;1;1;1;9;1;1;2;10;2;1;3;1;2;1
CHECKSUM: 0CEF10EC6069FFDE9E3A6CF30AD008A9
PRODUCT: Control System Toolbox;Fixed-Point Designer;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 Gain value is hard coded to 18-bit for optimal FPGA DSP mapping. This is different than cordicsqrt.m, where gain value and input use the same WL.  Copyrights 2019-2022 The MathWorks, Inc.   Copyrights 2019-2022 The MathWorks, Inc. 

BLOCK:
 Demux ; SFunction ; Terminator ;AND;Compare To Constant;Constant;Data Source;Data Type Conversion;Data Type Duplicate;Delay;Direct Lookup Table (n-D);For Each;For Each Cordic Sqrt;For Each Subsystem;Gain;HDL Counter;MATLAB Function;Mux;Reference;Scope;Selector;Stop Simulation;SubSystem;Uniform Random Number;data;din;dout;idx;last x;v;valid;vin;vout;x;xi;xo;y;yi;yo

BLOCKTYPE:
CORDIC Sqrt;Compare To Constant;Constant;DataTypeConversion;DataTypeDuplicate;Delay;Demux;ForEach;Gain;HDL Counter;Inport;Logic;LookupNDDirect;Mux;Outport;S-Function;Scope;Selector;Stop;Terminator;UniformRandomNumber


MODELNAME: hdlcoder_frame_video_edge
PATH: examples/hdlcoder/main/hdlcoder_frame_video_edge.slx
ANNOTATION: RGB represented in 32hFFRRGGBB Edge Detection and Image Overlay on Live Video
BLOCKTYPE_FREQUENCY: 1;6;3;1;1;6;11;5;3;1;3;1;1
CHECKSUM: 710B0FB146951269595FBA41D70F63A8
PRODUCT: Computer Vision Toolbox;Fixed-Point Designer;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Add;B;Bit Concat;Bit Slice;EdgeAndOverlay;EdgeDUT;FF;G;ImageIn;IntensityCalculator;IntensityOut;Multiply;Overlay;Overlay and Edges;OverlayIntensity;R;RGB32Bits;RGBDecoding;RGBEncoding;RGBIn;Reference;Resize;SubSystem;Video Source;cAlpha;cThreshold

BLOCKTYPE:
Bit Concat;Bit Slice;Constant;Demux;From Multimedia File;Gain;Inport;Outport;Resize;S-Function;Sum;Terminator;VideoViewer


MODELNAME: hdlcoder_led_blinking
PATH: examples/hdlcoder/main/hdlcoder_led_blinking.slx
BLOCKTYPE_FREQUENCY: 1;3;2;2;1;1;2;1;2;1
CHECKSUM: B3FEA71715FDDEF7AB5D11AD2FBBA8EB
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Output only the 4 MSB of the counter control from processor Copyright 2014-2023 The MathWorks, Inc. control from processor connect to LED pins read back to processor

BLOCK:
1-D Lookup Table;Bit Slice;Blink_direction;Blink_frequency;Constant;HDL Counter;LED;Manual Switch;Read_back;Reference;Relational Operator;Scope;Slider Gain;SubSystem;led_counter

BLOCKTYPE:
Bit Slice;Constant;HDL Counter;Inport;Lookup_n-D;ManualSwitch;Outport;RelationalOperator;Scope;Slider Gain


MODELNAME: hdlcoder_led_blinking_data_capture
PATH: examples/hdlcoder/main/hdlcoder_led_blinking_data_capture.slx
BLOCKTYPE_FREQUENCY: 1;3;2;2;1;1;2;1;2;1
CHECKSUM: 787499C685FA4B5883B15B852F8C8853
PRODUCT: HDL Coder;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
control from processor Copyright 2018 The MathWorks, Inc. Using IP Core Generation Workflow: LED Blinking control from processor connect to LED pins read back to processor

BLOCK:
1-D Lookup Table;Blink_direction;Blink_frequency;Constant;HDL Counter;LED;Manual Switch;Model Info;Read_back;Reference;Relational Operator;Run Demo;Scope;Slider Gain;SubSystem;led_counter

BLOCKTYPE:
CMBlock;Constant;HDL Counter;Inport;Lookup_n-D;ManualSwitch;Outport;RelationalOperator;Scope;Slider Gain


MODELNAME: hdlcoder_led_vector
PATH: examples/hdlcoder/main/hdlcoder_led_vector.slx
ANNOTATION: Copyright 2016 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;3;7;3;2;1;1;9;1;2;1
CHECKSUM: 68BE4E35202DF1F75FEB99F0D8AC0AEA
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
1-D Lookup Table;Blink_direction;Blink_frequency;Constant;DUT;Display;HDL Counter;LED;Manual Switch;Read_back;Reference;Relational Operator;Scope;Slider Gain;SubSystem;Vector Concatenate;count;vec_count

BLOCKTYPE:
Concatenate;Constant;Display;HDL Counter;Inport;Lookup_n-D;ManualSwitch;Outport;RelationalOperator;Scope;Slider Gain


MODELNAME: hdlcoder_localdelaybalancing
PATH: examples/hdlcoder/main/hdlcoder_localdelaybalancing.slx
ANNOTATION: Copyright 2013-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 6;2;1;1;1;24;1;1;14;4;1;1;7;1;8
CHECKSUM: 7E33DF91169C6BA67EF7D3ABC5092995
PRODUCT: Fixed-Point Designer;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Add;And;Constant;Data Type Conversion;From Workspace;In;Manual Switch;Product;Pulse Generator;SubSystem;Subsystem;Unit Delay;dealyed_x_out;delayed_x_out;h;h_In;h_in;param_control;params;select;symmetric_fir;u;valid_in;valid_out;x_in;y_out

BLOCKTYPE:
Constant;DataTypeConversion;Demux;DiscretePulseGenerator;FromWorkspace;Inport;Logic;ManualSwitch;Outport;Product;S-Function;Scope;Sum;Terminator;UnitDelay


MODELNAME: hdlcoder_logical_bitwise_operations
PATH: examples/hdlcoder/main/hdlcoder_logical_bitwise_operations.slx
ANNOTATION: Copyright 2018-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;1;1;2;8;1;9;9;5;10;1;1
CHECKSUM: 56F4796277432BA87B5DA4C67BD5A650
PRODUCT: Fixed-Point Designer;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Bit Clear;Bit Reduce;Bit Set;Bitwise Operations;Bitwise Operator;Constant;Display;In;Logical Operations;Logical Operator;Out;Reduction Operations;Reference;SubSystem;binData;convert bin2vec;vecData

BLOCKTYPE:
Bit Clear;Bit Reduce;Bit Set;Bitwise Operator;Constant;Demux;Display;Inport;Logic;Outport;S-Function;Terminator


MODELNAME: hdlcoder_multi_clock_domain
PATH: examples/hdlcoder/main/hdlcoder_multi_clock_domain.slx
BLOCKTYPE: Delay;DocBlock;Gain;Inport;Outport;RateTransition;Repeating Sequence Stair;Scope;Terminator
BLOCKTYPE_FREQUENCY: 8;2;3;3;3;2;1;1;1
CHECKSUM: 385D42B9369A083B6629CCBC71287CF3
PRODUCT: HDL Coder;MATLAB;Signal Processing Toolbox;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Sample rate = 250MHz  DataVectPassThrough_vlog is a BlackBox Subsystem with DocBlock included for Verilog code generation. You can use DataVectPassthrough_vhd for VHDL code generation. Sample rate = 245.76MHz  Copyright 2018-2021 The MathWorks, Inc.

BLOCK:
DUT;DataVectPassthrough_vhd;DataVectPassthrough_vlog;Data_i;Data_o;FF3_;FF4_;FF4_Sync;FF_in;FF_out;Gain;Input;Output;Rate Transition;Reference;Repeating Sequence Stair;SubSystem;Terminator;Time Scope;VHDLImpl;VerilogImpl


MODELNAME: hdlcoder_multi_cycle_path_constraints
PATH: examples/hdlcoder/main/hdlcoder_multi_cycle_path_constraints.slx
ANNOTATION: Copyright 2017-2023 The MathWorks, Inc.
BLOCKTYPE: Constant;DataTypeConversion;Delay;Inport;Mux;Outport;Product;RandomNumber;Scope;Selector;Sum
BLOCKTYPE_FREQUENCY: 1;2;11;4;1;2;9;1;1;18;8
CHECKSUM: 33E89FD57DC8F13669133E6037A37554
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Constant;Data Type Conversion;Delay;Dot Product;In;Mux;Out;Product;Random Number;Scope;Selector;SubSystem;Subsystem


MODELNAME: hdlcoder_multiclock
PATH: examples/hdlcoder/main/hdlcoder_multiclock.slx
ANNOTATION: Ts = 1/1000 Ts = 3/1000 Ts = 1/1000 Copyright 2018-2021 The MathWorks, Inc.
BLOCKTYPE: Delay;Gain;Inport;Outport;RateTransition;Repeating Sequence Stair;Scope
BLOCKTYPE_FREQUENCY: 3;2;1;2;2;1;1
CHECKSUM: 08047CF240EE137FE7A34831B52ECA02
PRODUCT: MATLAB;Signal Processing Toolbox;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
DUT;Gain;Input;Output;Rate Transition;Reference;Repeating Sequence Sta ir;Scope;SubSystem;delay_in;delay_out


MODELNAME: hdlcoder_multiplier_adder_dsp
PATH: examples/hdlcoder/main/hdlcoder_multiplier_adder_dsp.slx
ANNOTATION: Copyright 2014-2019 The MathWorks, Inc.
BLOCKTYPE: Delay;Inport;Multiply-Accumulate;Multiply-Add;Outport;Product;Sum;Terminator
BLOCKTYPE_FREQUENCY: 16;26;1;1;4;2;4;4
CHECKSUM: 4982305819E60D9C6BF196E17842F37B
PRODUCT: MATLAB;Signal Processing Toolbox;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
DSP_MultAcc;DSP_MultAdd;DSP_subsys;Delay;In;Multiply-Accumulate;Multiply-Add;Out;Output;Reference;SubSystem;Terminator_;add;inA;inB;inC;inD;mult


MODELNAME: hdlcoder_multiport_switch_enum
PATH: examples/hdlcoder/main/hdlcoder_multiport_switch_enum.slx
ANNOTATION: Copyright 2020 The MathWorks, Inc.
BLOCKTYPE: Constant;Display;Enumerated Constant;Inport;MultiPortSwitch;Outport;Repeating Sequence Stair;Scope
BLOCKTYPE_FREQUENCY: 3;2;3;1;2;1;1;2
CHECKSUM: 999E1A50291A740A4EC6166FEF4C5F5F
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Constant;DUT;Display;Enumerated Constant;In;Multiport Switch;Out;Reference;Repeating Sequence Stair;Scope;SubSystem


MODELNAME: hdlcoder_multiport_switch_numeric
PATH: examples/hdlcoder/main/hdlcoder_multiport_switch_numeric.slx
ANNOTATION: Copyright 2020 The MathWorks, Inc.
BLOCKTYPE: Counter Limited;DataTypeConversion;Inport;MultiPortSwitch;Mux;Outport;Scope
BLOCKTYPE_FREQUENCY: 5;1;5;2;1;2;1
CHECKSUM: A45A1DBEBCDD57AA35115153AE6BB163
PRODUCT: Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Counter Index;Counter Limited;DUT;Data Type Conversion;Datain;Dataout;Index;Index Vector;Multiport Switch;Mux;Reference;Show Processing Time;SubSystem


MODELNAME: hdlcoder_multirate_delaybalancing
PATH: examples/hdlcoder/main/hdlcoder_multirate_delaybalancing.slx
ANNOTATION: Copyright 2017-2021 The MathWorks, Inc.
BLOCKTYPE: Constant;Delay;Display;Gain;Inport;Outport
BLOCKTYPE_FREQUENCY: 4;6;6;3;3;6
CHECKSUM: 799A2452C2F51BEADBE3B2A502976021
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Constant;Delay;Display;Gain;In;Out;SubSystem;hdlcoder_multirate_high_differential;hdlcoder_multirate_medium_differential;hdlcoder_singlerate


MODELNAME: hdlcoder_protected_model_parent_harness
PATH: examples/hdlcoder/main/hdlcoder_protected_model_parent_harness.slx
ANNOTATION: Copyright 2018-2023 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;2;1;2;1;6;1;1;1
CHECKSUM: EC04EE45D09C4A88DFE59EF440652EEB
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
EXTERNALFILE_REFERENCE: hdlcoder_referenced_model_gain.slx___Model_Block___
BLOCK:
Add;Counter Free-Running;DUT;Data Type Conversion;Delay;In;Out;RIC;Rate Transition;Reference;SubSystem;Subsystem;mynested

BLOCKTYPE:
Counter Free-Running;DataTypeConversion;Delay;Inport;ModelReference;Outport;RateTransition;RealImagToComplex;Sum


MODELNAME: hdlcoder_radio_loopback
PATH: examples/hdlcoder/main/hdlcoder_radio_loopback.slx
BLOCKTYPE_FREQUENCY: 2;1;3;2;1;2;12;6;25;1;2;3;3;3;33;7;2;1;25;4;1;1;1;1;2;1;1;2;13;3
CHECKSUM: 7C365E946CD84E34A7CC48641B3D7E88
PRODUCT: DSP System Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
SR AND - OR Latch Ignore any Backpressure exerted on DUT Generate new Valid signal Compute power of received signal Compute power of transmitted signal SR AND - OR Latch Select to transmit ramp or data stored in RAM Reset counter before and after loading new data Tx trigger  Tx RAM controller Dont apply backpressure to the RF Front End Shift left to prepare for 16-bit to 12-bit MSB interface at DAC Tx and Rx hardware algorithms Simulate model control Display simulation results Load Tx Data to RAM  HW/SW Co-Design AXI4-Stream Radio Loopback Hardware Generation Model Copyright 2023 The MathWorks, Inc.

BLOCK:
AND;AXI4S_Data_In;AXI4S_Data_Out;AXI4S_Tready_In;AXI4S_Tready_Out;AXI4S_Valid_In;AXI4S_Valid_Out;AXIS_txData;AXIS_txWrite;Add;Bit Concat;Bit Shift;Bit Slice;Cast;Cast To Boolean;Compare To Constant;Complex to Real-Imag;Constant;Data Type Conversion;DataIn;Delay;Detect Change;Detect Increase;From;Goto;HDL Counter;HDL_DUT;In;Max Tx Count;MaxTxCount;Multiport Switch;Mux;NOT;OR;Out;Product;Q;R;Real-Imag to Complex;Reference;Relational Operator;Rx;Rx1_Data_I_In;Rx1_Data_I_Out;Rx1_Data_Q_In;Rx1_Data_Q_Out;Rx2_Data_I_In;Rx2_Data_I_Out;Rx2_Data_Q_In;Rx2_Data_Q_Out;Rx_Data_In;Rx_Data_P;Rx_Tready_In;Rx_Valid_In;Rx_Valid_Out;S;SR-Latch;Scope;Serializer1D;Shift Arithmetic;Simple Dual Port RAM;Simulate 12-to-16bit ADC interface;Simulate 16-to-12bit DAC interface;Step;SubSystem;Terminator;Tx;Tx Data;Tx Select;Tx Start;Tx1_Data_I_In;Tx1_Data_I_Out;Tx1_Data_Q_In;Tx1_Data_Q_Out;Tx_Data_In;Tx_Data_Out;Tx_Data_P;Tx_Tready_Out;Tx_Valid_In;Tx_Valid_Out;Unit Delay;Valid_Out;Write Tx Data;maxTxCount;txSEL;txSel;txStart

BLOCKTYPE:
ArithShift;Bit Concat;Bit Shift;Bit Slice;Compare To Constant;ComplexToRealImag;Constant;DataTypeConversion;Delay;Detect Change;Detect Increase;From;Goto;HDL Counter;Inport;Logic;MultiPortSwitch;Mux;Outport;Product;RealImagToComplex;RelationalOperator;Scope;Serializer1D;Signal From Workspace;Simple Dual-port RAM;Step;Sum;Terminator;UnitDelay


MODELNAME: hdlcoder_remove_redundant_logic
PATH: examples/hdlcoder/main/hdlcoder_remove_redundant_logic.slx
ANNOTATION: Copyright 2020 The MathWorks, Inc.
BLOCKTYPE: Constant;DataTypeConversion;Delay;Display;EnablePort;Inport;Outport;Switch
BLOCKTYPE_FREQUENCY: 3;1;1;1;1;1;4;1
CHECKSUM: 67983ACA7E86F0DF33AF42346346E86D
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Constant;DUT;Data Type Conversion;Delay One Step;Display;Enable;Enabled Subsystem_;In;Out;SubSystem;Subsystem_;Switch


MODELNAME: hdlcoder_resettable_subsystem
PATH: examples/hdlcoder/main/hdlcoder_resettable_subsystem.slx
ANNOTATION: Copyright 2016, The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 3;4;1;1;1;1;1;8;5;1;1;1;1;1;1;1;1
CHECKSUM: C92D229893ED18292061BE40AC153670
PRODUCT: Fixed-Point Designer;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Counter Limited;DUT;Data Type Conversion;Delay;Discrete FIR Filter;Gain;In;LocalReset;MATLAB Delay Fcn;Out;Product;Pulse Generator;Reference;Relational Operator;Resettable Subsystem;Scope;State Control;SubSystem;Sum;u;y

BLOCKTYPE:
Counter Limited;DataTypeConversion;Delay;Demux;DiscreteFir;DiscretePulseGenerator;Gain;Inport;Outport;Product;RelationalOperator;ResetPort;S-Function;Scope;StateControl;Sum;Terminator


MODELNAME: hdlcoder_scale_amplitude
PATH: examples/hdlcoder/main/hdlcoder_scale_amplitude.slx
ANNOTATION: Copyright 2020-2021 The MathWorks, Inc.
BLOCKTYPE: Constant;DataTypeConversion;EnablePort;Inport;Outport;Product;Scope;Sin
BLOCKTYPE_FREQUENCY: 2;1;1;5;3;1;1;1
CHECKSUM: E2D1CBBE475EF3DA2CA6DE3385B6879D
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Constant;DUT;Data Type Conversion;Enable;Product;Sine Wave;SubSystem;amplitude;scale_input;x_in;x_in_data;x_in_valid;y_out;y_out_data;y_out_valid


MODELNAME: hdlcoder_sfir_fixed_stream
PATH: examples/hdlcoder/main/hdlcoder_sfir_fixed_stream.slx
ANNOTATION: Copyright 2015-2023 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 4;2;1;2;1;11;5;4;1;7;1;8
CHECKSUM: E5B7A356EE359C187ADDDBE3AF3BEAF2
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Constant;DUT;Data Type Conversion;DataSource;Enable;From Workspace;Out;Pulse Generator;SubSystem;Terminator;a;delayed_xout;h_in;m;symmetric_fir;ud;x_in;x_in_data;x_in_valid;y_out;y_out_data;y_out_pre;y_out_valid

BLOCKTYPE:
Constant;DataTypeConversion;DiscretePulseGenerator;EnablePort;FromWorkspace;Inport;Outport;Product;Scope;Sum;Terminator;UnitDelay


MODELNAME: hdlcoder_sfir_fixed_stream_sw
PATH: examples/hdlcoder/main/hdlcoder_sfir_fixed_stream_sw.slx
ANNOTATION: Generated by HDL Workflow Advisor on 23-May-2016 18:26:12 Copyright 2015-2023 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 4;1;4;11;1;4;17;1;6;2;1;6;1;1
CHECKSUM: E17AE41A7C74E320EF21A487A0A4AE14
PRODUCT_BASECODE: ES;HD
BLOCK:
AXI4-Stream IIO Read;AXI4-Stream IIO Write;AXI4LiteRead;AXI4LiteWrite;AXI4Lite_Write_h_in;AXI4Lite_Write_h_in1_DTC;AXI4Lite_Write_h_in2_DTC;AXI4Lite_Write_h_in3_DTC;AXI4Lite_Write_h_in4_DTC;AXI4Reset;AXI4ResetModelSource;AXI_Read_y_out_DTC;AXI_Write_x_in_DTC;Constant;DUT;Data Type Conversion;DataSourceVector;EXTERNALPORT_x_in_data;EXTERNALPORT_x_in_data_DTC;EXTERNALPORT_x_in_valid;EXTERNALPORT_x_in_valid_DTC;EXTERNALPORT_y_out_data_DTC;EXTERNALPORT_y_out_valid_DTC;From Workspace;GROUND_y_out_data;GROUND_y_out_valid;Ground;In;Interface;Out;Reference;Scope;SubSystem;Terminator;h_in;x_in_data;x_in_data_vector;x_in_valid;y_out;y_out_data;y_out_data_vector;y_out_valid

BLOCKTYPE:
AXI4-Interface Write;AXI4-Lite/AXI4 Interface;Constant;DataTypeConversion;FromWorkspace;Ground;Inport;Model Source;Outport;Scope;System Initialize;Terminator;matlabshared.libiio.axistream.read;matlabshared.libiio.axistream.write

PRODUCT:
Embedded Coder;Embedded Coder Support Package for Xilinx Zynq Platform;MATLAB;Simulink;SoC Blockset Support Package for Xilinx Devices


MODELNAME: hdlcoder_sfir_fixed_vector
PATH: examples/hdlcoder/main/hdlcoder_sfir_fixed_vector.slx
ANNOTATION: Copyright 2014-2023 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 4;1;1;1;1;10;4;4;4;2;2;7;1;8
CHECKSUM: B509173722EF6D6B102BB41126717F8C
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Constant;DUT;Data Type Conversion;Deserializer1D;Enable;From Workspace;Out;Rate Transition;Reference;Serializer1D;SubSystem;Terminator;VectorDataSource;a;delayed_xout;h_in;m;symmetric_fir;ud;x_in;y_out;y_out_pre;y_out_stream;y_out_vector

BLOCKTYPE:
Constant;DataTypeConversion;Deserializer1D;EnablePort;FromWorkspace;Inport;Outport;Product;RateTransition;Scope;Serializer1D;Sum;Terminator;UnitDelay


MODELNAME: hdlcoder_simple_up_counter
PATH: examples/hdlcoder/main/hdlcoder_simple_up_counter.slx
BLOCK: Add;Constant;Delay;Enable;HDL_DUT;Relational Operator;Scope;SubSystem;Switch;count_threshold;out
BLOCKTYPE: Constant;Delay;Inport;Outport;RelationalOperator;Scope;Sum;Switch
BLOCKTYPE_FREQUENCY: 4;2;2;1;1;1;1;2
CHECKSUM: 99C3F7B3848134176FF6B7193474C8F7
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 Note: This model is configured with hdlsetup  Add your design targeted for ASIC/FPGA inside HDL_DUT and then run the following command: makehdl(HDL_DUT) Copyright 2018-2021 The MathWorks, Inc.


MODELNAME: hdlcoder_sincos_cordic_optimization
PATH: examples/hdlcoder/main/hdlcoder_sincos_cordic_optimization.slx
ANNOTATION: Copyright 2020-2021 The MathWorks, Inc.
BLOCKTYPE: DataTypeConversion;Delay;Inport;Outport;Scope;Sum;Trigonometry;ZeroOrderHold;chirp
BLOCKTYPE_FREQUENCY: 2;6;2;3;1;1;6;1;1
CHECKSUM: A5DC75791F699B3C16355AF2DA58EC51
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Chirp Signal;Data Type Conversion;Delay;Delay_adj;HDL_DUT;In;Out;Reference;Scope;SubSystem;Trigonometric Function;Zero-Order Hold


MODELNAME: hdlcoder_sincos_cordic_optimization_validation
PATH: examples/hdlcoder/main/hdlcoder_sincos_cordic_optimization_validation.slx
ANNOTATION: Copyright 2020-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 3;3;6;3;2;21;5;5;22;16;6;4;1;6;9;1;1
CHECKSUM: ACBED9E33B80A7B3E5D66C68EA4117B7
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;AssertEq;Assert_Out;Chirp Signal;CleanupScopes;Compare;Compare To Zero;Constant;Counter;Data Type Conversion;Delay;Delay_adj;Enable;FromCoverifySrc;HDL_DUT;HDL_DUT_vnl;IgnoreCycles;In;Out;Reference;Relational Operator;Scope;SubSystem;Switch;ToCoverifySink;ToCoverifySrc;Trigonometric Function;Zero-Order Hold;compare: Out;cosim;delayMatch;dut;from;goto;in;out;pathdelay

BLOCKTYPE:
Assertion;Compare To Zero;Constant;Counter Free-Running;DataTypeConversion;Delay;From;Goto;Inport;Outport;RelationalOperator;Scope;Sum;Switch;Trigonometry;ZeroOrderHold;chirp


MODELNAME: hdlcoder_singlerate_sharing
PATH: examples/hdlcoder/main/hdlcoder_singlerate_sharing.slx
ANNOTATION: Copyright 2013-2023 The MathWorks, Inc.
BLOCKTYPE: Counter Limited;Delay;Gain;Inport;Multiply-Accumulate;Outport;Scope;Sum;Tapped Delay Line
BLOCKTYPE_FREQUENCY: 1;5;5;4;1;4;1;7;1
CHECKSUM: 7FCA0102EC588F4654565DB0F890D290
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Counter Limited;Delay;Gain;In;Multiply-Accumulate;Out;Reference;Scope;SubSystem;Subsystem;Sum;Sum_piped;Tapped Delay;share;stream


MODELNAME: hdlcoder_sldspba
PATH: examples/hdlcoder/main/hdlcoder_sldspba.slx
ANNOTATION: Altera DSP Builder Advanced Blockset Subsystem Example
BLOCKTYPE_FREQUENCY: 1;1;1;4;1;33;3;2;9;12;1;2;1;5;2
CHECKSUM: 0C2E80A95399C5A9097D666B7E1ECBB9
PRODUCT: Fixed-Point Designer;HDL Coder;MATLAB;Simulink;Stateflow
PRODUCT_BASECODE: ES;HD
DESCRIPTION:
In this example a simple non-symmetric FIR is implemented in primitive blocks, with reloadable coefficients. 

BLOCK:
 Demux ; SFunction ; Terminator ;Add;ChannelIn;ChannelOut;Chart;Const;Control;DSPBA Subsystem;Data Type Conversion;Delay;Device;EditParams;MATLAB Function;Model Info;Mult;Real-Imag to Complex;Reference;Run Demo;Run Modelsim;Run Quartus II;SLandDSPBA;Signals;Simulink Subsystem;Step;SubSystem;SynthesisInfo;Terminator;Uniform Random Number;c;channel;channels;data_in;data_out;data_out ;help_link;start;u;v;valid;xr;y;zr

BLOCKTYPE:
CMBlock;DSP Builder Advanced Blockset Control Block;DSP Builder Advanced Blockset Device Block;DSP Builder Advanced Blockset Ignored Block;DSP Builder Advanced Blockset Signals Block;DSP Builder Advanced Blockset primitive;DataTypeConversion;Demux;Inport;Outport;RealImagToComplex;S-Function;Step;Terminator;UniformRandomNumber


MODELNAME: hdlcoder_sobel_video
PATH: examples/hdlcoder/main/hdlcoder_sobel_video.slx
BLOCKTYPE_FREQUENCY: 2;1;6;1;1;2;4;1;23;2;2;6;1;39;3;2;19;1;1;2;2;1;1;9;1;2;1;2
CHECKSUM: CB1893EC044B4B8B905AC5D95CEAF8FE
PRODUCT_BASECODE: ES;HD
ANNOTATION:
RGB represented in 32hFFRRGGBB RGB represented in 32hFFRRGGBB RGB represented in 32hFFRRGGBB RGB represented in 32hFFRRGGBB Click to Use 1080p Source Resolution: 1920x1080 Clink to Use Smaller Source Resolution: 160x105 Copyright 2012-2023 The MathWorks, Inc. control from processor control from processor control from processor video stream video stream control from processor

BLOCK:
 Demux ; SFunction ; Terminator ;Abs;Add;B;BW2RGB;Background;Background_Color;Behavior Model Result;Behavior_Model;Bit Concat;Blue;Buffer;Bus Creator;Bus Selector;Constant;Convert 1-D to 2-D;Convert 2-D to 1-D;Data Type Conversion;Delay;Deserialize;Filter_in ;Filter_out;Frame Conversion;G;Gain;Gradient_enb;Gradient_out;Green;Hardware Result;Image;Image From File;In;Line buffer;Manual Switch;Out;R;RGB;RGB2Y;RGB_out;Rate Transition;Red;Reference;Serialize;Show_Gradient;Signal Conversion;Slider Gain - Threshold;Sobel Edge Detection;Sobel Filter;Sobel Threshold;Sobel_Enable;Sobel_HW;Sobel_edge;Sobel_gradient;Source;Stream;SubSystem;Sum;Switch;Threshold;Transpose;Unbuffer;Video Format Conversion;Video_in;Video_out;White;Y;Y2RGB;b;background_color;blue;e;filter_input;g;gradient_enb;green;r;red;sobel_edge;sobel_edge_behavioral;sobel_gradient;thresh;x directional;x-filter;y directional;y-filter

BLOCKTYPE:
Abs;Bit Concat;Bit Slice;Buffer;BusCreator;BusSelector;Constant;DataTypeConversion;Delay;Demux;FrameConversion;Gain;Image From File;Inport;ManualSwitch;Math;Outport;RateTransition;RelationalOperator;Reshape;S-Function;SignalConversion;Slider Gain;Sum;Switch;Terminator;Unbuffer;VideoViewer

PRODUCT:
Computer Vision Toolbox;DSP System Toolbox;Fixed-Point Designer;HDL Coder Documentation;MATLAB;Simulink


MODELNAME: hdlcoder_sobel_video_stream
PATH: examples/hdlcoder/main/hdlcoder_sobel_video_stream.slx
BLOCKTYPE_FREQUENCY: 2;6;1;1;5;2;1;1;1;15;3;1;1;7;1;1;1;1;2;2;1
CHECKSUM: E29E8913577FF5E2B19602BDAFF64F67
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 RGB represented in 32hFFRRGGBB  RGB represented in 32hFFRRGGBB  Encode RGB into 32 bit representation 32hFFRRGGBB  Encode RGB into 32 bit representation 32hFFRRGGBB control from processor video pixel data Copyright 2016-2023 The MathWorks, Inc. video pixel control bus control from processor control from processor control from processor video pixel data video pixel control bus

BLOCK:
 Demux ; SFunction ; Terminator ;Background_Color;Bit Concat;Bit Slice;Color Space Converter;Constant;Demux;Edge Detector;FF;Frame To Pixels;Manual Switch;Matrix Concatenate;Mux;Output Control;Pixels To Frame;RGB;RGB2Vector;RGBVector;Reference;Show_Gradient;Signal Specification;Slider Gain - Threshold;Sobel_Enable;Sobel_HW;SubSystem;Switch;Terminator;Threshold;Transpose;Vector2RGB;Video Source;Video Viewer;Y;Y2RGB;background_color;ctrlIn;ctrlOut;intensity_out;pixelIn;pixelOut;show_gradient;sobel_edge;sobel_gradient_h;sobel_gradient_v

BLOCKTYPE:
Bit Concat;Bit Slice;Color Space Converter;Concatenate;Constant;Demux;Edge Detector;Frame To Pixels;From Multimedia File;Inport;ManualSwitch;Math;Mux;Outport;Pixels To Frame;S-Function;SignalSpecification;Slider Gain;Switch;Terminator;VideoViewer

PRODUCT:
Computer Vision Toolbox;Fixed-Point Designer;MATLAB;Simulink;Simulink Test Documentation;Vision HDL Toolbox


MODELNAME: hdlcoder_statecontrol_model
PATH: examples/hdlcoder/main/hdlcoder_statecontrol_model.slx
BLOCKTYPE_FREQUENCY: 5;1;3;2;2;2;29;4;1;4;34;2;3;2;24;2;1;1;4;4;2;1;1;2;2;4;1;1
CHECKSUM: A46216053A62794FE846E8EBAF6D901E
PRODUCT: Fixed-Point Designer;MATLAB;Signal Processing Toolbox;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
This matches the latency of the RAM delay line The RAM based delay line has 2 latency: - 1 from count to rd_addr - 1 from rd_addr to rd_dout To map the MAC to FPGA DSP, use 1 product output register for Xilinx, and 0 for Altera This matches the latency of the RAM delay line The RAM based delay line has 2 latency: - 1 from count to rd_addr - 1 from rd_addr to rd_dout To map the MAC to FPGA DSP, use 1 product output register for Xilinx, and 0 for Altera Copyright 2016 The MathWorks, Inc.

BLOCK:
 Demux ; SFunction ; Terminator ;Add;Classic Results;Coeff ROM;Compare To Constant;Compare To Zero;Complex to Real-Imag;Count is Max;DTC;Delay;Direct Lookup Table (n-D);Enable;Enabled Delay;Enabled Delay Sync;Enabled_Delay;F;HDL Counter;Imaginary result Comparison;Irregular Data Source;LocalEnable;Logical Operator;MAC FIR Block;MAC FIR Block Sync;Out;Product;RAM delay line;Random Max Value;Random Pulse;Real result Comparison;Reference;Rounding Function;Set Accum DT;Set Complexity;Simple Dual Port RAM;State Control;Stop Simulation;SubSystem;Switch;T;Uniform Random Number;Unit Delay Enabled;acc_reg;addr;areg;circular buffer logic;coe_ref;count;data;data_in;data_out;din;din_ref;dout;inreg;mac latency;match_d;mreg;output_vld Comparison;rd_addr;ref;sw;valid;valid_in;valid_out;wr_addr;wr_en;zero

BLOCKTYPE:
Compare To Constant;Compare To Zero;ComplexToRealImag;Constant;Data Type Propagation;DataTypeConversion;Delay;Demux;EnablePort;HDL Counter;Inport;Logic;LookupNDDirect;MAC FIR Filter;Outport;Product;RelationalOperator;Rounding;S-Function;Scope;Simple Dual-port RAM;StateControl;Stop;Sum;Switch;Terminator;UniformRandomNumber;Unit Delay Enabled


MODELNAME: hdlcoder_streaming_mat_inv_max_lat_cholesky
PATH: examples/hdlcoder/main/hdlcoder_streaming_mat_inv_max_lat_cholesky.slx
BLOCKTYPE_FREQUENCY: 2;1;3;1;1;7;1;2;7;1;2;1;1;1;2
CHECKSUM: 68CC579DFD551882D6FDB7FC0E0B58CC
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 Input system  This example shows streaming matrix implementation using Cholesky decomposition Copyright 2017-2019 The MathWorks, Inc.

BLOCK:
 Demux ; SFunction ; Terminator ;Add;Constant;Counter Free-Running;Delay;Deserializer1D;InputSubsystem;MATLAB Function;MATLAB System;Math Function;MatrixInverse;OutputSubsystem;Reference;Reshape;Serializer1D;SubSystem;Terminator;constant;dataIn;dataOut;dataSystem;enable;inValid;outEnable;rateTrans;ready;u;vaidInSystem;validIn;validOut;y

BLOCKTYPE:
Constant;Counter Free-Running;Delay;Demux;Deserializer1D;Inport;MATLABSystem;Math;Outport;RateTransition;Reshape;S-Function;Serializer1D;Sum;Terminator


MODELNAME: hdlcoder_streaming_mat_inv_max_lat_gauss_jordan
PATH: examples/hdlcoder/main/hdlcoder_streaming_mat_inv_max_lat_gauss_jordan.slx
BLOCKTYPE_FREQUENCY: 2;3;1;6;1;2;6;1;2;1;2
CHECKSUM: 5EFB6A5B244165E243AAE776D37001DA
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 Input system  This example shows streaming matrix implementation using Gauss-Jordan elimination  Copyright 2017-2019 The MathWorks, Inc.

BLOCK:
Constant;Delay;Deserializer1D;InputSubsystem;MATLAB System;Math Function;OutputSubsystem;Reference;Reshape;Serializer1D;SubSystem;Subsystem;Terminator;constant;dataIn;dataOut;dataSystem;enable;inValid;outEnable;rateTrans;ready;vaidInSystem;validIn;validOut

BLOCKTYPE:
Constant;Delay;Deserializer1D;Inport;MATLABSystem;Math;Outport;RateTransition;Reshape;Serializer1D;Terminator


MODELNAME: hdlcoder_streaming_matrix_multiply_max_latency
PATH: examples/hdlcoder/main/hdlcoder_streaming_matrix_multiply_max_latency.slx
BLOCKTYPE_FREQUENCY: 7;2;1;3;4;13;1;3;19;6;4;7;1
CHECKSUM: 7CF6BF2AF422065BA1D466AB93044BF8
PRODUCT: DSP System Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 This example shows streaming matrix multiplication operation  Copyright 2018-2019 The MathWorks, Inc.

BLOCK:
AMatrixSerializer1D;AOut;AOutValid;BMatrixSerializer1D;BOut;BOutValid;Constant;Counter;Deserializer1D;Display;Enable;In;InputSource System;InputSubsystem;Math Function;MatrixASerialization_RowMajor;MatrixBSerialization_ColMajor;MatrixBSerialization_RowMajor;MatrixMultiply;OutputSubsystem;Reference;Reshape;ReshapeAMatrix ;ReshapeBMatrix;SubSystem;Switch;To Workspace;aData;aMatrixInp;aOutSerial;aOutSerialValid;aReady;aValid;bData;bMatrixInp;bOutSerial;bOutSerialValid;bReady;bValid;cData;cReady;cValid;matrixA;matrixB;prodOut;prodOutValid

BLOCKTYPE:
Constant;Counter;Deserializer1D;Display;EnablePort;Inport;MATLABSystem;Math;Outport;Reshape;Serializer1D;Switch;ToWorkspace


MODELNAME: hdlcoder_subsys_redundant_logic
PATH: examples/hdlcoder/main/hdlcoder_subsys_redundant_logic.slx
ANNOTATION: Preserved Removed Copyright 2020 The MathWorks, Inc.
BLOCKTYPE: Constant;Display;Gain;Inport;Outport;Sum;Terminator
BLOCKTYPE_FREQUENCY: 6;3;12;7;15;8;17
CHECKSUM: 569B86A607E17ECFB7C7188EA5CA32BF
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Constant;DUT;Display;Gain;In;Out;SubSystem;Subsystem;Terminator;bbx_with_i;subsys_with_dead_out;subsys_with_in_dead_out;subsys_with_io;subsys_with_no_io;subsys_with_no_io_dead_bbx;subsys_with_no_io_valid_bbx;subsys_with_no_out;subsys_with_out


MODELNAME: hdlcoder_test_points
PATH: examples/hdlcoder/main/hdlcoder_test_points.slx
ANNOTATION: Copyright 2017-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;5;9;2;2;1;2;2;32;4;1;5;18;2;2;1;2;6
CHECKSUM: 1DE95C3A8AB66BFBF76DF6015B534E1C
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Bit Concat;Calculate Coefficients;Comparator;Con vert data_e;Constant;Constant ;Control_In;Convert incr;Convert pv;Convert pv_e;Convert s_mvt;Convert sat;Convert_control;DUT;Data Type Duplicate;Delay acc;Delay cpt;Enable;Enable_In;From cpt_e;From sel;Goto cpt_e;Goto sel;In;Logical acc;Logical rst;Logical sel;Lookup C;MaJ Counter;Mux;Out;Reference;Relational;Relational ;Selection Logic;SubSystem;Sum;Sum C;Unit Delay;Unit Delay c_im;Unit Delay c_imp;Unit Delay cpt;Unit Delay sat;acc;c_im;c_imp;cpt;cpt_e;cpt_s;d;data_e;en;mvt;pa;pv_e;q;rst;s_mvt;sat;sat_in;sel_in;sync_e;sync_in

BLOCKTYPE:
Bit Concat;Constant;DataTypeConversion;DataTypeDuplicate;Delay;EnablePort;From;Goto;Inport;Logic;Lookup;MultiPortSwitch;Outport;RelationalOperator;Sum;Unit Delay Enable;Unit Delay Resettable;UnitDelay


MODELNAME: hdlcoder_tunable_edge_detection
PATH: examples/hdlcoder/main/hdlcoder_tunable_edge_detection.slx
ANNOTATION: Copyright 2022 The MathWorks, Inc. Edge Detection and Image Overlay
BLOCKTYPE_FREQUENCY: 1;2;1;2;1;1;1;1;6;3;1;1;1
CHECKSUM: 803C310A5864D1E85F2C0F3C5C0000E6
PRODUCT: Computer Vision Toolbox;Fixed-Point Designer;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Bit Concat;Bit Slice;Constant;Data Type Conversion;E;EdgeDUT;I;MATLAB Function;Matrix Concatenate;Multiply;O;Overlay and Edges;Overlay_Edges;Reference;SubSystem;Video Source;cAlpha;cThreshold;imageIn

BLOCKTYPE:
Bit Concat;Bit Slice;Concatenate;Constant;DataTypeConversion;Demux;From Multimedia File;Gain;Inport;Outport;S-Function;Terminator;VideoViewer


MODELNAME: hdlcoder_variant_subsystem_design
PATH: examples/hdlcoder/main/hdlcoder_variant_subsystem_design.slx
BLOCKTYPE: DataTypeConversion;Delay;Inport;Outport;Product;Repeating table;Scope;chirp
BLOCKTYPE_FREQUENCY: 3;10;8;4;3;1;1;1
CHECKSUM: E8661EF28311A1E50B550A1D67B69A34
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
1) Only subsystems can be added as variant choices at this level 2) Blocks cannot be connected at this level as connectivity is automatically determined at simulation, based on the active variant  if Rcp == 1 Recip = 0 else Recip = 1 end

BLOCK:
Chirp Signal;DUT;Data Type Conversion;Delay;Divide;Divide_x;In;Op;Out;Product;Recip;Reference;Repeating Sequence;Scope;SubSystem;in_dividend;in_divisor;out


MODELNAME: hdlcoder_vector_redundant_logic
PATH: examples/hdlcoder/main/hdlcoder_vector_redundant_logic.slx
ANNOTATION: Removed Preserved Removed Preserved as vector add Removed Copyright 2020 The MathWorks, Inc.
BLOCKTYPE: Constant;Demux;Display;Gain;Inport;Mux;Outport;Sum;Terminator
BLOCKTYPE_FREQUENCY: 1;4;2;5;3;1;4;2;6
CHECKSUM: 3CB2481FB4DB792BDC6AE10228602210
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Constant;DUT;Demux;Display;Gain;In;Mux;Out;SubSystem;Terminator;innerSubsystem;innerSubsystem_dead


MODELNAME: hdlcoderfirram
PATH: examples/hdlcoder/main/hdlcoderfirram.slx
BLOCKTYPE_FREQUENCY: 1;3;1;4;4;1;1;1;4;12;1;1;6;1;2;1;3;1;3;3;5;1;4;1;1
CHECKSUM: B2C845626F26C610CDD2CF308EE8B76A
PRODUCT: DSP System Toolbox;Fixed-Point Designer;HDL Coder;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
DESCRIPTION:
RAM-based FIR Filter This example shows how to use HDL Coder(TM) to generate and verify HDL code for a RAM-based FIR filter using a multiply-accumulate architecture. 

ANNOTATION:
This delay is due to the RAM read path being registered This delay is to match the delay above on the multiplier Copyright 2007-2014 The MathWorks, Inc.

BLOCK:
Accumulator;Chirp Signal;Coef Data;Constant;Counter Free-Running;CtrlPipe;DUT Resp;Discrete FIR Filter;Display;Dual Port RAM;FIR_Addr;FIR_RAM;FromFix;FromHost;Golden Resp;Ground;Host Behavioral Model;Model Info;Mult;MultPipe;Mux;OutReg;RAMPipe;Reference;Run Demo;Scope;Selector;Signal Specification;Signal To Workspace;Startup Delay;Stimulus;SubSystem;Sum;Switch;Tapped Delay;ToFixPt;ToHost;Unit Delay;Visualize Results;Zero-Order Hold;addr;clear;counten;filter_in;filter_out;host_addr;host_read_data;host_write_data;host_write_en;loaddata;loaden;rtfast;rtslow

BLOCKTYPE:
CMBlock;Constant;Counter Free-Running;DataTypeConversion;Delay;DiscreteFir;Display;Dual-port RAM;Ground;Inport;Lookup;Mux;Outport;Product;RateTransition;Scope;Selector;SignalSpecification;SignalToWorkspace;Sum;Switch;Tapped Delay Line;UnitDelay;ZeroOrderHold;chirp


MODELNAME: moving_avg_col_major
PATH: examples/hdlcoder/main/moving_avg_col_major.slx
BLOCKTYPE: Constant;DataTypeConversion;Demux;Inport;Outport;S-Function;Terminator;ToWorkspace
BLOCKTYPE_FREQUENCY: 1;2;1;2;2;1;1;1
CHECKSUM: 479EAA840472A23E48260186DE75671B
PRODUCT: HDL Coder Documentation;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Constant;DUT;Data Type Conversion;MATLAB Function;SubSystem;To Workspace;in_sig;inp_data;out_data;out_sig


MODELNAME: multi_masters
PATH: examples/hdlcoder/main/multi_masters.slx
ANNOTATION: Copyright 2017-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 6;5;2;12;2;10;6;1;2;1;2;62;4;2;64;2;2;5;1;1;1;4;2;10;2
CHECKSUM: 9580BE43009383196B260A4AB796F19D
PRODUCT: Fixed-Point Designer;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Bus Creator;Bus Selector;Compare To Constant;Constant;DDR;DDR Read Controller;DDR Write Controller;DDR_Access_Controller;DUT;Data Type Conversion;Delay;Demux;Direct Lookup Table (n-D);Display;EdgeDetection;Enable;Enabled Subsystem;FromWs;HDL Counter;IP_Controller;In;Input;Logical Operator;MATLAB Function;Out;Product;Rate Transition;Reference;Scope;Signal ;Signal Builder;Simple Dual Port RAM;SubSystem;Subsystem;Sum;Switch;Terminator;Unit Delay;axi_rd_data_o;axi_rd_m2s;axim_rd_data;axim_rd_m2s;axim_rd_s2m;axim_wr_data;axim_wr_m2s;axim_wr_ready;axim_wr_s2m;burst_len;count_out;counterOut;d;ddr_read_done;ddr_read_start;ddr_write_done;ddr_write_start;dma_from_ddr_done;dma_len;dma_read_ready;dma_to_ddr_done;dma_write_ready;doneIP;e;latch;len;length_in;q;ram_addr;ram_rd_addr;ram_read_data;ram_wr_addr;ram_wr_data;ram_wren;rd_addr;rd_aready;rd_avalid;rd_data;rd_dvalid;rd_len;rd_ready;ready_out;rst;start;startIP;start_counter;state_out;targetAddr;valid_out;wr_addr;wr_data;wr_len;wr_ready;wr_valid

BLOCKTYPE:
BusCreator;BusSelector;Compare To Constant;Constant;DataTypeConversion;Delay;Demux;Display;EnablePort;FromWorkspace;HDL Counter;Inport;Logic;LookupNDDirect;Outport;Product;RateTransition;S-Function;Scope;Sigbuilder block;Simple Dual-port RAM;Sum;Switch;Terminator;UnitDelay


MODELNAME: multi_masters_with_ID
PATH: examples/hdlcoder/main/multi_masters_with_ID.slx
BLOCKTYPE_FREQUENCY: 6;8;3;12;3;8;7;1;1;2;1;1;2;1;65;7;1;4;68;1;2;6;1;1;1;2;2;13;2
CHECKSUM: B910D417D596B883A00598DC36C8FD81
PRODUCT: Fixed-Point Designer;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
when state is SEND_REQ, save req_counter value also push length value into FIFO DMA_req state machine takes in requests from masters, and manages req_counter to poll through each request periodically

BLOCK:
 Demux ; SFunction ; Terminator ;Bus Creator;Bus Selector;Compare To Constant;Constant;DDR;DDR Read Arbitrator;DDR Read Controller;DDR Write Controller;DDR_Access_Controller;DMA_Req;DUT;Data Type Conversion;Delay;Demux;Direct Lookup Table (n-D);Display;EdgeDetection;Enable;Enabled Subsystem;From;FromWs;Goto;HDL Counter;HDL FIFO;IP_Controller;In;Input;Logical Operator;MATLAB Function;Multiport Switch arid;Multiport Switch length;Multiport Switch offset;Multiport Switch start;Out;Product;Rate Transition;Reference;Scope;Signal ;Signal Builder;Simple Dual Port RAM;SubSystem;Subsystem;Sum;Switch;Terminator;Unit Delay;arid;axi_rd_data_o;axi_rd_m2s;axi_rd_m2s_bs_in;axi_rd_m2s_in;axi_rd_s2m_in;axim_rd_data;axim_rd_m2s;axim_rd_s2m;axim_wr_data;axim_wr_m2s;axim_wr_ready;axim_wr_s2m;burst_len;count_out;counterOut;d;data_counter;ddr_read_done;ddr_read_start;ddr_write_done;ddr_write_start;dec_counter;dma_from_ddr_done;dma_len;dma_read_ready;dma_to_ddr_done;dma_write_ready;doneIP;done_out;dvalid conversion;e;latch;len;length;length_in;offset;q;ram_addr;ram_rd_addr;ram_read_data;ram_wr_addr;ram_wr_data;ram_wren;rd_addr;rd_aready;rd_aready_delayed;rd_arid;rd_avalid;rd_data;rd_dvalid;rd_len;rd_ready;rd_rid;rd_s2m;ready_out;req_counter_out;rst;start;startIP;start_counter;state_out;targetAddr;times_counter;times_counter_0to;valid_out;wr_addr;wr_data;wr_len;wr_ready;wr_valid

BLOCKTYPE:
BusCreator;BusSelector;Compare To Constant;Constant;DataTypeConversion;Delay;Demux;Display;EnablePort;From;FromWorkspace;Goto;HDL Counter;HDL_FIFO;Inport;Logic;LookupNDDirect;MultiPortSwitch;Outport;Product;RateTransition;S-Function;Scope;Sigbuilder block;Simple Dual-port RAM;Sum;Switch;Terminator;UnitDelay


MODELNAME: pulse_detector
PATH: examples/hdlcoder/main/pulse_detector.slx
BLOCKTYPE_FREQUENCY: 1;1;3;1;1;1;1;6;8;2;1;2;1;1;2;1
CHECKSUM: D0DD5EB45FD0A5FF67921C9AB4F2052B
PRODUCT: DSP System Toolbox;Econometrics Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
 Back-propagate sample time from downstream (set to -1)  Use hdlfimath (floor &amp; wrap) when possible to reduce hardware resource usage (Toolbar &gt; Edit Data &gt; Ports &amp; Data Manager)  © 2022 The MathWorks, Inc.

BLOCK:
 Demux ; SFunction ; Terminator ;Add;Complex to Real-Imag;Compute Power;Constant;Data Type Conversion;Data Type Duplicate;DataBuff;Discrete FIR Filter;Display;Local Peak;MATLAB Function;MidSample;Product;Pulse_Detector_DUT;Reference;Signal From Workspace;SubSystem;Tapped Delay;Terminator;Unit Delay Enabled Synchronous;data in;data out;data_in;detected;mid_sample;threshold;valid_in;valid_out

BLOCKTYPE:
ComplexToRealImag;Constant;DataTypeConversion;DataTypeDuplicate;Demux;DiscreteFir;Display;Inport;Outport;Product;S-Function;Signal From Workspace;Sum;Tapped Delay Line;Terminator;Unit Delay Enabled Synchronous


MODELNAME: sschdlexThreePhaseConverterWithGridExample
PATH: examples/hdlcoder/main/sschdlexThreePhaseConverterWithGridExample.slx
CHECKSUM: 99AF05783407AC7E90D17E637376C644
PRODUCT: MATLAB;Simscape;Simscape Electrical;Simulink;Simulink Real-Time
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Subcycle Averaging - FPGA Clock Rate ideal switch flag forces inputs to be complementary Open Circuit Connected to Positive Rail Connected to Negative Rail Short Between Rails Subcycle Averaging - FPGA Model Rate Output Voltages Based on Switch State - FPGA Model Rate Calculate State Based on Switch Control - FPGA Clock Rate Calculate State Based on Switch Control - FPGA Clock Rate Output Voltages Based on Switch State - FPGA Model Rate Subcycle Averaging - FPGA Model Rate Short Between Rails Connected to Negative Rail Connected to Positive Rail Open Circuit ideal switch flag forces inputs to be complementary Subcycle Averaging - FPGA Clock Rate Calculate State Based on Switch Control - FPGA Clock Rate Output Voltages Based on Switch State - FPGA Model Rate Subcycle Averaging - FPGA Model Rate Short Between Rails Connected to Negative Rail Connected to Positive Rail Open Circuit ideal switch flag forces inputs to be complementary Subcycle Averaging - FPGA Clock Rate Override External Signals Decode Fault Word Frame based data transfer to CPU Analog Interfaces & Scaling Converter & Grid Model PWM Generator Grid DC link and 3 phase 2 level converter Frame based signal logging on CPU Copyright 2020 The MathWorks, Inc. Feedback signals

BLOCK:
+;-;1uF;2 mH ;25 kV, 60 Hz;50 kW 380 Vrms 60 Hz;75 kW 380 Vrms 60 Hz;A;A+;A+ Close;A+ Fault;A+ Open;A-;A- Close;A- Fault;A- Open;AND;Abs;Add;B;B+;B+ Close;B+ Fault;B+ Open;B-;B- Close;B- Fault;B- Open;Bias;Bit Shift;Bitwise Operator;C;C+;C+ Close;C+ Fault;C+ Open;C-;C- Close;C- Fault;C- Open;CPU Signal Logging;Calculate Phase Voltage;Carrier;CarrierReset;Compare To Constant;Compare To Zero;Constant;Control;Controlled Current Source;Controlled Voltage Source;Controlled Voltage Source (Three-Phase);Counter;Counter Free-Running;Counter Limited;Current Sensor;DAC trigger 1_;DAC_;DAC_Scaling;DQ Current Control;Data Type Conversion;Data Type Conversion Breaker;Data Type Conversion DAC;Data Type Conversion Iabc;Data Type Conversion Idc;Data Type Conversion Va;Data Type Conversion Vb;Data Type Conversion Vc;Data Type Conversion Vdc;Data Type Conversion Vg;DeadBand;Demux;Detect Change;Detect Increase;Electrical Reference;Enable;Extract Bits;FPGA;Fault;Fault_Word;File Log;For Each;For Each Subsystem;From;Gain;Gates;Goto;Grid Voltage;HDL Counter;I;IDC;I_DC;I_Phase;Ia;Iabc (pu);Iabc_conv;Iabc_grid;Ib;Ic;Idc;Ideal_Switch_Flag;In;Incorporate Fault Signals;Inverse Park Transform;Inverter;Inverter (2-Level HDL w faults);Iout;Logical Operator;Max;Measure;Minus;Multiply;Mux;NOT;Negative Rail Switch Characteristics;OR;Open Circuit;Out;PCIe_FrameData;PID Controller;PWM Generator;PWM Period;Park Transform;Period;Positive Rail Switch Characteristics;Product;Rate Transition;Reference;Relational Operator;Resistor;S;S+;S-;SPST Switch;Saturation;Scope;Selector;Signal Scaling;Simulink-PS Converter;Sinusoidal Measurement (PLL, Three-Phase);Solver Configuration;Step;SubSystem;Subtract;Sum;Switch;Tapped Delay;Terminator;Two-Winding Transformer (Three-Phase);Unary Minus;Unit Delay;Unit Delay Enabled Synchronous;V;V_minus;V_plus;Va;Vabc;Vabc_conv;Vabc_grid;Vb;Vc;Vdc;Vhalf;Vin;Vll;Vll_calculate;Vneg;Voltage Sensor;Vout;Vpos;breaker;breaker_cmd;dq;gates;id_ref;ideal_switch_flag;idq;idq_ref;iq_ref;modWave;modWave_corr;omega;vdq_grid

BLOCKTYPE:
Abs;Bias;Bit Shift;Bitwise Operator;Compare To Constant;Compare To Zero;Constant;Controlled Current Source;Controlled Voltage Source;Controlled Voltage Source (Three-Phase);Counter Free-Running;Counter Limited;Current Sensor;Current and Voltage Sensor (Three-Phase);DC Voltage Source;DataTypeConversion;Demux;Detect Change;Detect Increase;Electrical Reference;Extract Bits;ForEach;From;Gain;Goto;HDL Counter;Inport;InportShadow;Inverse Park Transform;Logic;MinMax;Mux;Outport;PID 1dof;PMIOPort;PS-Simulink Converter;Park Transform;Product;RLC (Three-Phase);RateTransition;RelationalOperator;Resistor;SPST Switch;Saturate;Scope;Selector;Simulink-PS Converter;Sin;Sinusoidal Measurement (PLL, Three-Phase);Solver Configuration;Step;Sum;Switch;Tapped Delay Line;Terminator;Two-Winding Transformer (Three-Phase);UnaryMinus;Unit Delay Enabled Synchronous;UnitDelay;Voltage Sensor;Wye-Connected Load;slrealtimeloggingblock

BLOCKTYPE_FREQUENCY:
1;1;3;3;18;7;35;1;3;1;1;1;3;2;1;43;11;1;1;4;18;1;92;24;70;19;102;21;1;24;6;10;45;2;5;8;2;27;1;29;7;2;3;3;2;4;6;1;1;1;2;34;15;1;14;1;1;1;21;1;3;6


MODELNAME: nrhdlSSBDecoding
PATH: examples/hdlv_spchdl/main/nrhdlSSBDecoding.slx
BLOCKTYPE_FREQUENCY: 4;13;1;2;6;9;5;1;1;30;1;5;36;6;1;1;3;17
CHECKSUM: 7937FFBD1A0CE099E126FB77B05D6816
PRODUCT: DSP System Toolbox;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: CM;ES;LH
EXTERNALFILE_REFERENCE: nrhdlSSBDecodingCore___Model_Block___
ANNOTATION:
 Signals from workspace  Stop the simulation once decoding is complete  NR HDL SSB Decoding  Signals to workspace

BLOCK:
Bit Concat;Bit Slice;Bus Selector;Cast To Boolean;Compare To Constant;Constant;Data Type Conversion;Diagnostics to workspace;Enable;From;Goto;Kssb;KssbOut;Lmax;Multiport Switch;ParseMIB;Reference;SSB Decoding;Signal From Workspace;Signal Specification;Stop Simulation;SubSystem;Subsystem;Terminator;To Workspace;Zero;bchStatus;cellBarred;cellBarredOut;cellID;data;dataValid;demodData;diagnostics;dmrsCorr;dmrsTypeAPos;dmrsTypeAPosition;dmrsTypeAPositionOut;enumToValue;frequencyRange;hrf;hrfOut;intraFreqResel;intraFreqReselect;intraFreqReselectOut;kSSB;nextSSB;parsePBCHPayload;pbchBits;pbchPayload;pbchPayloadOut;pbchStatus;qpskSymb;rateRecData;reset;scsCommon;scsCommonEnum;scsCommonOut;sfn;sfnOut;sib1Config;sib1ConfigOut;ssbIndex;ssbIndex3Lsb;ssbIndexOut;startProcessing;sym;validOut

BLOCKTYPE:
Bit Concat;Bit Slice;BusSelector;Compare To Constant;Constant;DataTypeConversion;EnablePort;From;Goto;Inport;ModelReference;MultiPortSwitch;Outport;Signal From Workspace;SignalSpecification;Stop;Terminator;ToWorkspace


MODELNAME: nrhdlSSBDecodingCore
PATH: examples/hdlv_spchdl/main/nrhdlSSBDecodingCore.slx
CHECKSUM: 2DCD86DB69D547ACEF2FA86CA7C02539
PRODUCT_BASECODE: CM;ES;LH
ANNOTATION:
deinterleave The controller extracts v from the bch data. v is computed from bits [4 23] (zero-based) so delay by 24 as the valid will be continuously high buffer streaming data into a frame descramble scaling data is post soft combining but before deinterleaving. Only the values matter not the order find the maximum magnitude of the soft decisions find the index of the most significant set bit compute the coarse gain - the number of left shifts required to move the most signicant set bit to the data type MSB compute the soft gain - the remaining gain to saturate the maximum soft decision reintpret [-1 1) perform soft combining and deinterleaving scale the rate recovered soft decisions to saturate [-1,1) create sample control get mod(cellID,4) delay balance for RAM and RS generation delay balance for RAM read delay balance for RS generation reset the channel estimator one cycle before we start writing data to it delay balance for channel estimator dont equalize DMRS (only PBCH symbols)  Multiply data by conj of channel estimate Modulo 4 operation for ibar_ssb based on max number of SSBs in burst

BLOCK:
 Demux ; SFunction ; Terminator ;1-D Lookup Table;AND;Abs;Add;BCH processing;BCH status;Bit Concat;Bit Reduce;Bit Shift;Bit Slice;Bitwise Operator;Bus Creator;Bus Selector;Cast;Compare To Constant;Compare To Zero;Complex to Real-Imag;Conj;Constant;Correlation Control;D;Data Type Conversion;Delay;Demux;Detect Decrease;Detect Increase;Detect Rise Positive;Diagnostics Bus Creation;Enable;Extract Bits;From;Gain;Goto;HDL Counter;Init;LFSR;Lmax;Load;Logical Operator;MATLAB Function;MSSB;Math Function;Maximum;Multiport Switch;NCellID;NOT;NR Gold Sequence Generator;NR Polar Decoder;NcellID;OFDM Channel Estimator;OR;Out;PBCH processing;PBCH status;Product;Q;QPSKDemod;Real-Imag to Complex;Reference;Relational Operator;SSB Buffer + DMRS Search;Sample Control Bus Creator;Saturation;Selector;SetFF;Shift Arithmetic;Signal Specification;Single Port RAM System;State Control;SubSystem;Subtract;Switch;Tapped Delay;Terminator;Unary Minus;Unit Delay Enabled Resettable Synchronous;Unit Delay Enabled Synchronous;Vector Concatenate;XOR;addr;addrIn;apply scaling;bchController;bchDiagnostics;bchRateRecoverData;bchRateRecoverValid;bchStatus;bchValid;cellID;cellID_mod;channel est + eq;cinit;cinit calc;coarseGain;coarseScaling;compute scaling gains;controller;corrResult;corrValid;correlationCalc;correlationDone;create sample control;ctrlBus;ctrlIn;ctrlOut;data;dataIn;dataOut;dataValid;deitlvAddr;demod + descramble;diagnostics;dmrsCorrResult;dmrsCorrValid;dmrsSearchControl;dmrsSearchDone;enable;eqData;eqDataValid;eqSym;eqSymValid;err;extract payload;fineGain;fineScaling;frame;frameRd;frameWr;frequencyRange;getDimension;goldEn;goldLoad;goldValid;gridRAM;gridValid;hEstSym;hEst_enable;ibar_SSB;ibar_SSBValid;ibar_ssb;isScrambled;itlvAddr;kmssb;load;loadGold;mask;mask1_const;mask2_const;maxIn;mibDetected;mibError;nCellID_mod;nSC;newWrtEn;nextFrame;nextSSB;numScPerSym;ofdmSymbolCount;payload;payloadValid;pbchDemodDone;pbchDiagnostics;pbchPayload;pbchStatus;phase equalization;ramAddr;rate recover;rateRecoverDone;rdValid;refSymbolGen;rep;repIn;reset;restart;resultValid;rs;rsGen;rsNumber;rsValid;rst;rxData;rxDataValid;rxSym;s1Out;s2Out;s3Out;scalingData;scalingValid;searchDone;shiftIdx;shiftMask;shiftMasks;shiftMasksConst;shiftMasksLookup;skipFirstOFDMSymbol;soft scale;softBits;softBitsValid;ssbDecodingCore;ssbIndex3Lsb;ssbIndex3Lsb_In;ssbIndex3Lsb_Out;ssbIndex3lsb;startProcessing;status;subcarrierCount;sym;symValid;symbols;u;valid;validIn;validOut;wrEn;y

BLOCKTYPE:
Abs;ArithShift;Bit Concat;Bit Reduce;Bit Shift;Bit Slice;Bitwise Operator;BusCreator;BusSelector;Compare To Constant;Compare To Zero;ComplexToRealImag;Concatenate;Constant;DataTypeConversion;Delay;Demux;Detect Decrease;Detect Increase;Detect Rise Positive;EnablePort;Extract Bits;From;Gain;Goto;HDL Counter;Inport;Logic;Lookup_n-D;Math;Maximum;MultiPortSwitch;NR Gold Sequence Generator;NR Polar Decoder;OFDM Channel Estimator;Outport;Product;RealImagToComplex;RelationalOperator;S-Function;Sample Control Bus Creator;Saturate;Selector;SignalSpecification;StateControl;Sum;Switch;Tapped Delay Line;Terminator;UnaryMinus;Unit Delay Enabled Resettable Synchronous;Unit Delay Enabled Synchronous;hdl.RAM

BLOCKTYPE_FREQUENCY:
1;4;15;8;3;3;8;3;8;6;1;4;8;13;17;188;13;1;5;1;8;56;3;4;3;4;198;60;10;2;1;5;4;1;1;136;10;1;1;11;2;1;1;8;12;11;9;1;19;1;1;12;2

PRODUCT:
Communications Toolbox;DSP System Toolbox;Fixed-Point Designer;HDL Verifier;MATLAB;Simulink;Wireless HDL Toolbox;Wireless HDL Toolbox Documentation


MODELNAME: nrhdlSSBDetection
PATH: examples/hdlv_spchdl/main/nrhdlSSBDetection.slx
BLOCKTYPE_FREQUENCY: 1;2;1;9;1;1;1;21;1;22;1;8;5;19;1
CHECKSUM: 21FD00B7D8B009CA8D9CCC24E25566BC
PRODUCT: DSP System Toolbox;Fixed-Point Designer;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: CM;ES;LH
EXTERNALFILE_REFERENCE: nrhdlSSBDetectionFR1Core___Model_Block___
ANNOTATION:
Cast to 16 bits for subsequent processing. Attenuate input signal by a small amount to prevent saturation due to small gains in passband (ripple) in filters further down the chain.   Signals from workspace  NR HDL SSB Detection  Signals to workspace

BLOCK:
 Demux ; SFunction ; Terminator ;Bus Creator;Bus Selector;Data Type Conversion;Delay;Detect Decrease;Diagnostics to workspace;Gain;Input Scaling;NCellID;Reference;SSB Detection;Signal From Workspace;SubSystem;Terminator;To Workspace;Unit Delay Enabled Synchronous;chooseStrongestPSS;dataIn;dataOut;determinePSS;diagnostics;frequencyOffset;gridData;gridValid;mode;pssCorrelation;pssCorrelationOut;pssFrequencyOffset;pssFrequencyOffsetOut;pssNCellID;pssNCellID2Out;pssThreshold;pssTimingOffset;pssTimingOffsetOut;reportValid;sssCorrelation;sssThreshold;start;status;subcarrierSpacing;timingOffset;validIn;validOut

BLOCKTYPE:
BusCreator;BusSelector;DataTypeConversion;Delay;Demux;Detect Decrease;Gain;Inport;ModelReference;Outport;S-Function;Signal From Workspace;Terminator;ToWorkspace;Unit Delay Enabled Synchronous


MODELNAME: nrhdlSSBDetectionFR1Core
PATH: examples/hdlv_spchdl/main/nrhdlSSBDetectionFR1Core.slx
CHECKSUM: F9F6E31AB3C48F19366E3D615EB183C5
PRODUCT_BASECODE: CM;ES;LH
ANNOTATION:
Match the latency of the HDL FIR used to implement polyphase filter 0. Multiply by 0.5 by simply reinterpreting the sfix16_En15 as an sfix16_En16. Input data type must be sfix16_En15 Match the latency of the HDL FIR used to implement polyphase filter 0. Multiply by 0.5 by simply reinterpreting the sfix16_En15 as an sfix16_En16. Input data type must be sfix16_En15 Match the latency of the HDL FIR used to implement polyphase filter 0. Multiply by 0.5 by simply reinterpreting the sfix16_En15 as an sfix16_En16. Input data type must be sfix16_En15 Match the latency of the HDL FIR used to implement polyphase filter 0. Multiply by 0.5 by simply reinterpreting the sfix16_En15 as an sfix16_En16. Input data type must be sfix16_En15 Use a comb filter followed by an integrator to implement an efficient 18-tap sliding sum. 5 bits of headroom are required for this operation.  Implement frame sum across 4 of the CP correlation results. This is done by delaying the signal by integer multiples of the OFDM symbol period, i.e. 274 samples and summing the results. Correlate the signal with itself delayed by the FFT length (256). Integrate across the CP length, which is 18 samples. Sum across 4 OFDM symbols, since this is the length of the SS block. Each symbol is 274 samples long. Cast back to 32 bits, keeping the MSBs. Normalize the FFT output by 1/sqrt(FFTLen) to maintain energy between time and frequency domains. FFTLen is 256 therefore sqrt(FFTLen) is 16. The input signal is oversampled by 2 relative to the PSS bandwidth and has been prefiltered to remove noise outside the PSS bandwidth. Therefore, split the signal into 2 polyphase components and use a 128 tap FIR matched filter on each phase.  The input signal is oversampled by 2 relative to the PSS bandwidth and has been prefiltered to remove noise outside the PSS bandwidth. Therefore, split the signal into 2 polyphase components and use a 128 tap FIR matched filter on each phase.  The input signal is oversampled by 2 relative to the PSS bandwidth and has been prefiltered to remove noise outside the PSS bandwidth. Therefore, split the signal into 2 polyphase components and use a 128 tap FIR matched filter on each phase.  Multiply by 2 by shifting left 1 place. Convert to final output type. convert to unsigned Sum across a window of 128 samples using a comb filter followed by an integrator. Sum across a window of 128 samples using a comb filter followed by an integrator. Multiply by 2 with a reinterpret cast. Convert to final output type.  Measure the energy in the signal across a 128 sample window, which is equivalent to the PSS correlation window. This will be used later to generate a threshold.  Use a simple circular buffer to synchronize the streams, given that the correlators have greater latency than the signal power measurement.  Scale the signal by the square root of the threshold scaling factor before measuring the energy. This leads to a more efficient implementation than applying the scaling factor afterwards.  Apply a lower limit to the threshold to prevent small signals from triggering detection. ufix32_En24 is the data type used for both PSS and SSS correlation and threshold signals. Wait two valid samples to start. This aligns the start of the PSS reacquire window with the correct symbol in the OFDM demod data. Match the latency of the HDL FIR used to implement polyphase filter 0. Multiply by 0.5 by simply reinterpreting the sfix16_En15 as an sfix16_En16. Input data type must be sfix16_En15 Convert to the final output data type used for both PSS and SSS correlation and threshold signals. Convert to the final output data type used for both PSS and SSS correlation and threshold signals. Matches the delay of the Magnitude Squared 1 subsystem. Matches the delay of the Magnitude Squared 0 subsystem.  Only compute signal energy the first time, since the data is repeated 336 times.  SSS correlation accumulator: In the worst case that each subcarrier has a magnitude of 1, the maximum value of the accumulator is (cellSearchConsts.sssNormFactor * 127) = 11.3 which requires 5 integer bits (signed).  Multiply dataIn by seqIn: since seqIn is always either -1 or 1, use a gain of -1 and a switch to invert dataIn when seqIn = -1.  SSS Normalization Factor  SSS Threshold Scaling Apply gain of sqrt(sssThresholdScaling) before squaring the signal to avoid the need for a wider multiplier further along the chain.  If all subcarriers have magnitude 1 and threshold is 0dBs, then the max accumulator value is 127, therefore 7 integer bits (unsigned) are required. In practice the threshold is less than 0dBs so this is plenty of headroom. Multiply by 0.5 by simply reinterpreting the sfix16_En15 as an sfix16_En16. Match the latency of the HDL FIR used to implement polyphase filter 0. Input data type must be sfix16_En15 Multiply by 0.5 by simply reinterpreting the sfix16_En15 as an sfix16_En16. Match the latency of the HDL FIR used to implement polyphase filter 0. Input data type must be sfix16_En15 Match the latency of the HDL FIR used to implement polyphase filter 0. Multiply by 0.5 by simply reinterpreting the sfix16_En15 as an sfix16_En16. Input data type must be sfix16_En15 Multiply by 0.5 by simply reinterpreting the sfix16_En15 as an sfix16_En16. Match the latency of the HDL FIR used to implement polyphase filter 0. Input data type must be sfix16_En15 Match the latency of the HDL FIR used to implement polyphase filter 0. Multiply by 0.5 by simply reinterpreting the sfix16_En15 as an sfix16_En16. Input data type must be sfix16_En15  Subcarrier Spacing Selection  Cyclic Prefix Correlation  PSS Detection  CP Correlation to Frequency  PSS and CP Alignment  PSS Info Serialization  Diagnostics Bus Creation  Report Creation  SSS Detection  OFDM Demodulation  OFDM Data Synchronization Convert offset in samples to timingOffset for each scs Convert the input PSS timing offset from the first sample of the first SSB OFDM symbol to the first sample of the reacquire search window. Forward 273 samples to the PSS correlation peak and then back 2 samples to the middle of the 5 sample reacquire window. subtract 273 samples to convert timing reference from end of pss to start of ssb 

BLOCK:
 Demux ; SFunction ; Terminator ;1-D Lookup Table;AND;Accumulator;Add;Bit Concat;Bit Slice;Bitwise OR;Bitwise XOR;Bus Assignment;Bus Creator;Bus Selector;CP Correlation to Frequency;Cast;Cast To Boolean;Centre Tap;Compare To Constant;Compare To Zero;Complex to Magnitude-Angle HDL Optimized;Complex to Real-Imag;Constant;Correlate;Correlators;Correlators and threshold;Cyclic Prefix Correlation;DDC;Data Type Conversion;DataOut;Delay;Demux;Detect Increase;Detection Status;Diagnostics Bus Creation;Discrete FIR Filter HDL Optimized;Empty;Enabled Delay;Equal;FFT HDL Optimized;FIFO;FIR;FIR ;FR;FR1 + FR;FR1+FR;For Each;Frequency Correction and DDC;From;Gain;Goto;GreaterThan;HDL Counter;IFFT HDL Optimized;In;In Bus Element;Input Distributor;Logical Operator;MATLAB Function;Magnitude Squared;Magnitude Squared ;Magnitude Squared Thresh;MovingAverage;Multiphase Moving Average;Multiply;Multiply and IFFT;Multiport Switch;NCO HDL Optimized;NCellID;NCellID2In;NCellIDIn;NOT;OFDM Data Synchronization;OFDM Demod Controller;OFDM Demod Sync;OFDM Demodulate;OFDM Demodulator;OR;Out;Output Combiner;Overlap-add;PSS Buffer;PSS Correlator ;PSS Detection;PSS Diagnostics;PSS Info Serialization;PSS Peak Detectors;PSS Prefilter;PSS and CP Alignment;PSS search status;Polyphase Decimator;Pop;Product;Push;Real-Imag to Complex;Recombine phases;Reference;Relational Operator;Report Creation;SCS;SCS 120 Halfband Decimator;SCS 120 Rate Synchronizer;SCS 15 Halfband Decimator;SCS 240 Rate Synchronizer;SCS 30 Halfband Decimators;SCS 30 Rate Synchronizer;SSB Search and Demod;SSS Correlation Controller;SSS Detection;SSS Sequence LUT;SSS_Dot_Product;Search Timer;Select SCS;Selector;Shift Arithmetic;Signal Specification;Simple Dual Port RAM System;Sliding Sum;Split phases;Stage ;Start Controller;State Control;Stream Synchronizer;SubSystem;Subcarrier Spacing Selection;Subtract;Switch;Symbol Sum;Synchronous Enabled 128 Sample Delay ;Synchronous Enabled Unit Delay;Terminator;Threshold Limiter;Threshold Prescaling;ThresholdLimiter;Timing Ref Generator;Transient Removal;Unit Delay Enabled Resettable Synchronous;Unit Delay Enabled Synchronous;Vector Concatenate;Zero;accEnd;accStart;addrIn;bit reverse;clearStatus;coeff ROM;coeffs;complexConj;convertTimingOffset;corrOut;correlation;cpCorr;cpCorrValid;cpCorrelation;cpCorrelationValid;cpFreqOffset;cpFreqOffsetIn;cpFreqOffsetValid;cpToPssOffset;dataIn;dataOut;detectorValid;diagnostics;diagnosticsIn;diagnosticsOut;done;empty;en;gridData;gridValid;maxCorrelation;mode;nonEmpty;ofdmDemodSync;ofdmDemodSyncStart;ofdmDemodSyncValid;ofdmDemodSyncValidIn;ofdmDemodSyncValidOut;overlap add;params;paramsIn;paramsOut;phase;phase ;pkDetCorrelationIn;pkDetCorrelationOut;pkDetThresholdExceeded;pkDetThresholdIn;pkDetThresholdOut;pkDetValidIn;pkDetValidOut;pkLocation;pkReacquireFail;pop;pssCorrIn;pssCorrOut;pssCorrelation;pssCorrellationIn;pssDone;pssFound;pssFreqOffsetIn;pssFreqOffsetOut;pssFrequencyOffsetIn;pssSuccess;pssThreshold;pssThresholdIn;pssThresholdOut;pssTimingOffsetIn;pssTimingOffsetOut;pssTimingRef;pssTimingRefIn;pssTimingRefOut;pssValid;pssValidIn;pssValidOut;push;rdAddr;rdEn;reacquireFail;real;report;reportIn;reportValid;restart;rst;scs120Data;scs120Valid;scs15Data;scs15Valid;scs240Data;scs240Valid;scs30Data;scs30Valid;scsIn;scsOut;scsValid;searchCount;searchEn;selData;selValid;seqEnd;seqIn;seqNum;seqNumIn;seqNumOut;seqStart;ssGrid;ssGridValid;ssbDetectionCore;sssAddr;sssCorrelation;sssCorrelationValid;sssDone;sssMaxCorrelation;sssMaxCorrelationIn;sssSuccess;sssThresholdIn;start;startIn;startOfSSB;startOut;startProcessing;startPss;startRead;startTime;startTimeOut;startWrite;status;subcarrierSpacing;success;sync;syncOut;syncTime;targetCellID;targetTimingRef;threshold;thresholdExceeded;thresholdIn;thresholdOut;timingRef;timingRefIn;timingRefOut;validIn;validOut;winningSeqNum;wrAddr;wrEn;x;y

BLOCKTYPE:
ArithShift;Bit Concat;Bit Slice;Bitwise Operator;BusAssignment;BusCreator;BusSelector;Compare To Constant;Compare To Zero;Complex to Magnitude-Angle;ComplexToRealImag;Concatenate;Constant;DataTypeConversion;Delay;Demux;Detect Increase;Discrete FIR Filter;FFT;ForEach;From;Gain;Goto;HDL Counter;IFFT;Inport;Logic;Lookup_n-D;Math;MultiPortSwitch;NCO;OFDM Demodulator;Outport;Product;RealImagToComplex;RelationalOperator;S-Function;Selector;SignalSpecification;StateControl;Sum;Switch;Terminator;Unit Delay Enabled Resettable Synchronous;Unit Delay Enabled Synchronous;hdl.RAM

BLOCKTYPE_FREQUENCY:
1;3;28;4;2;3;7;10;1;1;11;4;18;54;298;52;3;17;1;3;2;17;2;17;1;409;38;2;1;27;1;1;353;11;9;11;45;1;3;21;32;8;65;7;13;14

PRODUCT:
Communications Toolbox;DSP HDL Toolbox;Fixed-Point Designer;HDL Verifier;MATLAB;Simulink;Wireless HDL Toolbox;Wireless HDL Toolbox Documentation


MODELNAME: viterbi_codegen
PATH: examples/hdlv_spchdl/main/viterbi_codegen.slx
ANNOTATION: Copyright 2011-2021 The MathWorks, Inc. Sample Delay: 148
BLOCKTYPE_FREQUENCY: 1;1;1;1;2;1;1;1;1;2;2;1;1;1
CHECKSUM: 9EEFF2240FFBC4AD3313B2CC2800F3E3
PRODUCT: Communications Toolbox;MATLAB;Simulink;Wireless HDL Toolbox
PRODUCT_BASECODE: CM;ES;LH
BLOCK:
AWGN Channel;BER of WHDL Block Implementation;BPSK Demodulator Baseband;BPSK Modulator Baseband;Bernoulli Binary Generator;Constant;Convolutional Encoder;Current value of Es/No (dB);Error Rate Calculation;In;Out;Reference;SubSystem;Subtract;Terminator;To Double;Viterbi_WHDL;WHDL_Data

BLOCKTYPE:
AWGN Channel;BPSK Demodulator Baseband;BPSK Modulator Baseband;Bernoulli Binary Generator;Constant;Convolutional Encoder;DataTypeConversion;Display;Error Rate Calculation;Inport;Outport;Sum;Terminator;Viterbi Decoder


MODELNAME: viterbi_modelsim
PATH: examples/hdlv_spchdl/main/viterbi_modelsim.slx
ANNOTATION: Sample Delay: 148 Copyright 2011-2021 The MathWorks, Inc. Sample Delay: 148
BLOCKTYPE_FREQUENCY: 1;1;1;1;3;1;2;2;2;2;2;1;1;2;1
CHECKSUM: CDBC9B3436CE7DD321A7CB06C2134407
PRODUCT: Communications Toolbox;HDL Verifier;MATLAB;Simulink;Wireless HDL Toolbox
PRODUCT_BASECODE: CM;ES;LH
BLOCK:
AWGN Channel;BER of HDL Cosimulation Implementation;BER of WHDL Block Implementation;BPSK Demodulator Baseband;BPSK Modulator Baseband;Bernoulli Binary Generator;Cast To Boolean;Constant;Convolutional Encoder;Current value of Es/No (dB);Error Rate Calculation;In;Out;Reference;Start Simulator;SubSystem;Subtract;Terminator;To Double;Viterbi_HDL;Viterbi_WHDL;WHDL_Data

BLOCKTYPE:
AWGN Channel;BPSK Demodulator Baseband;BPSK Modulator Baseband;Bernoulli Binary Generator;Constant;Convolutional Encoder;DataTypeConversion;Display;Error Rate Calculation;Inport;Outport;Simulink and ModelSim Cosimulation;Sum;Terminator;Viterbi Decoder


MODELNAME: viterbi_xcelium
PATH: examples/hdlv_spchdl/main/viterbi_xcelium.slx
ANNOTATION: Sample Delay: 148 Sample Delay: 148 Copyright 2011-2021 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;1;1;1;3;1;2;2;2;2;2;1;1;2;1
CHECKSUM: 5995FB3A9740D30011899BA7E488EA1D
PRODUCT: Communications Toolbox;HDL Verifier;MATLAB;Simulink;Wireless HDL Toolbox
PRODUCT_BASECODE: CM;ES;LH
BLOCK:
AWGN Channel;BER of HDL Cosimulation Implementation;BER of WHDL Block Implementation;BPSK Demodulator Baseband;BPSK Modulator Baseband;Bernoulli Binary Generator;Cast To Boolean;Constant;Convolutional Encoder;Current value of Es/No (dB);Error Rate Calculation;In;Out;Reference;Start Simulator;SubSystem;Subtract;Terminator;To Double;Viterbi_HDL;Viterbi_WHDL;WHDL_Data

BLOCKTYPE:
AWGN Channel;BPSK Demodulator Baseband;BPSK Modulator Baseband;Bernoulli Binary Generator;Constant;Convolutional Encoder;DataTypeConversion;Display;Error Rate Calculation;Inport;Outport;Simulink and Xcelium Cosimulation;Sum;Terminator;Viterbi Decoder


MODELNAME: FIL_videosharp
PATH: examples/hdlverifier/main/FIL_videosharp.slx
ANNOTATION: FIL block in the Streaming Video Sharpening with FPGA-in-the-Loop
BLOCKTYPE_FREQUENCY: 1;2;2;3;3;1;1;19;20;1;10;14;2
CHECKSUM: AA095FD00D37296E04606208F900524C
PRODUCT_BASECODE: ES;HD
BLOCK:
CbIn;CbOut;Chroma Resampling;Color Space Conversion;CrIn;CrOut;FIL Frame To Pixels;FIL Pixels To Frame;Frame Rate Display;Frame to Packet;From Multimedia File;HDL DUT;Matrix Concatenate;Original Video;Reference;Scope;Selector;Sharpened Video;Stream to Packet;Streaming 2-D FIR Filter;SubSystem;Terminator;Terminator_;YIn;YOut;ce_out;syncIn;syncIn_hEnd;syncIn_hStart;syncIn_vEnd;syncIn_vStart;syncIn_valid;syncOut;syncOut_hEnd;syncOut_hStart;syncOut_vEnd;syncOut_vStart;syncOut_valid

BLOCKTYPE:
Chroma Resampling;Color Space Conversion;Concatenate;FIL Frame To Pixels;FIL Pixels To Frame;Frame Rate Display;From Multimedia File;Inport;Outport;Scope;Selector;Terminator;VideoViewer

PRODUCT:
Computer Vision Toolbox;HDL Coder Documentation;Image Processing Toolbox;MATLAB;Simulink;Vision HDL Toolbox


MODELNAME: Framed_cosim_videosharp
PATH: examples/hdlverifier/main/Framed_cosim_videosharp.slx
ANNOTATION: Frame-Based Cosimulation
BLOCKTYPE_FREQUENCY: 1;2;2;3;3;1;16;1;11;11;1;10;1;13;2
CHECKSUM: 3F88AFE14D510EED1E8282673019DFE6
PRODUCT_BASECODE: ES;HD
BLOCK:
CbIn;CbOut;Chroma Resampling;Color Space Conversion;CrIn;CrOut;FIL Frame To Pixels;FIL Pixels To Frame;Frame Conversion;Frame Rate Display;Frame to Packet;From Multimedia File;Generate DLL;Matrix Concatenate;Original Video;Reference;Scope;Selector;Sharpened Video;Stream to Packet;Streaming 2-D FIR Filter;SubSystem;Terminator_;VisionHDL_Filter;YIn;YOut;syncIn;syncOut

BLOCKTYPE:
Chroma Resampling;Color Space Conversion;Concatenate;FIL Frame To Pixels;FIL Pixels To Frame;Frame Rate Display;FrameConversion;From Multimedia File;Inport;Outport;Scope;Selector;Simulink and Vivado Simulator Cosimulation;Terminator;VideoViewer

PRODUCT:
Computer Vision Toolbox;HDL Coder Documentation;HDL Verifier;Image Processing Toolbox;MATLAB;Simulink;Vision HDL Toolbox


MODELNAME: PulseGen_Chip
PATH: examples/hdlverifier/main/PulseGen_Chip.slx
BLOCKTYPE_FREQUENCY: 6;10;10;15;20;2;26;27;4;5;8;8;3;16
CHECKSUM: A6DB694E200CAAC3996FC1849EB640CF
PRODUCT: Fixed-Point Designer;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Processor Data Gen Processor Data Gen Processor Data Gen Data Gen Processor Data Gen SignalCompare_Blk with stimulus validOut_Blk with stimulus PulseOut_Blk with stimulus AbsVal_Blk with Stimulus PulseGen_Chip with Stimulus

BLOCK:
Abs;AbsVal_Blk;AbsVal_Stim;Add;Compare To Constant;Constant;Data Type Conversion;Delay;GreaterThan;Pulse Generator;PulseGen_Chip;PulseGen_Stim;PulseOut_Blk;PulseOut_Stim;Reference;SignalCompare_Blk;SignalCompare_Stim;Sine Wave;Step;SubSystem;Switch;ValidOut_Blk;ValidOut_Stim;bypass;data;data1_abs;data2_abs;data_out;pulse_sig;scope_absValBlk;scope_chip;scope_pulseOut;scope_sigCompare;scope_validOut;valid;valid_out

BLOCKTYPE:
Abs;Compare To Constant;Constant;DataTypeConversion;Delay;DiscretePulseGenerator;Inport;Outport;RelationalOperator;Scope;Sin;Step;Sum;Switch


MODELNAME: XilinxIPCosim
PATH: examples/hdlverifier/main/XilinxIPCosim.slx
BLOCKTYPE_FREQUENCY: 1;1;1;4;2;3;2;2;11;11;1;2;1;1;1;1;2;1;1
CHECKSUM: 6B021A422985DB2EFCF28124F05AC2A8
PRODUCT: DSP System Toolbox;Fixed-Point Designer;HDL Verifier;MATLAB;Signal Processing Toolbox;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Abs;BitRevOrder;Buffer;Complex to Real-Imag;Constant;Data;Data Source;Data Type Conversion;Data_Im;Data_Re;Delay;Enable;Frame;Generate DLL;ReadyIn;Real-Imag to Complex;Reference;Sink;Source;Spectrum Analyzer;SubSystem;Subsystem;Sum;Switch;To Workspace;ValidIn;Xilinx FFT IP Core ;dB Conversion;enb;frame;m_axis_data_tdata_im;m_axis_data_tdata_re;m_axis_data_tready;m_axis_data_tvalid;my_fft;s_axis_data_tdata_im;s_axis_data_tdata_re;s_axis_data_tready;s_axis_data_tvalid;u;vld;y

BLOCKTYPE:
Abs;Buffer;ComplexToRealImag;Constant;DataTypeConversion;Delay;Demux;EnablePort;Inport;Outport;RealImagToComplex;S-Function;Simulink and Vivado Simulator Cosimulation;SpectrumAnalyzer;Sum;Switch;Terminator;ToWorkspace;dB Conversion


MODELNAME: abs_manchestermodel
PATH: examples/hdlverifier/main/abs_manchestermodel.slx
BLOCKTYPE_FREQUENCY: 1;5;1;7;1;6;1;1;5;2;1;1;1;1;1;1
CHECKSUM: 41F0DAA116B875A59BB6A57DFD18C09D
PRODUCT: DSP System Toolbox;HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
  Phase/Frequency Error Controls Before running this model you must first launch ModelSim. You can launch ModelSim on this computer using either a shared memory link or a TCP/IP socket link. Shared memory link: 1) Be sure that the Connections tab of the Cosimulation block dialog is set as follows: The HDL simulator is running on this computer is checked and Shared memory is selected 2) Execute the following MATLAB command: vsim(tclstart,manchestercmds) 3) Start the Simulink simulation. TCP/IP socket link: 1) Be sure that the Connections tab of the Cosimulation block dialog is set as follows: The HDL simulator is running on this computer is checked and Socket is selected Port number or service matches the port number used in the command below. 2) Execute the following MATLAB command: vsim(tclstart,manchestercmds,socketsimulink,4442) 3) Start the Simulink simulation. Manchester Model Absolute Mode of Operation Time Scale Settings: 1s in Simulink corresponds to 1s in ModelSim  Copyright 2008-2010 The MathWorks, Inc.

BLOCK:
Bit Errors Scope;Conversion;Data Align;Dclk;Decoded Data;Decoded Raw;Demux;Encoded;Error Test;Frequency Error Range;Frequency Error Slider;Gateway Out;I;IL;IQ Capture;IQ Map;Input Data;LE;Manchester Encoder;ModelSim Startup Command(Shared Memory);ModelSim Startup Command(TCP/IP Socket);Modelsim Cosimulation Info;Orig Data;Orig Raw;Phase Event;Phase Offset;Q;QL;Reference;Sample and Hold;Signal Scope;SubSystem;Sum;Unit Delay;VHDL Manchester Receiver;background

BLOCKTYPE:
DSP Constant;DataTypeConversion;Demux;Inport;MATLABFcn;Outport;Record;RelationalOperator;Sample and Hold;Scope;SignalEditor;Simulink and ModelSim Cosimulation;Slider Gain;Sum;UnitDelay;VHDL Manchester Receiver Demo Info


MODELNAME: behavioral_mimo
PATH: examples/hdlverifier/main/behavioral_mimo.slx
ANNOTATION: Copyright 2007-2022 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;1;4;2;1;3;9;30;38;2;1;4;1;5;25;1;25;187;9;1;12;168;17;1;4;2;1;12;4;2;22;2;3;2;40
CHECKSUM: C5B8761D8BE8B4A7B02FC2D70CCE9808
PRODUCT: Communications Toolbox;Embedded Coder;Fixed-Point Designer;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;1/hkk;AWGN Channel;BPSK Modulator Baseband;Bernoulli Binary Generator;CM;Channel Matrix;Compare To Constant;Complex to Real-Imag;ComputeE;Constant;Conversion;CoreEngine;CoreEngine_BC;DA;DB;DC;DI;Data Type Conversion;Data Type Conversion ;DataSelection;Decode_Done;Decomposition;Delaysystem;Display;DoneA;DoneB;DoneC;DoneInit;DoneS;Donegen;Doneinit;EA;EB;EC;EI;Embedded_Controller;EnA;EnB;EnC;EnInit;EnS;Enable;EnableA;EnableB;EnableC;EnableInit;Enablecoder;Enabled Subsystem;Enabled signalgen;Encoder_enabled;Ens_gen;Error;Error Rate Calculation;ErrorRate Calculation;FSMSubsystem;Frame Conversion;From;G;Gain;Goto;H;Hkk;Hkk_k;In;Index Vector;Integer Delay;Logical Operator;MIMODecoder;MIMOSubsystem;Manual Switch;MatrixProduct;MatrixSelection;Out;Preprocessing;Product;Q;Quantizing Encoder;Reference;Reshape;Rx;Rx_decoded;Rx_transform;Scope;Selector;Sign;Step;SubSystem;Subtract;Sum;Sum of Elements;Switch;Terminator;Tx;Uk;Unary Minus;Unit Delay;Vector Concatenate;X;bestu;distA;distk;distk_k;distout;e;eA;eAout;eBCout;e_kk;ekk;h;hOut;k;kA;kAout;kC;kCout;nd;ndA;ndAout;ndB;ndBout;ndC;ndCout;ndI;ndIout;newdist;reout;stateA_SL;stateB_SL;stateC_SL;stateInit_SL;step;stepA;stepB;stepC;stepk;stepk_k;stepkk;stepout;u;uA;uB;uC;uk;uk_k;ukk;uout;x;y;yA;yB;yC;yI;yout

BLOCKTYPE:
AWGN Channel;BPSK Modulator Baseband;Bernoulli Binary Generator;Compare To Constant;ComplexToRealImag;Concatenate;Constant;DataTypeConversion;Delay;Demux;Display;EnablePort;Error Rate Calculation;FrameConversion;From;Gain;Goto;Inport;Logic;ManualSwitch;MultiPortSwitch;Outport;Product;Quantizing Encoder;Reshape;S-Function;Scope;Selector;Signum;Step;Sum;Switch;Terminator;UnaryMinus;UnitDelay


MODELNAME: cosim_mimo
PATH: examples/hdlverifier/main/cosim_mimo.slx
ANNOTATION: Copyright 2007-2022 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;14;1;4;2;14;1;3;9;30;38;4;1;4;1;5;50;1;25;215;9;1;12;6;168;17;1;4;2;15;12;4;2;36;2;3;2;40
CHECKSUM: DAA447173EAD8B7A9D580CACD4963FB6
PRODUCT: Communications Toolbox;Embedded Coder;Fixed-Point Designer;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;1/hkk;AWGN Channel;AssertEq;Assert_Out;BPSK Modulator Baseband;Bernoulli Binary Generator;CM;Channel Matrix;CheckEqual;Compare To Constant;Complex to Real-Imag;ComputeE;Constant;Conversion;CoreEngine;CoreEngine_BC;CosimSubsystem;DA;DB;DC;DI;Data Type Conversion;Data Type Conversion ;DataSelection;Decode_Done;Decomposition;Delaysystem;Demux;Diff;Display;DoneA;DoneB;DoneC;DoneInit;DoneS;Donegen;Doneinit;EA;EB;EC;EI;Embedded_Controller;EnA;EnB;EnC;EnInit;EnS;Enable;EnableA;EnableB;EnableC;EnableInit;Enablecoder;Enabled Subsystem;Enabled signalgen;Encoder_enabled;Ens_gen;Error;Error Rate Calculation;ErrorRate Calculation;Frame Conversion;From;G;Gain;Goto;H;Hkk;Hkk_k;In;Index Vector;Integer Delay;Logical Operator;MIMODecoder;MIMOSubsystem;Manual Switch;MatrixProduct;MatrixSelection;Mux;Out;Preprocessing;Product;Q;Quantizing Encoder;Reference;Reshape;Rx;Rx_decoded;Rx_transform;Scope;Selector;Sign;Step;SubSystem;Subtract;Sum;Sum of Elements;Switch;Terminator;Tx;Uk;Unary Minus;Unit Delay;Vector Concatenate;X;bestu;compare: Out;cosim;distA;distk;distk_k;distout;dut;e;eA;eAout;eBCout;e_kk;ekk;h;hOut;k;kA;kAout;kC;kCout;nd;ndA;ndAout;ndB;ndBout;ndC;ndCout;ndI;ndIout;newdist;reout;stateA_SL;stateB_SL;stateC_SL;stateInit_SL;step;stepA;stepB;stepC;stepk;stepk_k;stepkk;stepout;u;uA;uB;uC;uk;uk_k;ukk;uout;x;y;yA;yB;yC;yI;yout

BLOCKTYPE:
AWGN Channel;Assertion;BPSK Modulator Baseband;Bernoulli Binary Generator;Compare To Constant;Compare To Zero;ComplexToRealImag;Concatenate;Constant;DataTypeConversion;Delay;Demux;Display;EnablePort;Error Rate Calculation;FrameConversion;From;Gain;Goto;Inport;Logic;ManualSwitch;MultiPortSwitch;Mux;Outport;Product;Quantizing Encoder;Reshape;S-Function;Scope;Selector;Signum;Step;Sum;Switch;Terminator;UnaryMinus;UnitDelay


MODELNAME: cruise_control_incisive
PATH: examples/hdlverifier/main/cruise_control_incisive.slx
ANNOTATION: Compute the target speed Determine if the control is active Copyright 2011 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 2;2;6;1;1;1;2;13;3;9;6;2;1;1;4;3;2
CHECKSUM: 11395A0486B28F4D316DBD42E6198E45
PRODUCT: HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Assertion - target;Assertion - throt;Cast;Constant;Discrete-Time Integrator;Enable;In;Inputs;Kp;Logical Operator;Out;PI Controller;Reference;Relational Operator;Size-Type;SubSystem;Sum;Switch;Sync;Test Case Explanation;Unit Delay;brake;cruise_control;dec;enable;error;hdl_cruise_control;inc;set;speed;target;throt

BLOCKTYPE:
Assertion;Constant;DataTypeConversion;DiscreteIntegrator;DocBlock;EnablePort;Gain;Inport;Logic;Outport;RateTransition;RelationalOperator;SignalEditor;Simulink and Xcelium Cosimulation;Sum;Switch;UnitDelay


MODELNAME: cruise_control_modelsim
PATH: examples/hdlverifier/main/cruise_control_modelsim.slx
ANNOTATION: Compute the target speed Determine if the control is active Copyright 2011 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 2;2;6;1;1;1;2;13;3;9;6;2;1;1;4;3;2
CHECKSUM: 5FF585DBDAB734BF319DABF8BC0490F0
PRODUCT: HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Assertion - target;Assertion - throt;Cast;Constant;Discrete-Time Integrator;Enable;In;Inputs;Kp;Logical Operator;Out;PI Controller;Reference;Relational Operator;Size-Type;SubSystem;Sum;Switch;Sync;Test Case Explanation;Unit Delay;brake;cruise_control;dec;enable;error;hdl_cruise_control;inc;set;speed;target;throt

BLOCKTYPE:
Assertion;Constant;DataTypeConversion;DiscreteIntegrator;DocBlock;EnablePort;Gain;Inport;Logic;Outport;RateTransition;RelationalOperator;SignalEditor;Simulink and ModelSim Cosimulation;Sum;Switch;UnitDelay


MODELNAME: drv_and_mon_uvmtb
PATH: examples/hdlverifier/main/drv_and_mon_uvmtb.slx
ANNOTATION: Copyright 2020 The MathWorks, Inc. Include Driver and Monitor in UVM Test Bench
BLOCKTYPE_FREQUENCY: 1;1;1;1;3;7;3;3;3;17;1;12;2;1;3;1;3;4;3;3
CHECKSUM: C8236830226C7CDC5071662A71197574
PRODUCT: DSP System Toolbox;Fixed-Point Designer;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Abs;Add;Buffer;Check Static Range;CircShiftDenVec;CircShiftNumVec;Constant;CordicResultScalar;CordicResultVec;Data Type Conversion;Delay;DenScalar;DenVec;Denominator;Divide;DivideChecker;IsNaN;Matrix Multiply;NOT;NaN;NumScalar;NumVec;Numerator;Pipelined_Cordic_Divide;Reference;Result;ScalarToVector;Scope;SubSystem;Subtract;Terminator;Threshold_error_check;To File;Unbuffer;ValidIn;ValidOut;Vector Concatenate;VectorGenerator;VectorToScalar;k;math_fcn_replacement_divide;u;y

BLOCKTYPE:
Abs;Assertion for DPI-C;Buffer;Checks_SRange;Concatenate;Constant;DataTypeConversion;Delay;Demux;Inport;Logic;Outport;Product;RelationalOperator;S-Function;Scope;Sum;Terminator;ToFile;Unbuffer


MODELNAME: edge_detection_VHDL
PATH: examples/hdlverifier/main/edge_detection_VHDL.slx
BLOCKTYPE_FREQUENCY: 3;2;1;1;2;3;2;1;1;1;1;6;5;1;5;1;2;1;1;1;2;1;1;3
CHECKSUM: DED185DA2E55AF59CC612FF309CBDAD9
PRODUCT: Computer Vision Toolbox;DSP System Toolbox;HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
The selector and the zero padding is to make up for for the one sample delay introduced by ModelSim This subsystem recreates the image from a stream of data. The output rate in this case is less than the input rate. This subsystem converts a matrix to a serial stream of data. Since this is a model of a real-time system, the output rate is much higher than the input rate. In this example, the output rate is 20000 times more than the input rate. This is represented in Simulink by a red signal at the output versus a green signal at the input. Press Ctrl+D to update the model and see the sampling time colors. VHDL Cosimulation, Simulink and ModelSim Copyright 2005-2009 The MathWorks, Inc.

BLOCK:
2-D FIR Filter;Abs;Add;Bitwise Operator;Buffer;Compare;Compare To Constant;Convert 1-D to 2-D;Convert 2-D to 1-D;Convert to a Serial Stream;Data Type Conversion;Delay;Edges;Elaborated Design;Executable Specifcation;Frame Conversion;Image From File;In;Info;Input Image;Input image;Math Function;Mean;Mean Difference;ModelSim Startup Command;Out;Output Image;Pad;Recreate Image;Reference;Selector;Serial Steam;Serial Stream;Sobel Edge Detection;SubSystem;Submatrix;Transpose;Unbuffer;VHDL Cosimulation

BLOCKTYPE:
2-D FIR Filter;Abs;Bitwise Operator;Buffer;Compare To Constant;DataTypeConversion;Delay;Display;FrameConversion;Image From File;Info;Inport;Math;Mean;Outport;Pad;Reshape;Selector;Simulink and ModelSim Cosimulation;Submatrix;Sum;Unbuffer;VHDL Manchester Receiver Demo Info;VideoViewer


MODELNAME: edge_detection_Verilog
PATH: examples/hdlverifier/main/edge_detection_Verilog.slx
BLOCKTYPE_FREQUENCY: 3;2;1;1;2;3;2;1;1;1;1;6;5;1;5;1;2;1;1;1;2;1;1;3
CHECKSUM: 9C93E3E2C5DC270F488C2BD39C164978
PRODUCT: Computer Vision Toolbox;DSP System Toolbox;HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
The selector and the zero padding is to make up for for the one sample delay introduced by ModelSim This subsystem recreates the image from a stream of data. The output rate in this case is less than the input rate. This subsystem converts a matrix to a serial stream of data. Since this is a model of a real-time system, the output rate is much higher than the input rate. In this example, the output rate is 20000 times more than the input rate. This is represented in Simulink by a red signal at the output versus a green signal at the input. Press Ctrl+D to update the model and see the sampling time colors. Verilog Cosimulation, Simulink and ModelSim Copyright 2005-2009 The MathWorks, Inc.

BLOCK:
2-D FIR Filter;Abs;Add;Bitwise Operator;Buffer;Compare;Compare To Constant;Convert 1-D to 2-D;Convert 2-D to 1-D;Convert to a Serial Stream;Data Type Conversion;Delay;Edges;Elaborated Design;Executable Specifcation;Frame Conversion;Image From File;In;Info;Input Image;Input image;Math Function;Mean;Mean Difference;ModelSim Startup Command;Out;Output Image;Pad;Recreate Image;Reference;Selector;Serial Steam;Serial Stream;Sobel Edge Detection;SubSystem;Submatrix;Transpose;Unbuffer;Verilog Cosimulation

BLOCKTYPE:
2-D FIR Filter;Abs;Bitwise Operator;Buffer;Compare To Constant;DataTypeConversion;Delay;Display;FrameConversion;Image From File;Info;Inport;Math;Mean;Outport;Pad;Reshape;Selector;Simulink and ModelSim Cosimulation;Submatrix;Sum;Unbuffer;VHDL Manchester Receiver Demo Info;VideoViewer


MODELNAME: edge_detection_design
PATH: examples/hdlverifier/main/edge_detection_design.slx
ANNOTATION: Design and Verification Copyright 2005-2009 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 4;2;1;2;3;1;1;1;3;2;1;2;1;2;3
CHECKSUM: 850241AB9D88A4569D4262103AC5ABEF
PRODUCT: Computer Vision Toolbox;DSP System Toolbox;HDL Coder Documentation;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
2-D FIR Filter;Abs;Add;Bitwise Operator;Compare;Compare To Constant;Data Type Conversion;Difference;Edges;Elaborated Design;Executable Specifcation;Image From File;In;Info;Input Image;Math Function;Mean;Mean Difference;Out;Reference;Sobel Edge Detection;SubSystem

BLOCKTYPE:
2-D FIR Filter;Abs;Bitwise Operator;Compare To Constant;DataTypeConversion;Display;Image From File;Info;Inport;Math;Mean;Outport;Sqrt;Sum;VideoViewer


MODELNAME: edge_detection_elaborate
PATH: examples/hdlverifier/main/edge_detection_elaborate.slx
BLOCKTYPE_FREQUENCY: 4;2;1;1;2;2;3;6;1;1;1;1;7;4;1;6;2;1;1;2;1;3
CHECKSUM: A90F344DE326615AA1C9675BF5DE8D33
PRODUCT: Computer Vision Toolbox;DSP System Toolbox;HDL Coder Documentation;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
This is an implementation of the 2D-filtering operation. As you see, two line buffers are used. This design takes us one step closer to hardware implementation. This subsystem recreates the image from a stream of data. The output rate in this case is less than the input rate. This subsystem converts a matrix to a serial stream of data. Since this is a model of a real-time system, the output rate is much higher than the input rate. In this example, the output rate is 20000 times more than the input rate. This is represented in Simulink by a red signal at the output versus a green signal at the input. Press Ctrl+D to update the model and see the sampling time colors. Elaboration and Verification Copyright 2005-2009 The MathWorks, Inc.

BLOCK:
2-D FIR Filter;Abs;Add;Bitwise Operator;Buffer;Compare;Compare To Constant;Convert 1-D to 2-D;Convert 2-D to 1-D;Convert to a Serial Stream;Data Type Conversion;Delay;Difference;Edges;Elaborated Design;Executable Specifcation;Filter;Filter In;Filter Out;Frame Conversion;Image From File;In;Info;Input Image;Input image;Line buffer;Math Function;Matrix Concatenation;Mean;Mean Difference;Out;Output Image;Recreate Image;Reference;Serial Stream;Sobel Edge Detection;SubSystem;Submatrix;Transpose;Unbuffer

BLOCKTYPE:
2-D FIR Filter;Abs;Bitwise Operator;Buffer;Compare To Constant;Concatenate;DataTypeConversion;Delay;Display;FrameConversion;Image From File;Info;Inport;Math;Mean;Outport;Reshape;Sqrt;Submatrix;Sum;Unbuffer;VideoViewer


MODELNAME: edge_detection_executable_specification
PATH: examples/hdlverifier/main/edge_detection_executable_specification.slx
ANNOTATION: Executable Specification / Golden Reference Copyright 2005-2009 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 2;1;1;1;1;3;1;1;2
CHECKSUM: 913A4B2203093668685E3E2855318944
PRODUCT: Computer Vision Toolbox;HDL Coder Documentation;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
2-D FIR Filter;Add;Compare To Constant;Data Type Conversion;Edges;Executable Specification/Edges;Image From File;Input Image;Math Function;Original Image;Reference;Sobel Edge Detection;SubSystem

BLOCKTYPE:
2-D FIR Filter;Compare To Constant;DataTypeConversion;Image From File;Inport;Math;Outport;Sum;VideoViewer


MODELNAME: edge_detection_vlog_incisive
PATH: examples/hdlverifier/main/edge_detection_vlog_incisive.slx
BLOCKTYPE_FREQUENCY: 3;2;1;1;2;3;2;1;1;1;1;6;5;1;5;1;2;1;1;1;2;1;3
CHECKSUM: C20BDFDC6AD685DAD37F17FA934D8CF0
PRODUCT: Computer Vision Toolbox;DSP System Toolbox;HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
The selector and the zero padding are to make up for for the one sample delay introduced by the Cosimulation Block. This subsystem recreates the image from a stream of data. The output rate in this case is less than the input rate. This subsystem converts a matrix to a serial stream of data. Since this is a model of a real-time system, the output rate is much higher than the input rate. In this example, the output rate is 20000 times more than the input rate. This is represented in Simulink by a red signal at the output versus a green signal at the input. Press Ctrl+D to update the model and see the sampling time colors. Verilog Cosimulation, Simulink and the Cadence Incisive Simulator Copyright 2006-2021 The MathWorks, Inc. nclaunch( ... rundir, TEMPDIR, ... tclstart, { ... [exec xmvlog -64bit -linedebug vlogFiles{:}], ... exec xmelab -64bit -access +rwc filter2d, ... hdlsimulink -gui filter2d ... } ... ); Running a Cosimulation 1. Click the command to the right to compile the HDL and launch the HDL simulator. 2. Perform any debug setup in the HDL simulator such as setting breakpoints or creating signal probes. 3. Start the cosimulation in Simulink by choosing either Simulation/Start or Tools/Simulink Debugger.

BLOCK:
2-D FIR Filter;Abs;Add;Bitwise Operator;Buffer;Compare;Compare To Constant;Convert 1-D to 2-D;Convert 2-D to 1-D;Convert to a Serial Stream;Data Type Conversion;Delay;Edges;Elaborated Design;Executable Specifcation;Frame Conversion;HDL 2-D FIR Filter;Image From File;In;Info;Input Image;Input image;Math Function;Mean;Mean Difference;Out;Output Image;Pad;Recreate Image;Reference;Selector;Serial Stream;Simulink Blockset 2-D FIR Filter;Sobel Edge Detection;SubSystem;Submatrix;Transpose;Unbuffer;Verilog Cosimulation

BLOCKTYPE:
2-D FIR Filter;Abs;Bitwise Operator;Buffer;Compare To Constant;DataTypeConversion;Delay;Display;FrameConversion;Image From File;Info;Inport;Math;Mean;Outport;Pad;Reshape;Selector;Simulink and Xcelium Cosimulation;Submatrix;Sum;Unbuffer;VideoViewer


MODELNAME: fil_duc_model
PATH: examples/hdlverifier/main/fil_duc_model.slx
ANNOTATION: Copyright 2010 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;1;2;10;54;1;84;2;9;2;8;1;1;91;2;5
CHECKSUM: 303205590623A1B020B496D2C30BCE00
PRODUCT: DSP System Toolbox;Fixed-Point Designer;MATLAB;Signal Processing Toolbox;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Abs;CombCast;CombDelay;CombSum;ConvertIn;ConvertOut;Error;Error Margin;Filter;Ground;HDL Latency;In;Input;IntDelay;IntSum;InterpSys;Out;Output;Place Holder;Rate Transition;Reference;Scope;Stage;SubSystem;Terminator;Test Stimulus;Up Sample;bodygain1(10);bodygain1(11);bodygain1(12);bodygain1(13);bodygain1(14);bodygain1(15);bodygain1(16);bodygain1(17);bodygain1(18);bodygain1(19);bodygain1(2);bodygain1(20);bodygain1(21);bodygain1(22);bodygain1(23);bodygain1(24);bodygain1(25);bodygain1(26);bodygain1(27);bodygain1(28);bodygain1(29);bodygain1(3);bodygain1(30);bodygain1(31);bodygain1(32);bodygain1(4);bodygain1(5);bodygain1(6);bodygain1(7);bodygain1(8);bodygain1(9);bodygain2(10);bodygain2(11);bodygain2(12);bodygain2(13);bodygain2(14);bodygain2(15);bodygain2(16);bodygain2(17);bodygain2(18);bodygain2(19);bodygain2(2);bodygain2(20);bodygain2(21);bodygain2(22);bodygain2(23);bodygain2(24);bodygain2(25);bodygain2(26);bodygain2(27);bodygain2(28);bodygain2(29);bodygain2(3);bodygain2(30);bodygain2(31);bodygain2(4);bodygain2(5);bodygain2(6);bodygain2(7);bodygain2(8);bodygain2(9);bodysum(1);bodysum(2);delay;headgain1(1);headgain2(1);input;multiswitch;output;ringcounter;shareddelay;upsamp

BLOCKTYPE:
Abs;Compare To Constant;Counter Limited;DataTypeConversion;Delay;FromWorkspace;Gain;Ground;Inport;MultiPortSwitch;Outport;RateTransition;Scope;Sum;Terminator;Upsample


MODELNAME: fil_pid
PATH: examples/hdlverifier/main/fil_pid.slx
ANNOTATION: a Copyright 2010-2011 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 4;4;6;6;4;7;1;1;1;5;3;2
CHECKSUM: 8E799A7A3398FE653F8CB41E4CF1809B
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
A/D Converter;Add;Controller;D/A Converter;DC Motor;D_component;Data Type Conversion;Gain;Gain ;I_component;In;Integrator;Out;Pulse Generator;Rate Transition;Saturation;Scope;Stimulus;SubSystem;Sum;Unit Delay;Unit Delay ;Zero-Order Hold;aTOv;control_signal;error_d;vTOx

BLOCKTYPE:
DataTypeConversion;DiscretePulseGenerator;Gain;Inport;Integrator;Outport;RateTransition;Saturate;Scope;Sum;UnitDelay;ZeroOrderHold


MODELNAME: fil_sobel_model
PATH: examples/hdlverifier/main/fil_sobel_model.slx
BLOCKTYPE_FREQUENCY: 2;2;2;1;2;1;2;2;4;1;2;7;3;1;4;2;2
CHECKSUM: C4B80F1079AE2DA45761BC22C481F277
PRODUCT_BASECODE: ES;HD
ANNOTATION:
This subsystem recreates the image from a stream of data. The output rate in this case is less than the input rate. This subsystem recreates the image from a stream of data. The output rate in this case is less than the input rate. Copyright 2011-2012 The MathWorks, Inc.

BLOCK:
 Demux ; SFunction ; Terminator ;Buffer;Constant;Convert 1-D to 2-D;Counter Limited;DelayIn;DelayOut;Direct Lookup Table (n-D);Frame Conversion;Ground;Matrix Concatenate;Out;Place Holder;Reference;Reshape;SobelEdge_FPGA;SubSystem;Submatrix;Terminator;Transpose;deserialize;e;edge_hardware;fin ;fout;imgout;serialin;sobel_edge_eml;sobel_edge_hardware;u

BLOCKTYPE:
Buffer;Concatenate;Constant;Counter Limited;Delay;Demux;FrameConversion;Ground;Inport;LookupNDDirect;Math;Outport;Reshape;S-Function;Submatrix;Terminator;VideoViewer

PRODUCT:
Computer Vision Toolbox;DSP System Toolbox;Fixed-Point Designer;HDL Coder Documentation;MATLAB;Simulink


MODELNAME: gm_fil_codegen_mimo_fil
PATH: examples/hdlverifier/main/gm_fil_codegen_mimo_fil.slx
ANNOTATION: Copyright 2007-2022 The MathWorks, Inc. Place FIL block here
BLOCKTYPE_FREQUENCY: 1;2;1;4;2;2;1;3;9;30;38;5;1;4;1;5;31;1;31;202;9;1;12;1;199;17;1;4;2;3;12;4;2;24;2;4;2;40
CHECKSUM: 3D5FF9638AB0FB4CD7A3CDD012FD31B8
PRODUCT: Communications Toolbox;Embedded Coder;Fixed-Point Designer;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;1/hkk;AWGN Channel;AssertEq;Assert_Decode_Done;Assert_Rx_decoded;BPSK Modulator Baseband;Bernoulli Binary Generator;CM;Channel Matrix;CheckEqual;CleanupScopes;Compare;Compare To Constant;Complex to Real-Imag;ComputeE;Constant;Conversion;CoreEngine;CoreEngine_BC;DA;DB;DC;DI;Data Type Conversion;Data Type Conversion ;DataSelection;Decode_Done;Decomposition;Delaysystem;Diff;Display;DoneA;DoneB;DoneC;DoneInit;DoneS;Donegen;Doneinit;EA;EB;EC;EI;Embedded_Controller;EnA;EnB;EnC;EnInit;EnS;Enable;EnableA;EnableB;EnableC;EnableInit;Enablecoder;Enabled Subsystem;Enabled signalgen;Encoder_enabled;Ens_gen;Error;Error Rate Calculation;ErrorRate Calculation;FIL;FSMSubsystem;Frame Conversion;From;FromFILSrc;G;Gain;Goto;H;Hkk;Hkk_k;In;Index Vector;Integer Delay;Logical Operator;MIMODecoder;MIMOSubsystem;Manual Switch;MatrixProduct;MatrixSelection;Out;Preprocessing;Product;Q;Quantizing Encoder;Reference;Reshape;Rx;Rx_decoded;Rx_transform;Scope;Selector;Sign;Step;SubSystem;Subtract;Sum;Sum of Elements;Switch;Terminator;ToFILSink;ToFILSrc;Tx;Uk;Unary Minus;Unit Delay;Vector Concatenate;X;bestu;compare: Decode_Done;compare: Rx_decoded;demux;distA;distk;distk_k;distout;dut;e;eA;eAout;eBCout;e_kk;ekk;from;goto;h;hOut;in;k;kA;kAout;kC;kCout;mux;nd;ndA;ndAout;ndB;ndBout;ndC;ndCout;ndI;ndIout;newdist;out;reout;stateA_SL;stateB_SL;stateC_SL;stateInit_SL;step;stepA;stepB;stepC;stepk;stepk_k;stepkk;stepout;u;uA;uB;uC;uk;uk_k;ukk;uout;x;y;yA;yB;yC;yI;yout

BLOCKTYPE:
AWGN Channel;Assertion;BPSK Modulator Baseband;Bernoulli Binary Generator;Compare To Constant;Compare To Zero;ComplexToRealImag;Concatenate;Constant;DataTypeConversion;Delay;Demux;Display;EnablePort;Error Rate Calculation;FrameConversion;From;Gain;Goto;Inport;Logic;ManualSwitch;MultiPortSwitch;Mux;Outport;Product;Quantizing Encoder;Reshape;S-Function;Scope;Selector;Signum;Step;Sum;Switch;Terminator;UnaryMinus;UnitDelay


MODELNAME: hdlcoderviterbi_for_fil
PATH: examples/hdlverifier/main/hdlcoderviterbi_for_fil.slx
BLOCKTYPE_FREQUENCY: 1;33;1;1;1;65;1;1;8;1;35;38;49;1;1;1;2;491;1;1;44;363;70;2;1;5;137;77;2;4;46;32
CHECKSUM: FF70DC522B3CF220AA0CA7EA1AB7A600
PRODUCT: Communications Toolbox;DSP System Toolbox;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
DESCRIPTION:
Viterbi Decoder Using Simulink(R) Blocks This model shows how to use Simulink(R) HDL Coder(TM) to check, generate, and verify HDL for a fixed-point Viterbi decoder model built using Simulink(R) blocks.

ANNOTATION:
If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 If Sum0>Sum1, decide in favor of Sum1, i.e., DEC==1 Input Value Interpretation 0 Most confident zero 1 Second most confident zero 2 Third most confident zero 3 Least confident zero 4 Least confident one 5 Third most confident one 6 Second most confident one 7 Most confident one  Copyright 2010-2011 The MathWorks, Inc.

BLOCK:
ACS;ACS Unit;AWGN Channel;Add;BM;BMC Unit;BPSK Demodulator Baseband;BPSK Modulator Baseband;Bernoulli Binary Generator;Bitwise AND with Mask;Bitwise Operator;Buffer;Butterfly;C;Compare To Constant;Constant;Convert 1-D to 2-D;Convolutional Encoder;DEC;Data Type Conversion;Delay;Demux;Display;Double Butterfly;Error Rate Calculation;Frame Conversion;IDX;IN;In;Logical Operator;Multiport Selector;Mux;NSM;OUT;Out;Reference;Relational Operator;Renormalize;Reorder;Reshape;SM;Scope;Selector;Shift Arithmetic;Store State Metrics;SubSystem;Subtract;Sum;Sum of Elements;Switch;Terminator;To Double;Traceback;Unbuffer;Unit Delay;Variable Selector;viterbi_block

BLOCKTYPE:
AWGN Channel;ArithShift;BPSK Demodulator Baseband;BPSK Modulator Baseband;Bernoulli Binary Generator;Bitwise Operator;Buffer;Compare To Constant;Constant;Convolutional Encoder;DataTypeConversion;Delay;Demux;Display;Error Rate Calculation;FPGA-in-the-Loop (FIL);FrameConversion;Inport;Logic;Multiport Selector;Mux;Outport;RelationalOperator;Reshape;Scope;Selector;Sum;Switch;Terminator;Unbuffer;UnitDelay;Variable Selector


MODELNAME: hdlv_uvmbuild
PATH: examples/hdlverifier/main/hdlv_uvmbuild.slx
ANNOTATION: Copyright 2019 The Mathworks, Inc.
BLOCKTYPE_FREQUENCY: 4;2;3;1;2;1;3;2;3;1;2;1;2
CHECKSUM: 2B373373C4028784AD447EDB54EC42B1
PRODUCT: HDL Verifier;MATLAB;Simulink;Simulink Test
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; Ground ; SFunction ; Terminator ;Assertion;Compare To Constant;Constant;DUT;Delay;GreaterThan;In;InpCounter;Logical Operator;Out;Reference;Scope;Scoreboard;Sequence;SubSystem;Test Assessment;counter

BLOCKTYPE:
Assertion for DPI-C;Compare To Constant;Constant;Delay;Demux;Ground;Inport;Logic;Outport;RelationalOperator;S-Function;Scope;Terminator


MODELNAME: manchester_batch
PATH: examples/hdlverifier/main/manchester_batch.slx
BLOCKTYPE_FREQUENCY: 1;5;1;1;7;1;6;1;1;5;2;1;1;1;1;1
CHECKSUM: 069ACDD07E92A0083D854BC7EC993F53
PRODUCT: DSP System Toolbox;HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Phase/Frequency Error Controls Copyright 2003-2010 The MathWorks, Inc. Double-click the commands to the right to start cosimulation. We execute the following steps in those commands 1. Start ModelSim(R) HDL simulator in batch mode by specifying runmode property of vsim command 2. Wait until HDL simulator is ready for cosimulation by using pingHdlSim command 3. Start cosimulation 

BLOCK:
Bit Errors Scope;Conversion;Cosimulation Startup Command;Data Align;Dclk;Decoded Data;Decoded Raw;Demux;Encoded;Error Test;Frequency Error Range;Frequency Error Slider;Gateway Out;I;IL;IQ Capture;IQ Map;Info;Input Data;LE;Manchester Encoder;Orig Data;Orig Raw;Phase Event;Phase Offset;Q;QL;Reference;Sample and Hold;Signal Scope;SubSystem;Sum;Unit Delay;VHDL Manchester Receiver;background

BLOCKTYPE:
DSP Constant;DataTypeConversion;Demux;Info;Inport;MATLABFcn;Outport;Record;RelationalOperator;Sample and Hold;Scope;SignalEditor;Simulink and ModelSim Cosimulation;Slider Gain;Sum;UnitDelay


MODELNAME: manchester_batch_incisive
PATH: examples/hdlverifier/main/manchester_batch_incisive.slx
BLOCKTYPE_FREQUENCY: 1;5;1;1;7;1;6;1;1;5;2;1;1;1;1;1
CHECKSUM: D1B64BABF49267CE93BE433311387361
PRODUCT: DSP System Toolbox;HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Phase/Frequency Error Controls Copyright 2006-2021 The MathWorks, Inc. nclaunch( ... rundir, TEMPDIR, ... tclstart, { ... [exec xmvlog -64bit -linedebug vlogFiles{:}], ... exec xmelab -64bit -access +rwc manchester, ... hdlsimulink manchester }, ... runmode, Batch); pingHdlSim(100); sim(manchester_batch_incisive,[0 50000]); % Single-click here to start cosimulation Click the commands to the right to start cosimulation. We execute the following steps in those commands 1. Start Xcelium(R) HDL simulator in batch mode by specifying runmode property of nclaunch command 2. Wait until HDL simulator is ready for cosimulation by using pingHdlSim command 3. Start cosimulation  Cosimulation Startup Command

BLOCK:
Bit Errors Scope;Conversion;Data Align;Dclk;Decoded Data;Decoded Raw;Demux;Encoded;Error Test;Frequency Error Range;Frequency Error Slider;Gateway Out;HDL Manchester Receiver;I;IL;IQ Capture;IQ Map;Info;Input Data;LE;Manchester Encoder;Orig Data;Orig Raw;Phase Event;Phase Offset;Q;QL;Reference;Sample and Hold;Signal Scope;SubSystem;Sum;Unit Delay;background

BLOCKTYPE:
DSP Constant;DataTypeConversion;Demux;Info;Inport;MATLABFcn;Outport;Record;RelationalOperator;Sample and Hold;Scope;SignalEditor;Simulink and Xcelium Cosimulation;Slider Gain;Sum;UnitDelay


MODELNAME: manchestermodelcommblks
PATH: examples/hdlverifier/main/manchestermodelcommblks.slx
BLOCKTYPE_FREQUENCY: 1;1;6;1;1;1;1;7;1;6;1;5;1;1;1;1;1;1
CHECKSUM: 65620623278158D50BA1DF5CFD33CA48
PRODUCT: Communications Toolbox;DSP System Toolbox;HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Phase/Frequency Error Controls 1. Bit Error Rate 2. Errors 3. Total Samples Before running this model you must first launch ModelSim. You can launch ModelSim on this computer using either a shared memory link or a TCP/IP socket link. Shared memory link: 1) Be sure that the Connection tab of the Cosimulation block dialog is set as follows: The HDL simulator is running on this computer is checked Shared memory is selected 2) Execute the following MATLAB command: vsim(tclstart,manchestercmds) 3) Start the Simulink simulation. TCP/IP socket link: 1) Be sure that the Connection tab of the Cosimulation block dialog is set as follows: The HDL simulator is running on this computer is checked and Socket is selected Port number or service matches the port number used in the command below. 2) Execute the following MATLAB command: vsim(tclstart,manchestercmds,socketsimulink,4441) 3) Start the Simulink simulation. Copyright 2008-2010 The MathWorks, Inc.

BLOCK:
Bit Errors;Conversion;Data Align;Dclk;Decoded Data;Decoded Raw;Demux;Discrete-Time Scatter Plot Scope;Edge Detector;Encoded;Error Rate Calculation;Frequency Error Range;Frequency Error Slider;Gateway Out;I;IQ Capture;IQ*;Input Data;LE;Manchester Encoder;ModelSim Startup Command(Shared Memory);ModelSim Startup Command(TCP/IP Socket);Orig Data;Orig Raw;Phase Event;Phase Offset;Q;Real-Imag to Complex;Reference;Sample and Hold;Sel;Signal Scope;SubSystem;Sum;Unit Delay;VHDL Manchester Receiver;background

BLOCKTYPE:
ConstellationDiagram;DSP Constant;DataTypeConversion;Demux;Display;Edge Detector;Error Rate Calculation;Inport;MATLABFcn;Outport;RealImagToComplex;Sample and Hold;Scope;SignalEditor;Simulink and ModelSim Cosimulation;Slider Gain;Sum;UnitDelay


MODELNAME: mixedmanchester
PATH: examples/hdlverifier/main/mixedmanchester.slx
ANNOTATION: Copyright 2008-2009 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;3;1;4;1;5;1;2;1;1;1;1;1;1
CHECKSUM: C9967843DAC65F1E452C604AAE2C766B
PRODUCT: DSP System Toolbox;HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Conversion;Data Scope;Demux;Encoded;Frequency Error Range;Frequency Error Slider;Frequency/Phase Error Generator;Gateway Out;I;IL;IQ Capture;IQ Map;Input Data;LE;Manchester Encoder;Mixed HDL Manchester Receiver;ModelSim Startup Command;Out;Phase Event;Phase Offset;Q;QL;Reference;Sample and Hold;SubSystem;Sum

BLOCKTYPE:
DSP Constant;DataTypeConversion;Demux;Inport;MATLABFcn;Outport;Record;Sample and Hold;Scope;SignalEditor;Simulink and ModelSim Cosimulation;Slider Gain;Sum;VHDL Manchester Receiver Demo Info


MODELNAME: mixedmanchester_incisive
PATH: examples/hdlverifier/main/mixedmanchester_incisive.slx
BLOCKTYPE_FREQUENCY: 1;5;1;1;7;1;6;1;1;5;2;1;1;1;1;1
CHECKSUM: 2CEBCCC3E598FA62435EC71FC1C87585
PRODUCT: DSP System Toolbox;HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Phase/Frequency Error Controls Copyright 2006-2021 The MathWorks, Inc. nclaunch( ... rundir, TEMPDIR, ... tclstart, { ... [exec xmvlog -64bit -linedebug vlogFiles{:}], ... [exec xmvhdl -64bit -linedebug vhdlFiles{:}], ... exec xmelab -64bit -access +rwc manchester, ... hdlsimulink -gui manchester ... } ... );  Running a Cosimulation 1. Click the command to the right to compile the HDL and launch the HDL simulator. 2. Perform any debug setup in the HDL simulator such as setting breakpoints or creating signal probes. 3. Start the cosimulation in Simulink by choosing either Simulation/Start or Tools/Simulink Debugger.

BLOCK:
Bit Errors Scope;Conversion;Data Align;Dclk;Decoded Data;Decoded Raw;Demux;Encoded;Error Test;Frequency Error Range;Frequency Error Slider;Gateway Out;I;IL;IQ Capture;IQ Map;Info;Input Data;LE;Manchester Encoder;Mixed HDL Manchester Receiver;Orig Data;Orig Raw;Phase Event;Phase Offset;Q;QL;Reference;Sample and Hold;Signal Scope;SubSystem;Sum;Unit Delay;background

BLOCKTYPE:
DSP Constant;DataTypeConversion;Demux;Info;Inport;MATLABFcn;Outport;Record;RelationalOperator;Sample and Hold;Scope;SignalEditor;Simulink and Xcelium Cosimulation;Slider Gain;Sum;UnitDelay


MODELNAME: multimanchester
PATH: examples/hdlverifier/main/multimanchester.slx
ANNOTATION: Phase/Frequency Error Controls Copyright 2008-2009 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;1;7;1;2;11;1;12;1;1;5;2;1;3;1;1;1
CHECKSUM: 36AEEFDDB0071E1523F4A174BA4B1CEF
PRODUCT: DSP System Toolbox;HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Bit Errors Scope;Constant;Conversion;Data Align;Data Type Conversion;Dclk;Decoded Data;Decoded Raw;Decoder;Demux;Encoded;Error Test;Frequency Error Range;Frequency Error Slider;Gateway Out;I;IL;IQ Capture;IQ Convertor;IQ Map;Input Data;LE;Manchester Encoder;Manchester Receiver Subsystem;ModelSim Startup Command;Orig Data;Orig Raw;Phase Event;Phase Offset;Pulse Generator;Q;QL;Reference;Sample and Hold;Signal Scope;State Counter;SubSystem;Sum;Unit Delay;background;clk ;clk_enable;data;dclk;dvalid;isum_i;qsum_i;reset;samp;sync_i

BLOCKTYPE:
Constant;DSP Constant;DataTypeConversion;Demux;DiscretePulseGenerator;Inport;MATLABFcn;Outport;Record;RelationalOperator;Sample and Hold;Scope;SignalEditor;Simulink and ModelSim Cosimulation;Slider Gain;Sum;UnitDelay


MODELNAME: multimanchester_incisive
PATH: examples/hdlverifier/main/multimanchester_incisive.slx
BLOCKTYPE_FREQUENCY: 1;1;7;1;2;1;11;1;12;1;1;5;2;1;3;1;1;1
CHECKSUM: 4784BDD28E91EFFDBD09A570421AF936
PRODUCT: DSP System Toolbox;HDL Coder Documentation;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Phase/Frequency Error Controls Copyright 2006-2021 The MathWorks, Inc. nclaunch( ... rundir, TEMPDIR, ... tclstart, { ... [exec xmvlog -64bit -linedebug vlogFiles{:}], ... exec xmelab -64bit -access +rwc multimanchester, ... hdlsimulink -gui multimanchester ... } ... );  Running a Cosimulation 1. Click the command to the right to compile the HDL and launch the HDL simulator. 2. Perform any debug setup in the HDL simulator such as setting breakpoints or creating signal probes. 3. Start the cosimulation in Simulink by choosing either Simulation/Start or Tools/Simulink Debugger.

BLOCK:
Bit Errors Scope;Constant;Conversion;Data Align;Data Type Conversion;Dclk;Decoded Data;Decoded Raw;Decoder;Demux;Encoded;Error Test;Frequency Error Range;Frequency Error Slider;Gateway Out;I;IL;IQ Capture;IQ Converter;IQ Map;Info;Input Data;LE;Manchester Encoder;Manchester Receiver Subsystem;Orig Data;Orig Raw;Phase Event;Phase Offset;Pulse Generator;Q;QL;Reference;Sample and Hold;Signal Scope;State Counter;SubSystem;Sum;Unit Delay;background;clk ;clk_enable;data;dclk;dvalid;isum_i;qsum_i;reset;samp;sync_i

BLOCKTYPE:
Constant;DSP Constant;DataTypeConversion;Demux;DiscretePulseGenerator;Info;Inport;MATLABFcn;Outport;Record;RelationalOperator;Sample and Hold;Scope;SignalEditor;Simulink and Xcelium Cosimulation;Slider Gain;Sum;UnitDelay


MODELNAME: parity_check_clk
PATH: examples/hdlverifier/main/parity_check_clk.slx
BLOCKTYPE_FREQUENCY: 1;8;1;1;1;1;1;1;1
CHECKSUM: E5E8812157631961B858243DA6428D53
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
vsim(tclstart,paritycmds_clk) ModelSim Startup Command (Shared Memory) 1) Before running this model, launch ModelSim by clicking on the annotation below: Copyright 2009-2020 The MathWorks, Inc. Tout=32e-9 Tout=4e-9 The function paritycmds_clk creates Tcl commands which execute when ModelSim launches Click here to see whats in it. b) Undersampling a) Oversampling c) Sampling at clk frequency Tout=8e-9 3) Set sample time of output (Tout): 2) Observe the following: - The settings within the HDL Cosimulation blocks Ports pane - The HDL module is driven by a clock with T=8ns which is generated in HDL

BLOCK:
Counter Free-Running;Current value of Tout;Extract Bits;HDL Cosimulation;In;Info;Logical Operator;Out;Reference;Sample time of input (Ts);Scope;Simulink Algorithm for Parity Checker;SubSystem;Unit Delay

BLOCKTYPE:
Counter Free-Running;Extract Bits;Info;Inport;Logic;Outport;Scope;Simulink and ModelSim Cosimulation;UnitDelay


MODELNAME: parity_check_clk_in
PATH: examples/hdlverifier/main/parity_check_clk_in.slx
BLOCKTYPE_FREQUENCY: 1;8;1;1;1;1;1;1;1
CHECKSUM: 4AF743F84A37CA7E3E6D21E247697490
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
nclaunch(tclstart,paritycmds_clk_in) Incisive Startup Command (Shared Memory) 1) Before running this model, launch Incisive by clicking on the annotation below: Copyright 2009-2020 The MathWorks, Inc. Tout=32e-9 Tout=4e-9 The function paritycmds_clk_in creates Tcl commands which execute when ModelSim launches Click here to see whats in it. b) Undersampling a) Oversampling c) Sampling at clk frequency Tout=8e-9 3) Set sample time of output (Tout): 2) Observe the following: - The settings within the HDL Cosimulation blocks Ports pane - The HDL module is driven by a clock with T=8ns which is generated in HDL

BLOCK:
Counter Free-Running;Current value of Tout;Extract Bits;HDL Cosimulation;In;Info;Logical Operator;Out;Reference;Sample time of input (Ts);Scope;Simulink Algorithm for Parity Checker;SubSystem;Unit Delay

BLOCKTYPE:
Counter Free-Running;Extract Bits;Info;Inport;Logic;Outport;Scope;Simulink and Xcelium Cosimulation;UnitDelay


MODELNAME: parity_check_convclk
PATH: examples/hdlverifier/main/parity_check_convclk.slx
BLOCKTYPE_FREQUENCY: 1;8;1;1;1;1;1;1;1
CHECKSUM: 763851EDE5067BF7614E87B29C801D61
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
This subsystem has NO knowledge about clks and resets which exist within the HDL module vsim(tclstart,paritycmds_convclk) ModelSim Startup Command (Shared Memory) Copyright 2003-2020 The MathWorks, Inc. Tout=8e-9 The function paritycmds_convclk creates Tcl commands which execute when ModelSim launches. Click here to see whats in it. 1) Before running this model, launch ModelSim: 2) The clock is generated by the Cosimulation block with a period T = 8ns 3) Set sample time of output (Tout):

BLOCK:
Counter Free-Running;Current value of Tout;Extract Bits;HDL Cosimulation;In;Info;Logical Operator;Out;Reference;Sample time of input (Ts);Scope;Simulink Algorithm for Parity Checker;SubSystem;Unit Delay

BLOCKTYPE:
Counter Free-Running;Extract Bits;Info;Inport;Logic;Outport;Scope;Simulink and ModelSim Cosimulation;UnitDelay


MODELNAME: parity_check_convclk_in
PATH: examples/hdlverifier/main/parity_check_convclk_in.slx
BLOCKTYPE_FREQUENCY: 1;8;1;1;1;1;1;1;1
CHECKSUM: 13BBDE341FB2D42950E416503B9D3CAC
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
This subsystem has NO knowledge about clks and resets which exist within the HDL module nclaunch(tclstart,paritycmds_convclk_in) Incisive Startup Command (Shared Memory) Copyright 2009-2020 The MathWorks, Inc. Tout=8e-9 The function paritycmds_convclk_in creates Tcl commands which execute when ModelSim launches. Click here to see whats in it. 1) Before running this model, launch Incisive: 2) The clock is generated by the Cosimulation block with a period T = 8ns 3) Set sample time of output (Tout):

BLOCKTYPE:
Counter Free-Running;Extract Bits;Info;Inport;Logic;Outport;Scope;Simulink and Xcelium Cosimulation;UnitDelay


MODELNAME: parity_check_in
PATH: examples/hdlverifier/main/parity_check_in.slx
BLOCK: Counter Free-Running;HDL Cosimulation;Info;Reference;Scope;SubSystem;Value of Ts
BLOCKTYPE: Counter Free-Running;Info;Scope;Simulink and Xcelium Cosimulation
BLOCKTYPE_FREQUENCY: 1;1;1;1
CHECKSUM: A070AF26F45B5DC70422EF69FE0CF0A4
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
nclaunch(tclstart,paritycmds_in(1ns)) Incisive Startup Command Copyright 2009-2020 The MathWorks, Inc. 1) Before running this model, launch Incisive by clicking on the annotation below: The function paritycmds_in creates Tcl commands which execute when Incisive launches Click here to see whats in it. 3) Choose mode of operation: a) b) c) Auto Timescale - Set Simulink sample time, Ts = 10; Within the Timescales pane of HDL Cosimulation block, click on the Auto Timescale button, and apply the changes. - Now try the same procedure using an irrational value for Ts, for example, Ts = pi*1e-9 2) Observe the settings within the HDL Cosimulation blocks Ports pane paritytimescale(absolute) paritytimescale(relative)


MODELNAME: parity_check_mq
PATH: examples/hdlverifier/main/parity_check_mq.slx
BLOCK: Counter Free-Running;HDL Cosimulation;Info;Reference;Scope;SubSystem;Value of Ts
BLOCKTYPE: Counter Free-Running;Info;Scope;Simulink and ModelSim Cosimulation
BLOCKTYPE_FREQUENCY: 1;1;1;1
CHECKSUM: 3D125B69309EA3851EB8A36AFEA64101
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
vsim(tclstart,paritycmds(1ns)) ModelSim Startup Command (Shared Memory) Copyright 2009-2020 The MathWorks, Inc. 1) Before running this model, launch ModelSim by clicking on the annotation below: The function paritycmds creates Tcl commands which execute when ModelSim launches Click here to see whats in it. 3) Choose mode of operation: a) b) c) Auto Timescale - Set Simulink sample time, Ts = 10; Within the Timescales pane of HDL Cosimulation block, click on the Auto Timescale button, and apply the changes. - Now try the same procedure using an irrational value for Ts, for example, Ts = pi*1e-9 2) Observe the settings within the HDL Cosimulation blocks Ports pane paritytimescale(absolute) paritytimescale(relative)


MODELNAME: parity_check_reset
PATH: examples/hdlverifier/main/parity_check_reset.slx
BLOCKTYPE_FREQUENCY: 1;8;1;1;1;1;1;1;1
CHECKSUM: 819770A531D6EBB5649CF28B1F4F678B
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
vsim(tclstart,paritycmds_reset) ModelSim Startup Command (Shared Memory) 1) Before running this model, launch ModelSim: Copyright 2009-2020 The MathWorks, Inc. Tout=8e-9 The function paritycmds_reset creates Tcl commands which execute when ModelSim launches. A snippet of these Tcl commands is: ... add wave /paritychecker_convclk/*, ... echo Setting the HDL Simulator resolution to: $resolution, ... run 16 ... ... Click here to see whats in it. 3) Set sample time of output (Tout): 2) The tclstart is used to provide Tcl commands to the HDL simulator and run the HDL module for the duration of Reset (which is 16ns) Clock is generated by the Cosimulation block with a period T = 8ns

BLOCKTYPE:
Counter Free-Running;Extract Bits;Info;Inport;Logic;Outport;Scope;Simulink and ModelSim Cosimulation;UnitDelay


MODELNAME: parity_check_reset_in
PATH: examples/hdlverifier/main/parity_check_reset_in.slx
BLOCKTYPE_FREQUENCY: 1;8;1;1;1;1;1;1;1
CHECKSUM: 7B4816945C732443CFF163E4DAE88F48
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
nclaunch(tclstart,paritycmds_reset_in) Incisive Startup Command (Shared Memory) 1) Before running this model, launch Incisive: Copyright 2009-2020 The MathWorks, Inc. Tout=8e-9 The function paritycmds_reset_in creates Tcl commands which execute when Incisive launches. A snippet of these Tcl commands is: ... [hdlsimulink -gui paritychecker_convclk,... -input {@run 16}] ... Click here to see whats in it. 3) Set sample time of output (Tout): 2) The tclstart is used to provide Tcl commands to the HDL simulator and run the HDL module for the duration of Reset (which is 16ns) Clock is generated by the Cosimulation block with a period T = 8ns

BLOCKTYPE:
Counter Free-Running;Extract Bits;Info;Inport;Logic;Outport;Scope;Simulink and Xcelium Cosimulation;UnitDelay


MODELNAME: rcosflt_tb
PATH: examples/hdlverifier/main/rcosflt_tb.slx
ANNOTATION: Copyright 2010 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;1;2;1;1;1;1;1;1
CHECKSUM: CE4B2ACB5A5C5887BE4432778BF9B781
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Bus Creator;Constant;Data Type Conversion;Integer Delay;Product;Pulse Generator;Random Number;Scope;Sign

BLOCKTYPE:
BusCreator;Constant;DataTypeConversion;Delay;DiscretePulseGenerator;Product;RandomNumber;Scope;Signum


MODELNAME: scrambler_frame
PATH: examples/hdlverifier/main/scrambler_frame.slx
BLOCKTYPE_FREQUENCY: 1;1;1;2;2;2;2;1;1;1;1
CHECKSUM: 4F9B84D1B6CE05E15C9C5C704287D12C
PRODUCT: Communications Toolbox;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Source Communications System Toolbox Scrambler HDL Scrambler Scopes Copyright 2006-2021 The MathWorks, Inc. nclaunch( ... rundir, TEMPDIR, ... tclstart, { ... [exec xmvlog -64bit -linedebug vlogFiles{:}], ... exec xmelab -64bit -access +rwc scrambler6, ... hdlsimulink -gui scrambler6 ... } ... ); Running a Cosimulation 1. Click the command to the right to compile the HDL and launch the HDL simulator. 2. Perform any debug setup--such as breakpoints or waveforms--in the HDL simulator. 3. Start the Simulink simulation.

BLOCK:
BER;Bernoulli Binary Generator;Data Type Conversion;Descrambler;Error Rate Calculation;Frame Conversion;HDL Scrambler;Info;One Frame Delay;Original Signal;Reference;Scrambler;SubSystem;z_background

BLOCKTYPE:
Bernoulli Binary Generator;CustomCallbackButton;DataTypeConversion;Delay;Descrambler;Display;Error Rate Calculation;FrameConversion;Scope;Scrambler;Simulink and Xcelium Cosimulation


MODELNAME: scrambler_fsk
PATH: examples/hdlverifier/main/scrambler_fsk.slx
BLOCKTYPE_FREQUENCY: 2;2;1;1;1;2;1;1;2;2;1;2;2;4;2;2;2;4;1
CHECKSUM: 262F1F08670DDFA459283A04F1F4291B
PRODUCT: Communications Toolbox;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Source and Encoding  Burst Error in Channels (6 Bits are flipped) BER CALCULATION Copyright 2006-2021 The MathWorks, Inc. nclaunch( ... rundir, TEMPDIR, ... tclstart, { ... [exec xmvlog -64bit -linedebug vlogFiles{:}], ... exec xmelab -64bit -access +rwc scrambler6, ... hdlsimulink -gui scrambler6 ... } ... ); Running a Cosimulation 1. Click the command to the right to compile the HDL and launch the HDL simulator. 2. Perform any debug setup--such as breakpoints or waveforms--in the HDL simulator. 3. Start the Simulink simulation.

BLOCK:
2-FSK Demodulator Baseband;2-FSK Modulator Baseband;AWGN Channel;BCH 11-->31 Encoder;BCH 31-->11 Decoder;BCH 31-->11Decoder;BER;Bernoulli Binary Generator;Burst Errors;Burst Errors (6-bits are flipped);Channel;Data Type Conversion;Delay;Error Rate Calculation;Frame Conversion;From;Goto;HDL order-6 Scrambler;In;Info;M-FSK Demodulator Baseband;M-FSK Modulator Baseband;MATLAB Fcn;Order 6 Descrambler;Out;Reference;SubSystem;z_background

BLOCKTYPE:
AWGN Channel;BCH Decoder;BCH Encoder;Bernoulli Binary Generator;CustomCallbackButton;DataTypeConversion;Delay;Descrambler;Display;Error Rate Calculation;FrameConversion;From;Goto;Inport;M-FSK Demodulator Baseband;M-FSK Modulator Baseband;MATLABFcn;Outport;Simulink and Xcelium Cosimulation


MODELNAME: sim_videosharp
PATH: examples/hdlverifier/main/sim_videosharp.slx
ANNOTATION: Video Sharpening
BLOCKTYPE_FREQUENCY: 1;2;2;1;3;1;1;11;11;3;1;5;2
CHECKSUM: 380CDC71603047AAE9EBFF17BCA7510C
PRODUCT_BASECODE: ES;HD
BLOCK:
CbIn;CbOut;Chroma Resampling;Color Space Conversion;CrIn;CrOut;Frame Rate Display;Frame To Pixels;Frame to Stream;From Multimedia File;Image Filter;Match Latency;Original Video;Pixels To Frame;Reference;Scope;Sharpened Video;Stream to Frame;Streaming 2-D FIR Filter ;SubSystem;Terminator;YIn;YOut;syncIn;syncOut

BLOCKTYPE:
Chroma Resampling;Color Space Conversion;Delay;Frame Rate Display;Frame To Pixels;From Multimedia File;Image Filter;Inport;Outport;Pixels To Frame;Scope;Terminator;VideoViewer

PRODUCT:
Computer Vision Toolbox;HDL Coder Documentation;Image Processing Toolbox;MATLAB;Simulink;Vision HDL Toolbox


MODELNAME: svdpi_SimpleFeedBack
PATH: examples/hdlverifier/main/svdpi_SimpleFeedBack.slx
ANNOTATION: F0 F2 F3 F4 Copyright 2013-2014 The MathWorks, Inc.
BLOCKTYPE: Counter Limited;DataTypeConversion;Gain;Inport;Outport;Scope;Sum;UnitDelay
BLOCKTYPE_FREQUENCY: 1;1;3;4;4;5;1;2
CHECKSUM: D3FC9EC06FFB388FCD16081303CE287D
PRODUCT: Embedded Coder;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
Add;Counter Limited;Data Type Conversion;F;F1 Scope;Gain;In;Out;Reference;Scope;SubSystem;Unit Delay


MODELNAME: svdpi_pid
PATH: examples/hdlverifier/main/svdpi_pid.slx
ANNOTATION: a Copyright 2013-2014 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;4;6;6;4;9;1;1;1;5;3;2
CHECKSUM: 0A1A109CDFF6BAB426333296CA78F051
PRODUCT: Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
BLOCK:
A/D Converter;Actual_position;Add;Control_signal;Controller;DC Motor;D_component;Data Type Conversion;Error_d;Gain;Gain ;I_component;In;Integrator;Out;Pulse Generator;Rate Transition;Saturation;Scope;Stimulus;Stimulus_block;SubSystem;Sum;Test Bench;Unit Delay;Unit Delay ;Zero-Order Hold;aTOv;control_signal;error_d;vTOx

BLOCKTYPE:
DataTypeConversion;DiscretePulseGenerator;Gain;Inport;Integrator;Outport;RateTransition;Saturate;Scope;Sum;UnitDelay;ZeroOrderHold


MODELNAME: svdpi_qam
PATH: examples/hdlverifier/main/svdpi_qam.slx
CHECKSUM: 9A8542031F6BB6758E46334F63B0C15E
PRODUCT_BASECODE: ES;HD
ANNOTATION:
Rate sqrt(I^2+Q^2) can be approximated as |L|+0.4*|S|, where |L| is the absolute value of the larger of I or Q, and |S| is the absolute value of the smaller of I or Q. See |L|+0.4|S| Algorithm on page 238 in Digital Signal Processing in Communication Systems by Marvin Frerking. HDL optimized scrambler, implementing the scrambler polynomial [1 1 1 0 1], with initial states [0 0 0 0] Copyright 2014 The MathWorks, Inc.  QAM Transceiver

BLOCK:
 ; Demux ; Ground ; SFunction ; Terminator ; Zero;1-Tap DLMS;AND;AWGN Channel;Abs;Adapt;Add;AngleCorrection;Automatic Gain Control;BIT_XOR;Bit;Bit Concat;Bit Slice;Bits In;CORDIC;Capture Data;Channel;Coarse Frequency Offset Correction;Compare To Constant;Compare To Zero;Complex to Real-Imag;Conj;Constant;Controller FSM;Data Address Counter;Data Generation & Packetization;Data Source;Data Type Conversion;Data_In;Delay;Delta;Demodulate;Demux;Desired;Desired Signal Source;Discrete FIR Filter;Display;Downsample;Enable;Enabled Wire;ErrorRate;Estimate;Estimate Valid;Freeze_MF_Conj;FreqEst;Frequency Offset Estimation;Gain;GainCorrection;Group Bits;HDL Counter;HDL Data Scrambler;In;Initial Condition;Input;Input Mux;Integer Delay;Integer In;Integer Out;Interpolation Control;Interpolation Filter ;Logical Not;Logical Operator;Loop Gain;Loop gain;MATLAB Function;MF_Conj;Magnitude & Phase Recovery;Math Function;MinMax;Modulus;Multiport Switch;NCO;Next X;Next Y;Out;Output;Phase Correction;Phase/ Frequency Offset;Pipeline;Preamble Address Counter;Preamble Data Mux;Preamble Matched Filter;Prescale;Product;Pulse Shaping;QAM_RX;QAM_TX;QCorrection;Quadrant;RRC Interpolation Filter;RXData;RXSig;Raise to Power ;Raised Cosine Receive Filter;Raw Data;Real-Imag to Complex;Rectangular QAM Demodulator Baseband;Rectangular QAM Modulator Baseband;Reference;Relational Operator;Repeat;Rx;SEL;Scrambled_Out;Shift Arith;Shift Arithmetic;ShiftArith;Sign;Signal Specification;SubSystem;Subsystem;Subtract;Sum;Switch;Symbol Mapping;Symbol Out;Symbols In;TXData;TXSig;Terminator;Timing Error Detector;Timing Recovery;To Workspace;Tx;Underflow;Unit Delay;Unit Delay Enabled;Valid;Valid In;Valid Out;Valid out;Variable Fractional Delay;XComponent;Xn;YComponent;Yn;ZAccumulator;ZComponent;Zn;cordic_stage;corrected;data in;data lookup;dataIn;dataOut;dvalid;e;enable;gain;isPreamble;load data;load preamble;load_data;load_preamble;magnitude;mu;negative;next Z;op;p;packet_bits;power;preamble lookup;reg;reset preamble;reset_preamble;strobe;to int;valid;validIn;validOut;valid_in;x;x0In;y;y0In;z;z0In;zInitial;zn

BLOCKTYPE:
AWGN Channel;Abs;ArithShift;Bit Concat;Bit Slice;Compare To Constant;Compare To Zero;ComplexToRealImag;Constant;DataTypeConversion;Delay;Demux;DiscreteFir;Display;DownSample;EnablePort;Error Rate Calculation;FIR Decimation;FIR Interpolation;Gain;Ground;HDL Counter;Inport;Logic;LookupNDDirect;Math;MinMax;MultiPortSwitch;NCO;Outport;Phase/Frequency Offset;Product;RealImagToComplex;Rectangular QAM Demodulator Baseband;Rectangular QAM Modulator Baseband;RelationalOperator;Repeat;S-Function;SignalSpecification;Sum;Switch;Terminator;ToWorkspace;Unit Delay Enabled;UnitDelay;Variable Fractional Delay

BLOCKTYPE_FREQUENCY:
1;2;13;2;2;1;2;4;24;3;138;5;3;1;3;4;1;1;1;10;1;4;149;15;3;3;2;5;1;107;1;14;1;1;1;7;1;4;1;54;22;8;6;1;2;1

PRODUCT:
Communications Toolbox;DSP HDL Toolbox;DSP System Toolbox;Fixed-Point Designer;HDL Verifier;MATLAB;Simulink


MODELNAME: svdpi_sltestProjectorController
PATH: examples/hdlverifier/main/svdpi_sltestProjectorController.slx
BLOCKTYPE_FREQUENCY: 4;2;2;2;3;3;17;1;16;2;1;2;5;1;2;3
CHECKSUM: C845B287CFDB5292B09C9A9B438A08E2
PRODUCT_BASECODE: ES;HD
BLOCK:
 Demux ; SFunction ; Terminator ;Constant;Data Store Memory;Data Store Write;FanOn;FanSpeed;From_;Goto_;In_;Input Conversion Subsystem;LampOn;OnOff Check;Out_;Output Control;Output Conversion Subsystem;Rate_Transition_;Relational Operator;Req_;SigSpec_;SubSystem;Switch;Test Sequence;Tproj;chk_on_off;delay_;fan_on;fan_speed;lamp_on;on_off;sltestProjectorController

BLOCKTYPE:
Constant;DataStoreMemory;DataStoreWrite;Demux;From;Goto;Inport;ModelReference;Outport;RateTransition;RelationalOperator;S-Function;SignalSpecification;Switch;Terminator;UnitDelay

PRODUCT:
HDL Verifier;MATLAB;Requirements Toolbox;Simulink;Simulink Test;Simulink Test Documentation;Stateflow


MODELNAME: tlmgdemo_aimem
PATH: examples/hdlverifier/main/tlmgdemo_aimem.slx
BLOCK: Add;DualFilter;Product;SubSystem;Unit Delay;coef_;input;input_;output;output_;symmetric_fir_
BLOCKTYPE: Constant;FromWorkspace;Inport;Outport;Product;Scope;Sum;UnitDelay
BLOCKTYPE_FREQUENCY: 8;1;12;5;8;2;14;16
CHECKSUM: B1131167F6EC7D5653B649EE3B804EB1
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
DESCRIPTION:
Symmetric FIR Filter This model shows how to use Simulink(R) Coder(TM) to check, generate, and verify HDL for a fixed-point symmetric FIR filter. 

ANNOTATION:
This model shows the TLM component with individual input/output memory map generated for a dual 4 taps FIR filter. Copyright 1994-2013 The MathWorks, Inc. TLM Generator Auto Generated Memory Map with Individual Address Example


MODELNAME: tlmgdemo_asmem
PATH: examples/hdlverifier/main/tlmgdemo_asmem.slx
BLOCK: Add;DualFilter;Product;SubSystem;Unit Delay;coef_;input;input_;output;output_;symmetric_fir_
BLOCKTYPE: Constant;FromWorkspace;Inport;Outport;Product;Scope;Sum;UnitDelay
BLOCKTYPE_FREQUENCY: 8;1;12;5;8;2;14;16
CHECKSUM: 6125B7D1D22CAB81BAD3E2A38E16294F
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
DESCRIPTION:
Symmetric FIR Filter This model shows how to use Simulink(R) Coder(TM) to check, generate, and verify HDL for a fixed-point symmetric FIR filter. 

ANNOTATION:
This model shows the TLM component with single input/output memory map generated for a dual 4 taps FIR filter. Copyright 1994-2013 The MathWorks, Inc. TLM Generator Auto Generated Memory Map with Single Address Example


MODELNAME: tlmgdemo_intro
PATH: examples/hdlverifier/main/tlmgdemo_intro.slx
BLOCK: Add;DualFilter;Product;SubSystem;Unit Delay;coef_;input;input_;output;output_;symmetric_fir_
BLOCKTYPE: Constant;FromWorkspace;Inport;Outport;Product;Scope;Sum;UnitDelay
BLOCKTYPE_FREQUENCY: 8;1;12;5;8;2;14;16
CHECKSUM: ED4E0F5018EA2B18CCD5FD2B5D49BAC6
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
DESCRIPTION:
Symmetric FIR Filter This model shows how to use Simulink(R) Coder(TM) to check, generate, and verify HDL for a fixed-point symmetric FIR filter. 

ANNOTATION:
TLM Generator Introduction Example This model shows the TLM component generation with a dual 4 taps FIR filter. Copyright 1994-2020 The MathWorks, Inc.


MODELNAME: tlmgdemo_ipxactmem
PATH: examples/hdlverifier/main/tlmgdemo_ipxactmem.slx
BLOCKTYPE_FREQUENCY: 2;1;21;1;25;1;7;14;2;26;28
CHECKSUM: 294317D3AF13D3EF5037C9B85FFEF32A
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
LPHP Filter Bank LP Filter Bank Dual Filter Logic Copyright 2005-2019 The MathWorks, Inc. TLM Generator Imported IPXact With Memory Map Example

BLOCK:
Add;Bus Creator;Bus Selector;Data Source;DualFilter;HPF Coefs;HPF_coef_;HPF_coefs;HPLPF output;LPF Coefs;LPF output;LPF_coef_;LPF_coefs;LPF_input;LPF_output;LPHPF_coef_;LPHPF_input;LPHPF_output;Manual Switch;Product;SubSystem;Unit Delay;coef_;data;input;output;symmetric_fir_

BLOCKTYPE:
BusCreator;BusSelector;Constant;FromWorkspace;Inport;ManualSwitch;Outport;Product;Scope;Sum;UnitDelay


MODELNAME: tlmgdemo_ipxactnomem
PATH: examples/hdlverifier/main/tlmgdemo_ipxactnomem.slx
BLOCK: Add;DualFilter;Product;SubSystem;Unit Delay;coef_;input;input_;output;output_;symmetric_fir_
BLOCKTYPE: Constant;FromWorkspace;Inport;Outport;Product;Scope;Sum;UnitDelay
BLOCKTYPE_FREQUENCY: 8;1;12;5;8;2;14;16
CHECKSUM: 8AD13C105ACEDDD3C2BEC48C35627C0E
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
This model shows the generation of a TLM component with an IPXact imported specification without memory map for a dual 4 taps FIR filter. Copyright 1994-2014 The MathWorks, Inc. TLM Generator Imported IPXact Without Memory Map Example


MODELNAME: tlmgdemo_lttb
PATH: examples/hdlverifier/main/tlmgdemo_lttb.slx
BLOCK: Add;DualFilter;Product;SubSystem;Unit Delay;coef_;input;input_;output;output_;symmetric_fir_
BLOCKTYPE: Constant;FromWorkspace;Inport;Outport;Product;Scope;Sum;UnitDelay
BLOCKTYPE_FREQUENCY: 8;1;12;5;8;2;14;16
CHECKSUM: BB34D555074B190C35C71E3FA3EAA214
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
This model shows the generation of a testbench for a stand-alone SystemC verification of a generated TLM component for a dual 4 taps FIR filter. Copyright 1994-2013 The MathWorks, Inc. TLM Generator Loosely-Timed Testbench Example


MODELNAME: tlmgdemo_nomem
PATH: examples/hdlverifier/main/tlmgdemo_nomem.slx
BLOCK: Add;DualFilter;Product;SubSystem;Unit Delay;coef_;input;input_;output;output_;symmetric_fir_
BLOCKTYPE: Constant;FromWorkspace;Inport;Outport;Product;Scope;Sum;UnitDelay
BLOCKTYPE_FREQUENCY: 8;1;12;5;8;2;14;16
CHECKSUM: F010372B48E7C6B984EDC4F559A512D5
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
This model shows the TLM component with no-memory map generated for a dual 4 taps FIR filter. Copyright 1994-2013 The MathWorks, Inc. TLM Generator No Memory Map Example


MODELNAME: tlmgdemo_uttb
PATH: examples/hdlverifier/main/tlmgdemo_uttb.slx
BLOCK: Add;DualFilter;Product;SubSystem;Unit Delay;coef_;input;input_;output;output_;symmetric_fir_
BLOCKTYPE: Constant;FromWorkspace;Inport;Outport;Product;Scope;Sum;UnitDelay
BLOCKTYPE_FREQUENCY: 8;1;12;5;8;2;14;16
CHECKSUM: 243CDFAEF03755D91450B2FD4D79BD04
PRODUCT: HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
ANNOTATION:
This model shows the generation of a testbench for a stand-alone SystemC verification of a generated TLM component for a dual 4 taps FIR filter. Copyright 1994-2013 The MathWorks, Inc. TLM Generator Untimed Testbench Example


MODELNAME: pulsedetector_tb
PATH: examples/hdlverifier/projects/src/pulsedetector_proj/models/pulsedetector_tb.slx
BLOCKTYPE_FREQUENCY: 4;1;1;1;1;4;2;1;1;15;1;3;5;1;1;8;1;1;40;35;2;4;3;4;1;1;1;1;6;1;2;5
CHECKSUM: B8C84C0707DB2434B68DA04313DAB82F
PRODUCT: DSP System Toolbox;HDL Verifier;MATLAB;Simulink
PRODUCT_BASECODE: ES;HD
DESCRIPTION:
This example shows how a design and test bench in Simulink can be used by a downstream HDL implementation environment that is using the Universal Verification Methodology (UVM) framework.

ANNOTATION:
These delays ensure values held across frame time in order to do expects checking.  Use hdlfimath (floor &amp; wrap) when possible reduce hardware resource usage (Toolbar &gt; Edit Data &gt; Ports &amp; Data Manager)   Back-propagate sample time from downstream Match Impl Latency PulseDetectorHDL Copyright 2019-23 The MathWorks, Inc. Generate Parameterized UVM Testbench from Simulink for a Pulse Detector Design

BLOCK:
 Demux ; SFunction ; Terminator ;Add;Bit Concat;Buffer;Check Static Range;Check Static Upper Bound;CheckDetection;CheckPulseDetector;Compare To Constant;Complex to Real-Imag;Compute Power;Constant;CorrFilter;Counter Free-Running;Create TDATA;CreateRandomPulse;Data Type Conversion;Data Type Duplicate;DataBuff;Delay;Demux;Detect Pulse;Discrete FIR Filter;Enable;ErrorPercentage;Extract Bits;FilterOut;FilterOutImpl;FilterOutRef;FrameNum;FromWs;GenPulse;HDL Counter;In;InputDriver;Latch Peak;Local Peak;LocationImpl;LocationImplIn;LocationRef;MATLAB Function;MidSample;Open write-up;Out;OutputMonitor;PeakSqImpl;PeakSqImplIn;PeakSqRef;Product;PulseDetector;PulseDetectorRef;PulseDetectorReference;Rate Transition;Real-Imag to Complex;Reference;RxSignal;SNR;Signal Builder;State Control;SubSystem;TDATA conversions;Tapped Delay;Terminator;Unbuffer;Unit Delay;Unit Delay Enabled Resettable Synchronous;coeff;coeff_in;data;data in;data out;data_in;data_out;detected;filter_out;location;peak_mag_sq;peak_sq;peak_sq_in;threshold;to fixpt;valid;valid_in;valid_out

BLOCKTYPE:
Bit Concat;Buffer;Checks_SMax;Checks_SRange;Compare To Constant;ComplexToRealImag;Constant;Counter Free-Running;CustomCallbackButton;DataTypeConversion;DataTypeDuplicate;Delay;Demux;DiscreteFir;EnablePort;Extract Bits;FromWorkspace;HDL Counter;Inport;Outport;Product;RateTransition;RealImagToComplex;S-Function;Sigbuilder block;StateControl;Sum;Tapped Delay Line;Terminator;Unbuffer;Unit Delay Enabled Resettable Synchronous;UnitDelay


MODELNAME: BasicOPCUAModel
PATH: examples/icomm/main/BasicOPCUAModel.slx
BLOCKTYPE: BusSelector;Display;RandomNumber;Scope;Sin;opcUARead;opcUAWrite
BLOCKTYPE_FREQUENCY: 1;2;1;2;1;1;1
CHECKSUM: 727F35AA504F932E7D6E6D792BD9A928
PRODUCT: Industrial Communication Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: OT
ANNOTATION:
Note: Create a new OPC UA Client and add nodes of interest to the OPC UA Read/Write blocks.  Copyright 2024 The MathWorks, Inc.  Write and Read Two Nodes from OPC UA Server

BLOCK:
Bus Selector;OPC UA Read;OPC UA Write;Quality Display;Random Number;Reference;Scope Node ;Sine Wave;Timestamp Display


MODELNAME: DataValueAndQualityIndicator
PATH: examples/icomm/main/DataValueAndQualityIndicator.slx
BLOCKTYPE: BusSelector;CircularGaugeBlock;CustomWebBlock;Demux;Display;LampBlock;Scope;Terminator;opcUARead
BLOCKTYPE_FREQUENCY: 1;1;1;1;1;2;2;3;1
CHECKSUM: DEE772ADBE3C15082F116B3658DDC110
PRODUCT: Industrial Communication Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: OT
ANNOTATION:
 OPC UA Data and Quality Indicator Dashboard  Copyright 2024 The MathWorks, Inc. Note: Create a new OPC UA Client and add nodes of interest to the OPC UA Read block.

BLOCK:
Bus Selector;Counter Gauge;Counter Quality;Demux;OPC UA Read;Quality Display;Reference;Scope Counter;Scope Sinusoid;Sinusoid Gauge;Sinusoid Quality;Terminator


MODELNAME: OPCBlksDistillation
PATH: examples/icomm/main/OPCBlksDistillation.slx
BLOCKTYPE_FREQUENCY: 2;2;2;7;5;2;1;2;1;6;2;1;2;9;4;4;1
CHECKSUM: A0B3D754CCF636E57263B812AC25EDFB
PRODUCT: Industrial Communication Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: OT
DESCRIPTION:
OPC-Enabled Binary Distillation Column Plant Model This demonstration model uses data from an OPC server to test composition control of a binary distillation column. The model outputs are published to the OPC server in real-time.

ANNOTATION:
Single-loop PI Controllers Terminal Composition Control in a Binary Distillation Column The plant is linearized around the setpoint xD=96.25% and xB=0.5%. See Wood and Berry 1973, Chem.Eng.Sci., pp 1707-1717 for details. The controller consists of a static decoupling matrix and two single-loop PI controllers. The PI gains have been calculated from a time-domain specification using the Simulink Design Optimization. For more information, see distillation_demo.mdl from the Simulink Design Optimization. Copyright 2007-2012 The MathWorks, Inc.

BLOCK:
1 min Sampling ;Add;Add Offset and Extract Signals;Current Setpoint;Demux;Digital Controller (1 min sampling interval);Disturbance;Gain;Integrator;Linearized Model of Distillation Column;Mux;OPC Configuration;Plant Output;R;R ;Rate Limiter;Reference;S;SP;Scope;Setpoint;Steady-state Decoupling Matrix;SubSystem;Sum;Transfer Fcn;Transport Delay;extract xB;extract xD;x;xB;xD;xD, xR 

BLOCKTYPE:
Constant;Demux;DiscreteIntegrator;Gain;Inport;Mux;OPC Configuration;OPC Read;OPC Write;Outport;RateLimiter;Scope;Selector;Sum;TransferFcn;TransportDelay;ZeroOrderHold


MODELNAME: OPCBlksTutorial
PATH: examples/icomm/main/OPCBlksTutorial.slx
ANNOTATION: Copyright 2007-2012 The MathWorks, Inc.
BLOCK: Display;Mux;OPC Configuration;OPC Read;OPC Write;Reference;Scope;Sine Wave
BLOCKTYPE: Display;Mux;OPC Configuration;OPC Read;OPC Write;Scope;Sin
BLOCKTYPE_FREQUENCY: 1;1;1;1;1;1;1
CHECKSUM: 7BCA62B908521C23900072CB37CB17F8
PRODUCT: Industrial Communication Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: OT
DESCRIPTION:
OPC Toolbox(TM) Block Library Tutorial This model shows you how to use OPC server data in a Simulink(R) model. A sine wave is generated in Simulink(R) , written to an OPC Server, and read back from that server to be displayed in a Scope.


MODELNAME: OPCUABlksDistillation
PATH: examples/icomm/main/OPCUABlksDistillation.slx
BLOCKTYPE_FREQUENCY: 1;2;1;2;8;5;2;6;2;1;2;9;4;4;1;2;1
CHECKSUM: D6E66ADFBDDF6AA608A8CB67B0506170
PRODUCT: Industrial Communication Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: OT
DESCRIPTION:
OPC-Enabled Binary Distillation Column Plant Model This demonstration model uses data from an OPC server to test composition control of a binary distillation column. The model outputs are published to the OPC server in real-time.

ANNOTATION:
Single-loop PI Controllers Terminal Composition Control in a Binary Distillation Column The plant is linearized around the setpoint xD=96.25% and xB=0.5%. See Wood and Berry 1973, Chem.Eng.Sci., pp 1707-1717 for details. The controller consists of a static decoupling matrix and two single-loop PI controllers. The PI gains have been calculated from a time-domain specification using the Simulink Design Optimization. For more information, see distillation_demo.mdl from the Simulink Design Optimization. Copyright 2024 The MathWorks, Inc. Note: Create a new OPC UA Client and add nodes of interest to the OPC UA Read/Write blocks.

BLOCK:
1 min Sampling ;Add;Add Offset and Extract Signals;Bus Selector;Current Setpoint;Demux;Digital Controller (1 min sampling interval);Disturbance;Gain;Integrator;Linearized Model of Distillation Column;Mux;OPC UA Write;R;R ;Rate Limiter;Reference;S;SP;Scope;Setpoint;Steady-state Decoupling Matrix;SubSystem;Sum;Transfer Fcn;Transport Delay;extract xB;extract xD;x;xB;xD;xD, xR 

BLOCKTYPE:
BusSelector;Constant;Demux;DiscreteIntegrator;Gain;Inport;Mux;Outport;RateLimiter;Scope;Selector;Sum;TransferFcn;TransportDelay;ZeroOrderHold;opcUARead;opcUAWrite


MODELNAME: HydraulicCavitationCycleFullModel
PATH: examples/ident/main/HydraulicCavitationCycleFullModel.slx
DESCRIPTION: Cavitation Cycle
ANNOTATION: Copyright 2021-2023 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;1;1;1;1;1;1;2;1;13;1;1;1;1;1;1;1;1;2
CHECKSUM: EC8F8B1805FC67958ED247CB7CC74E88
PRODUCT: MATLAB;Simscape;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
BLOCK:
A;B;C;Constant;Custom Cylinder;Custom Hydraulic Fluid;HRef;Iddata Sink;MTRef Cyl;MTRef Load;Orifice;P;PS-Simulink Converter;Piston Side A;Piston Side B;Pressure Sensor;Pulse Generator;R;Reference;Scope;Simulink-PS Converter;Solver Configuration;SubSystem;Subtract;Translational Hard Stop;Velocity Source

BLOCKTYPE:
Constant;DiscretePulseGenerator;Hydraulic Double-Acting Cylinder, Custom Model;IDDATA Sink;Ideal Translational Velocity Source;Isothermal Liquid Properties (IL);Local Restriction (IL);Mechanical Translational Reference;Outport;PMIOPort;PS-Simulink Converter;Pressure Sensor (IL);Reservoir (IL);Scope;Simulink-PS Converter;Solver Configuration;Sum;Translational Hard Stop;Translational Mechanical Converter (IL)


MODELNAME: MSD_NL
PATH: examples/ident/main/MSD_NL.slx
BLOCKTYPE_FREQUENCY: 3;2;2;3;1;1;1;1;4;1;2;1;1
CHECKSUM: 57D45B64AFE0C606E94FCDC5B36209B3
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ID
BLOCK:
 Demux ; SFunction ; Terminator ;Constant;Demux;F;From Workspace;Integrator;Mux;NonlinearMSD;Scope;Selector;SubSystem;Sum;To Workspace;U;x;xdot

BLOCKTYPE:
Constant;Demux;FromWorkspace;Inport;Integrator;Mux;Outport;S-Function;Scope;Selector;Sum;Terminator;ToWorkspace


MODELNAME: StateEstimation_Using_HammersteinWiener
PATH: examples/ident/main/StateEstimation_Using_HammersteinWiener.slx
BLOCKTYPE_FREQUENCY: 5;4;2;4;1;1;13;4;1;4;3;3;4;4;1;3
CHECKSUM: 17B5C46EBC83A0463297545B268E17CC
PRODUCT: MATLAB;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
BLOCK:
 Demux ; SFunction ; Terminator ;10 step ahead prediction using EKF;10 step ahead prediction using Particle Filter;10 step ahead prediction using UKF;Data Source;EKF;LL;MATLAB Function;NV;Noise Variance;Particle Filter;Reference;Selector;Simulink Function - Measurement (EKF/UKF);Simulink Function - Measurement Likeliehood (Particle Filter);Simulink Function - State Transition (EKF/UKF);Simulink Function - State Transition Particle Filter;SubSystem;UKF;Zero-Order Hold;measurement;measurementFcn;measurementLikelihoodFcn;particleStateTransitionFcn;particles;particles ;predictedParticles;stateTransitionFcn;u;x;xNext;xnext;y

BLOCKTYPE:
ArgIn;ArgOut;Constant;Demux;Extended Kalman Filter;Iddata InputOutput;Inport;Outport;Particle Filter;S-Function;Scope;Selector;Terminator;TriggerPort;Unscented Kalman Filter;ZeroOrderHold


MODELNAME: StateEstimation_Using_LinearModel
PATH: examples/ident/main/StateEstimation_Using_LinearModel.slx
BLOCKTYPE_FREQUENCY: 5;4;4;1;6;1;17;7;1;2;4;4;3;5;4;1;1
CHECKSUM: 004D8ACC4DB29F9D5E0A163ED1C83311
PRODUCT: MATLAB;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
BLOCK:
 Demux ; SFunction ; Terminator ;1 step ahead prediction using EKF;1 step ahead prediction using Linear Kalman Filter;1 step ahead prediction using Particle Filter;1 step ahead prediction using UKF;Data Source;EKF;In;Kalman Filter;LL;MATLAB Function;Multiply;Out;Particle Filter;Rate Transition;Reference;Simulink Function - Measurement (EKF/UKF);Simulink Function - Measurement Likeliehood (Particle Filter);Simulink Function - State Transition (EKF/UKF);Simulink Function - State Transition Particle Filter;SubSystem;Subsystem;Sum;Terminator;UKF;measurement;measurementFcn;measurementLikelihoodFcn;particleStateTransitionFcn;particles;particles ;predictedParticles;stateTransitionFcn;u;x;xNext;xnext;y

BLOCKTYPE:
ArgIn;ArgOut;Demux;Extended Kalman Filter;Gain;Iddata InputOutput;Inport;Outport;Particle Filter;RateTransition;S-Function;Scope;Sum;Terminator;TriggerPort;Unscented Kalman Filter;ctrlKalmanFilter


MODELNAME: StateEstimation_Using_LinearModelMultiRate
PATH: examples/ident/main/StateEstimation_Using_LinearModelMultiRate.slx
BLOCKTYPE_FREQUENCY: 5;4;4;1;6;1;17;7;1;1;4;3;3;4;4;1
CHECKSUM: 89D61E346352ADCBFFBA60C75412A17D
PRODUCT: MATLAB;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
BLOCK:
 Demux ; SFunction ; Terminator ;10 step ahead prediction using EKF;10 step ahead prediction using Particle Filter;10 step ahead prediction using UKF;Data Source;EKF;In;LL;MATLAB Function;Multiply;Out;Particle Filter;Rate Transition;Reference;Simulink Function - Measurement (EKF/UKF);Simulink Function - Measurement Likeliehood (Particle Filter);Simulink Function - State Transition (EKF/UKF);Simulink Function - State Transition Particle Filter;SubSystem;Subsystem;Sum;UKF;measurement;measurementFcn;measurementLikelihoodFcn;particleStateTransitionFcn;particles;particles ;predictedParticles;stateTransitionFcn;u;x;xNext;xnext;y

BLOCKTYPE:
ArgIn;ArgOut;Demux;Extended Kalman Filter;Gain;Iddata InputOutput;Inport;Outport;Particle Filter;RateTransition;S-Function;Scope;Sum;Terminator;TriggerPort;Unscented Kalman Filter


MODELNAME: StateEstimation_Using_NeuralSS
PATH: examples/ident/main/StateEstimation_Using_NeuralSS.slx
BLOCKTYPE_FREQUENCY: 3;2;2;1;1;7;2;1;2;2;3;4;2;2;1
CHECKSUM: 3E779A9267AEBE12B367E91F9B159FDF
PRODUCT: MATLAB;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
BLOCK:
 Demux ; SFunction ; Terminator ;10 step ahead prediction using EKF;10 step ahead prediction using Particle Filter;10 step ahead prediction using UKF;Data Source;EKF;Input;LL;MATLAB Function;Particle Filter;Rate Transition;Reference;S imulink Function - Measurement Likeliehood (Particle Filter);Selector;Simulink Function - State Transition Particle Filter;SubSystem;UKF;measurement;measurementLikelihoodFcn;particleStateTransitionFcn;particles;particles ;predictedParticles;u;x;xNext;y

BLOCKTYPE:
ArgIn;ArgOut;Demux;Extended Kalman Filter;Iddata InputOutput;Inport;Outport;Particle Filter;RateTransition;S-Function;Scope;Selector;Terminator;TriggerPort;Unscented Kalman Filter


MODELNAME: StateEstimation_Using_NonlinearGreyBox
PATH: examples/ident/main/StateEstimation_Using_NonlinearGreyBox.slx
BLOCKTYPE_FREQUENCY: 5;4;4;1;1;9;4;1;4;3;3;4;4;1;3
CHECKSUM: 4AB6BE5FBAEA1E9F305E0CC1FE8BBC63
PRODUCT: MATLAB;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
BLOCK:
 Demux ; SFunction ; Terminator ;10 step ahead prediction using EKF;10 step ahead prediction using Particle Filter;10 step ahead prediction using UKF;Data Source;EKF;LL;MATLAB Function;Particle Filter;Reference;Selector;Simulink Function - Measurement (EKF/UKF);Simulink Function - Measurement Likeliehood (Particle Filter);Simulink Function - State Transition (EKF/UKF);Simulink Function - State Transition Particle Filter;SubSystem;UKF;Zero-Order Hold;measurement;measurementFcn;measurementLikelihoodFcn;particleStateTransitionFcn;particles;particles ;predictedParticles;stateTransitionFcn;u;x;xNext;xnext;y

BLOCKTYPE:
ArgIn;ArgOut;Demux;Extended Kalman Filter;Iddata InputOutput;Inport;Outport;Particle Filter;S-Function;Scope;Selector;Terminator;TriggerPort;Unscented Kalman Filter;ZeroOrderHold


MODELNAME: TimeVaryingStateEstimator
PATH: examples/ident/main/TimeVaryingStateEstimator.slx
BLOCKTYPE_FREQUENCY: 1;3;1;1;2;2;1;1;1;1;2
CHECKSUM: D75C4C59EAA3858B1E25C0D2D2256115
PRODUCT: DSP System Toolbox;MATLAB;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
BLOCK:
ARMAX estimator ;B/A transfer fcn to SS ;Bus Creator;Bus Selector;C/A transfer function to SS;Data Source;Gain;Kalman Filter;Moving Variance;Reference;Reshape;Terminator;noise variance;output prediction

BLOCKTYPE:
BusCreator;BusSelector;Gain;Iddata InputOutput;Reshape;Scope;Terminator;ctrlKalmanFilter;dsp.simulink.MovingVariance;idEstimatorsPolyModel;idModelTypeConverter


MODELNAME: ex_RLS_Estimator_Block_fb
PATH: examples/ident/main/ex_RLS_Estimator_Block_fb.slx
BLOCKTYPE_FREQUENCY: 1;1;1;2;2;3;2;1;2;1;2;1;1
CHECKSUM: 35A22CB709E76EB7AA818BE3B18A16DE
PRODUCT: MATLAB;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
ANNOTATION:
Select and store the last sample from the frame Construct regressors Check if prediction errors are small compared to observed outputs

BLOCK:
 Demux ; SFunction ; Terminator ;Construct Regressors;Delay;Dot Product Calculate 2-Norm of Errors;Dot Product Calculate 2-Norm of Outputs;From Workspace;H;InputFrame;MATLAB Function;Parameter Display;Parameters;Performance;Recursive Least Squares Estimator;Reference;Regressors;Selector;Sqrt - Errors;Sqrt - Outputs;SubSystem;uFrame;uLastSample

BLOCKTYPE:
Delay;Demux;Display;DotProduct;FromWorkspace;Inport;Outport;S-Function;Scope;Selector;Sqrt;Terminator;idEstimatorsRLS


MODELNAME: ex_RLS_Estimator_Block_sb_inf
PATH: examples/ident/main/ex_RLS_Estimator_Block_sb_inf.slx
ANNOTATION: Copyright 2012-2021 The MathWorks Inc.
BLOCKTYPE: Delay;Display;FromWorkspace;Mux;Scope;Sum;idEstimatorsRLS
BLOCKTYPE_FREQUENCY: 1;1;2;2;2;1;1
CHECKSUM: 886A160BEDBC60DDF934D55271CDD4FB
PRODUCT: MATLAB;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
BLOCK:
Delay;From Workspace;Mux;Outputs Scope;Parameter Display;Parameter Scope;Recursive Least Squares Estimator;Reference;Sum


MODELNAME: idF14Model
PATH: examples/ident/main/idF14Model.slx
ANNOTATION: Nz pilot calculation Nz = (dq/dt*22.8 + q*Uo - dw/dt)/g Copyright 1990-2023 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;1;2;13;8;6;1;3;1;7;9
CHECKSUM: 70EFF371AD3892063641FC37A16A8D4B
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ID
BLOCK:
Actuator Model;Aircraft Dynamics Model;Alpha-sensor Low-pass Filter;Angle of Attack Scope;Band-Limited White Noise;Constant;Controller;Derivative;Dryden Wind Gust Models;Elevator Command (deg);Elevator Deflection d (deg);Gain;Input Scope;Pilot;Pilot G Force Scope;Pilot G force;Pilot g force (g);Pitch Rate Lead Filter;Pitch Rate q (rad/sec);Product;Proportional plus integral compensator;Q-gust model;Qg;Reference;Rotary Gust qGust (rad/sec);Stick Input (in);Stick Prefilter;SubSystem;Sum;Transfer Fcn.;Vertical Gust wGust (ft/sec);Vertical Velocity w (ft/sec);W-gust model;Wg;alpha (rad);q;q (rad/sec);w


MODELNAME: iddemo_boost_converter
PATH: examples/ident/main/iddemo_boost_converter.slx
BLOCKTYPE_FREQUENCY: 1;3;1;1;1;1;1;1;1;1;1;1;1;1;1;3;1;1;1
CHECKSUM: 6B08C44DEBC6C71C0ACB7DFAF50FA3D5
PRODUCT: MATLAB;Simscape;Simscape Electrical;Simulink
PRODUCT_BASECODE: ID
BLOCK:
C;Controlled Voltage Source;D;Data Type Conversion;DutyCycle;Electrical Reference;IGBT;L;PS-Simulink Converter;PWM fs=100kHz;Rate Transition;Reference;Relational Operator;Rload;Saw-tooth waveform;Simulink-PS Converter;Solver Configuration;SubSystem;Uout;Variable R;Vin;Voltage Sensor;c;d

BLOCKTYPE:
Capacitor;Constant;Controlled Voltage Source;DataTypeConversion;Diode;Electrical Reference;IGBT (Ideal, Switching);Inductor;Inport;Outport;PS-Simulink Converter;RateTransition;RelationalOperator;Repeating table;Scope;Simulink-PS Converter;Solver Configuration;Variable Resistor;Voltage Sensor


MODELNAME: iddemo_cstr
PATH: examples/ident/main/iddemo_cstr.slx
BLOCKTYPE_FREQUENCY: 2;1;5;1;5;1;3;3;5;13;5;14;2;2;1;1;3;18;1;5;1;4;7;1;12;1;1;6;6;3;1
CHECKSUM: 712E3634E1B72DCB4353215C9FEC2839
PRODUCT: MATLAB;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
ANNOTATION:
Inject perturbation at two time intervals: [0, 200] seconds and [400, 600] seconds Copyright 2013-2018 The MathWorks, Inc.

BLOCK:
 Revert CA Signal Scaloing;-DeltaE/R;1-Step Ahead Prediction Error;1/CAscale;A(2);A(3);A(z) Sum of Elements;ABC;Adaptive PI Controller;Add;B(2);B(3);B(z) Sum of Elements;Band-Limited White Noise;Bus Creator;Bus Selector;C(2);C(3);CA;CA Reference;CA Scale;CA_integrator;CAbar;CAf;CAref;CSTR;Calculate DC Gain;Clock;Constant;DC Gain;DCGain;DeltaH/RhoCp;Digital Clock;Divide;Dot Product;EIn;EOut;Enable;F/V;F/V ;F/V + UA/(RhoCpV);Feed Concentration;Feed Temperature;From;From - CAbar;From - Error;From - Parameters;From - Tjbar;Goto - CAbar;Goto - Enable;Goto - Error;Goto - Parameters;Goto - Tjbar;Interval Test for 0s to 200s;Interval Test for 400s to 600s;Logical Operator;Math Function;Moving Average - CA;Moving Average - Tj;Moving Average Filter;Mux;Normalize;PI Controller;Params;Preprocess CA;Preprocess Tj;Prm;PrmIn;Product;Recursive Polynomial Model Estimator;Reference;Residual Concentration;Residual Concentration Reference;Revert Signal Scaling;Revert Tj Signal Scaling;Saturation;Select Parameters;Selector;Selector - A(2);Selector - A(3);Selector - B(2);Selector - B(3);Selector - C(2);Selector - C(3);Simulation Error;SubSystem;Sum;Switch;T;T_integrator;Tc;Terminator;Tf;Time-Varying ARMAX;Tj;Tj Scale;Tjbar;Tjscale/CAscale;To Workspace - A(q);To Workspace - B(q);To Workspace - C(q);To Workspace - e;To Workspace - t;To Workspace - u;UA/(V*RhoCp);Unit Delay;ZOH - CA;ZOH - Tj;Zero-Order Hold;e;k;u;y

BLOCKTYPE:
Band-Limited White Noise.;BusCreator;BusSelector;Clock;Constant;DigitalClock;DiscreteFilter;DotProduct;From;Gain;Goto;Inport;Integrator;Interval Test;Logic;Math;Mux;Outport;PID 1dof;Product;Saturate;Scope;Selector;Step;Sum;Switch;Terminator;ToWorkspace;UnitDelay;ZeroOrderHold;idEstimatorsPolyModel


MODELNAME: iddemo_engine
PATH: examples/ident/main/iddemo_engine.slx
BLOCKTYPE_FREQUENCY: 1;2;5;4;1;2;2;6;6;4;4;17;2;2;1;8;10;8;1;6;1;1;2;7;1;1;3;1
CHECKSUM: 467BBD2FEB27DDE1D7DEACC6C33F48D5
PRODUCT: MATLAB;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
ANNOTATION:
Engine Torque Torque Disturbances Intake Manifold Vacuum Throttle Flow vs. Valve Angle and Pressure Air Intake Dynamics Copyright 2013-2015 The MathWorks, Inc. Engine Model Recursive Estimator Estimated Model

BLOCK:
% to deg ;0 <= theta <= ;Air Charge;Air charge;Atmospheric Pressure, Pa (bar);Atmospheric Pressure, Pa (bar) ;Background;Bias;Combustion;Constant;Convert to mass charge;Delay;Detect Inertia Change;Divide;Drag Torque;Engine Speed, N;Error (%);From;Gain;Goto;Induction to Power Stroke Delay;Inertia;Intake Manifold;J;Load;Manifold Pressure, Pm (bar);Math Function;Measurement Noise;MinMax;Moving Average;Mux;N;N (rad/sec);Parameter Covariance;Parameters;Product;Pulse Generator;Pumping;Recursive Least Squares Estimator;Reference;Regressors;Selector;Sonic Flow ;Spark Advance;Step;SubSystem;Sum;Switch;Teng;Throttle;Throttle & Manifold;Throttle (%);Throttle Ang.;Throttle Angle, theta (deg);Throttle Flow, mdot (g/s);Tload;Torque;Torque Gen;Vehicle Dynamics;Zero-Order Hold;dM/dt delay;f(theta);flow direction;g(pratio);mdot Input (g/s);p0 = 0.543 bar;r;rad/s to 1000*rpm;trpm;trpm Est;u;w = T/J w0 = 209 rad/s;y

BLOCKTYPE:
Band-Limited White Noise.;Bias;Constant;Delay;DiscreteFilter;DiscretePulseGenerator;Display;Fcn;From;Gain;Goto;Inport;Integrator;Math;MinMax;Mux;Outport;Product;Saturate;Scope;Selector;Signum;Step;Sum;Switch;VariableTransportDelay;ZeroOrderHold;idEstimatorsRLS


MODELNAME: iddempr1
PATH: examples/ident/main/iddempr1.slx
ANNOTATION: Red part: system to be modeled using IDPROC Blue part: Controller
BLOCKTYPE: Gain;RandomNumber;Sum;ToWorkspace;TransferFcn;TransportDelay;ZeroOrderHold;chirp
BLOCKTYPE_FREQUENCY: 1;1;2;2;2;1;1;1
CHECKSUM: 735B31291D414C707F019BC6CBF09A79
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ID
BLOCK:
Chirp Signal;Gain;Random Number;Reference;Sum;To Workspace;Transfer Fcn;Transport Delay;Zero-Order Hold


MODELNAME: iddempr2
PATH: examples/ident/main/iddempr2.slx
ANNOTATION: Red part: system to be modeled using IDPROC Blue part: Controller
BLOCKTYPE_FREQUENCY: 1;1;1;1;2;2;2;1;1
CHECKSUM: 2EB7C290F416FACDCC24F35CDC03252B
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: ID
BLOCK:
Integrator;Pulse Generator;Random Number;Saturation;Sum;To Workspace;Transfer Fcn;Transport Delay;Zero-Order Hold

BLOCKTYPE:
DiscretePulseGenerator;Integrator;RandomNumber;Saturate;Sum;ToWorkspace;TransferFcn;TransportDelay;ZeroOrderHold


MODELNAME: nlarx_simulator
PATH: examples/ident/main/nlarx_simulator.slx
BLOCKTYPE: Concatenate;Iddata InputOutput;Nonlinear ARX Model;RateTransition;Scope
BLOCKTYPE_FREQUENCY: 1;1;3;4;1
CHECKSUM: 5304B9B168AEEF08C7F0E795941E954D
PRODUCT: MATLAB;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
BLOCK:
Downsample by a factor of ;Iddata Source;Nonlinear ARX Model;Reference;Scope;Upsample by a factor of ;Vector Concatenate


MODELNAME: nlhw_simulator
PATH: examples/ident/main/nlhw_simulator.slx
BLOCKTYPE: Concatenate;Hammerstein-Wiener Model;Iddata InputOutput;RateTransition;Scope
BLOCKTYPE_FREQUENCY: 1;2;1;3;1
CHECKSUM: C5599CCCAD0EB24EB5CA2178224ED436
PRODUCT: MATLAB;Simulink;System Identification Toolbox
PRODUCT_BASECODE: ID
BLOCK:
Downsample by a factor of ;Hammerstein-Wiener Model;Iddata Source;Reference;Scope;Upsample by a factor of ;Vector Concatenate


MODELNAME: HLF_SystemArchitecture
BLOCKTYPE: Inport;ModelReference;Outport
BLOCKTYPE_FREQUENCY: 51;1;41
CHECKSUM: 82347B7E0F2571CA4C9F78FA6CD0F7CE
PRODUCT: MATLAB;Requirements Toolbox;Simulink;System Composer
PRODUCT_BASECODE: IE
EXTERNALFILE_REFERENCE: HighwayLaneFollowingController_SW_Arch___Model_Block___
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_04/ISO_4_6_5_3_SysArcDesSpec/HLF_SystemArchitecture.slx

ANNOTATION:
Mounted behind the rear-view mirror Mounted behind the rear-view mirror  The ECU consists of a microprocessor and CAN/LIN Transceivers   The Highway Lane Following Module consists of one ECU, which is connected to other modules with LIN and CAN system buses.  Highway Lane Following System

BLOCK:
 MicroController;Brake_FL;Brake_FR;Brake_RL;Brake_RR;Bus Element In;Bus Element Out;CANTransceiverConfirmedTracks;CANTrasceiverLanes;Camera ;CanTransceiverSpeedLimit;Driver;Driver Interface;Environment Sensors;External Environment;GPS Sensor;HLF ECU;HLF Switch;Highway Lane Following Module;Highway Lane Following SW Architecture;Lane Detection;LinTransceiverAccDec;LinTransceiverLongVel;LinTransceiverSteering;Physical Vehicle;Radar Sensor;Speed Limit Recognition;SubSystem;Traffic Participants Detection;Vehicle Foundational Systems;Vehicle Internal Sensors


MODELNAME: HighwayLaneFollowingController_SW_Arch
ANNOTATION: BSW
BLOCKTYPE: Inport;ModelReference;Outport
BLOCKTYPE_FREQUENCY: 11;1;5
CHECKSUM: F2D2848044D97D18AC84CB8EC97F2278
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink;System Composer
PRODUCT_BASECODE: IE
EXTERNALFILE_REFERENCE: HighwayLaneFollowingController___Model_Block___
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_07_SwArcDes/WPs/ISO_6_7_5_1_SwArcDesSpec/HighwayLaneFollowingController_SW_Arch.slx

BLOCK:
Bus Element In;Bus Element Out;Comm Services;HLF Modes;HighLaneFollowingController;I/O Services;In Bus Element;Out Bus Element;RTE;SubSystem;System and Memory Services


MODELNAME: ControllerModeSelector
BLOCKTYPE: Constant;Inport;Outport;RelationalOperator;Saturate;Switch;UnaryMinus
BLOCKTYPE_FREQUENCY: 1;3;1;1;1;1;1
CHECKSUM: 563FF5C5EFDF20720CC4DD5AA531D5E0
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/ControllerModeSelector/ControllerModeSelector.slx

DESCRIPTION:
Model to output acceleration based on information from the MPC and Watchdog controller. This is considered as a SW unit.

ANNOTATION:
Input: Deceleration, Watchdog Brake, Acceleration Description: based on the watchdog brake, either select acceleration computed from the controller or the deceleration from the watchdog controller Output: Acceleration Cmd

BLOCK:
Acceleration;AccelerationCmd;Constant;Deceleration;GreaterThan;Saturation;Switch;UnaryMinus;WatchdogBrake


MODELNAME: ControllerModeSelector_Harness
BLOCKTYPE: Inport;ModelReference;Outport;SignalSpecification
BLOCKTYPE_FREQUENCY: 7;1;5;4
CHECKSUM: 390296DE29C85687AD133285E54C6426
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: IE
EXTERNALFILE_REFERENCE: ControllerModeSelector___Model_Block___
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/ControllerModeSelector/ControllerModeSelector_Harness.slx

BLOCK:
Acceleration;AccelerationCmd;ControllerModeSelector;Deceleration;Inport_;Input Conversion Subsystem;Outport_;Output Conversion Subsystem;SigSpec_;SubSystem;WatchdogBrake


MODELNAME: EstimateLaneCenter
DESCRIPTION: Model to esitmate centerline of the lane from information about the lane boundaries.
BLOCKTYPE_FREQUENCY: 1;3;5;1;1;4;19;3;1;9;8;1;7;4
CHECKSUM: 92DF3556F9587E67DF4E3F109DD43C7C
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/EstimateLaneCenter/EstimateLaneCenter.slx

ANNOTATION:
Curvature Derivative = D[ 1 / ( 1 / (left curvature) – guard)] = left curvature derivative / (1 – (left curvature) * guard)^2. Curvature = 1 / ( 1 / (left curvature) – guard) = left curvature / (1 – (left curvature) * guard).  Input: Lanes Description: Centerline is computed from the left lane boundary only with some guard distance Output: Center  Input: Lanes Description: Interpolate parameters for both lane boundaries to get centerline Output: Center  Input: Lanes Description: If current lane detections are not reliable, consider previous centerline as current Output: Center Curvature = 1 / ( 1 / (right curvature) + guard) = right curvature / (1 + (right curvature) * guard) Curvature Derivative = D[ 1 / ( 1 / (right curvature) + guard)] = right curvature derivative / (1 + (right curvature) * guard)^2  Input: Lanes Description: Centerline is computed from the right lane boundary only with some guard distance Output: Center  Input: LaneDetections Description: Computes centerline from detected lane boundaries Output: LaneCenter

BLOCK:
 Demux ; SFunction ;Add;Bias;BusCreator;Center;CenterFromLeft;CenterFromLeftAndRight;CenterFromNone;CenterFromRight;Constant;Delay;Divide;Gain;HalfLaneWidthEstimate;InBusElement;LaneCenter;LaneDetections;MATLABFunction;Merge;NewCenter;OldCenter;Product;SubSystem;Subtract;centerFromLeftAndRightFunction;centerFromLeftFunction;centerFromNoneFunction;centerFromRigthFunction;fcnLeftAndRight();fcnLeftOnly();fcnNone();fcnRightOnly();lanes

BLOCKTYPE:
Bias;BusCreator;Constant;Delay;Demux;Gain;Inport;InportShadow;Merge;Outport;Product;S-Function;Sum;TriggerPort


MODELNAME: FindLeadCar
BLOCKTYPE: Constant;Demux;Inport;Outport;S-Function;Terminator
BLOCKTYPE_FREQUENCY: 2;1;6;6;1;1
CHECKSUM: 19095EC64BA5B82723946C97DFE686B8
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/FindLeadCar/FindLeadCar.slx

DESCRIPTION:
Model to find leading car from information about other traffic participants and lane boundaries. This is considered as a SW unit.

BLOCK:
 Demux ; SFunction ; Terminator ;Constant;FindLeadCar;SubSystem;confirmedTracks;lane;laneWidth;mio;mioTrackIndex;positionSelector;relative_distance;relative_velocity


MODELNAME: LaneCenterCoordChange
DESCRIPTION: Software unit for lane center coordinate change
BLOCK: BusCreator;BusSelector;LaneCenter_ISO;LaneCenter_SAE;SignalSpecification;UnaryMinus
BLOCKTYPE: BusCreator;BusSelector;Inport;Outport;SignalSpecification;UnaryMinus
BLOCKTYPE_FREQUENCY: 1;1;1;1;4;4
CHECKSUM: 5536E57F5779D26127B1FD1000106CC4
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/LaneCenterCoordChange/LaneCenterCoordChange.slx

ANNOTATION:
Input: LaneCenter_ISO Description: change lane center representation from the ISO 8855 to SAE J670E coordinate system. In SO 8855 positive Y is to the left, whereas it is to the right in SAE J670E Output: LaneCenter_SAE


MODELNAME: MPCController
DESCRIPTION: Model Predictive Controller Model. This is considered as a SW unit.
BLOCKTYPE_FREQUENCY: 4;10;5;1;1;1;2;2
CHECKSUM: BA211B1766B0DE9B968BFB0A2095B089
PRODUCT: Embedded Coder;MATLAB;Model Predictive Control Toolbox;Requirements Toolbox;Simulink
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/MPCController/MPCController.slx

ANNOTATION:
 Input: RelativeDistanceIn, RelativeVelocityIn, LongitudinalVelocityIn Description: Limit input values to accepted values Output: RelativeDistance, RelativeVelocity, LongitudinalVelocity  Input: SetVelocity, LongitudinalVelocity, Curvature, LateralDeviation, RelativeYawAngle, RelativeDistanc, RelativeVelocity Description: based on inputs, decide on optimal Accerlation and SteeringAngle to output Output: SteeringAngle, Acceleration

BLOCK:
AccSigConv;Acceleration;Constant;Curvature;GreaterThan;InValueLimiters;LateralDeviation;LongitudinalVelocity;LongitudinalVelocityIn;PathFollowingControlSystem;Reference;RelativeDistance;RelativeDistanceIn;RelativeVelocity;RelativeVelocityIn;RelativeYawAngle;Saturation;SetVelocity;SteeringAngle;SteeringSigConv;SubSystem;Switch

BLOCKTYPE:
Constant;Inport;Outport;Path following control (PFC) system;RelationalOperator;Saturate;SignalConversion;Switch


MODELNAME: PreviewCurvature
DESCRIPTION: Software unit for preview curvature
BLOCKTYPE: BusSelector;DataTypeConversion;Gain;Inport;Outport;Product;Saturate;Sum;UnaryMinus
BLOCKTYPE_FREQUENCY: 1;4;1;2;3;1;4;1;2
CHECKSUM: 776568FA014E31755B4C9E50010580BE
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/PreviewCurvature/PreviewCurvature.slx

BLOCK:
Bus Selector;Data Type Conversion;Gain;LaneCenter_SAE;LateralDeviation;LongitudinalVelocity;PreviewedCurvature;Product;RelativeYawAngle;Saturation;Sum;Unary Minus


MODELNAME: WDGBrakeTimeCalc
DESCRIPTION: Software unit for Stopping time calculation
BLOCKTYPE: Constant;Inport;Outport;Product;Sum
BLOCKTYPE_FREQUENCY: 6;1;4;4;4
CHECKSUM: 8B61E955A294D91DF1451ADCA43E6054
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/WDGBrakeTimeCalc/WDGBrakeTimeCalc.slx

BLOCK:
Constant;Divide;FBStoppingTime;FCWStoppingTime;PB1StoppingTime;PB2StoppingTime;Sum;const;egoVelocity


MODELNAME: WDGBrakeTimeCalc_Harness
BLOCKTYPE: Inport;ModelReference;Outport;SignalSpecification
BLOCKTYPE_FREQUENCY: 6;1;9;5
CHECKSUM: 7F8DFF7553EA40F187AD088CF8778187
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: IE
EXTERNALFILE_REFERENCE: WDGBrakeTimeCalc___Model_Block___
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/WDGBrakeTimeCalc/WDGBrakeTimeCalc_Harness.slx

BLOCK:
FBStoppingTime;FCWStoppingTime;Inport_;Input Conversion Subsystem;Outport_;Output Conversion Subsystem;PB1StoppingTime;PB2StoppingTime;SigSpec_;SubSystem;WDGBrakeTimeCalc;egoVelocity


MODELNAME: WDGBrakingLogic
DESCRIPTION: Software unit for WDG braking logic
BLOCKTYPE: Constant;Demux;Inport;Outport;RelationalOperator;S-Function;Terminator
BLOCKTYPE_FREQUENCY: 1;1;14;4;1;1;1
CHECKSUM: 1D58F9EA6D5F11B21C5E436A31F9953D
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink;Stateflow
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/WDGBrakingLogic/WDGBrakingLogic.slx

ANNOTATION:
Input: relativeDistance, TTC, FCWtime, PB1time, PB2time, FBtime, longVelocity Description: as time to collision gets shorter, request deceleration and signal the braking status. 4 Levels are identified warning, partial braking 1/2 and full braking. Output: BrakeStatus, decel

BLOCK:
 Demux ; SFunction ; Terminator ;BrakeStatus;BrakingLogic;Constant;FBtime;FCWtime;PB1time;PB2time;RelationalOperator;SubSystem;TTC;decel;longVelocity;relativeDistance;stop


MODELNAME: WDGBrakingLogic_Harness
BLOCKTYPE_FREQUENCY: 1;2;2;11;1;16;9;1;9;1;2
CHECKSUM: ADA46BA393E96A09992D1368223A18DF
PRODUCT: MATLAB;Simulink;Simulink Test
PRODUCT_BASECODE: IE
EXTERNALFILE_REFERENCE: WDGBrakingLogic___Model_Block___
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/WDGBrakingLogic/WDGBrakingLogic_Harness.slx

BLOCK:
 Demux ; SFunction ; Terminator ;BrakeStatus;FBtime;FCWtime;From_;Goto_;Inport_;Input Conversion Subsystem;Outport_;Output Conversion Subsystem;PB1time;PB2time;RateTs_;Rate_Transition_;SigSpec_;SubSystem;TTC;Test Sequence;WDGBrakingLogic;decel;delay_;longVelocity;relativeDistance


MODELNAME: WDGBrakingLogic_Harness_SLDV
DESCRIPTION: Test harness for SLDV generated test cases.
BLOCKTYPE: Inport;ModelReference;Outport;SignalSpecification
BLOCKTYPE_FREQUENCY: 16;1;11;9
CHECKSUM: 1AC32698759F7E8389D214FF77F5E5D6
PRODUCT: Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: IE
EXTERNALFILE_REFERENCE: WDGBrakingLogic___Model_Block___
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/WDGBrakingLogic/WDGBrakingLogic_Harness_SLDV.slx

BLOCK:
BrakeStatus;FBtime;FCWtime;Inport_;Input Conversion Subsystem;Outport_;Output Conversion Subsystem;PB1time;PB2time;SigSpec_;SubSystem;TTC;WDGBrakingLogic;decel;longVelocity;relativeDistance


MODELNAME: WDGTTCCalculation
DESCRIPTION: Software unit to calculate TTC
BLOCK: Abs;Divide;Saturation;Sign;Sum;TTC;const;mioDistance;mioVelocity
BLOCKTYPE: Abs;Constant;Inport;Outport;Product;Saturate;Signum;Sum
BLOCKTYPE_FREQUENCY: 1;1;2;1;2;1;1;1
CHECKSUM: A4345F434C17E2D7AC02E07716EE9CEC
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/WDGTTCCalculation/WDGTTCCalculation.slx


MODELNAME: WDGTTCCalculation_Harness
BLOCKTYPE: Inport;ModelReference;Outport;SignalSpecification
BLOCKTYPE_FREQUENCY: 5;1;4;3
CHECKSUM: 72D30BC0C08D73C7C02BA5C18C82EAE3
PRODUCT: MATLAB;Simulink
PRODUCT_BASECODE: IE
EXTERNALFILE_REFERENCE: WDGTTCCalculation___Model_Block___
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_08_SwU/WPs/ISO_6_8_5_1_SwUnDesSpec/WDGTTCCalculation/WDGTTCCalculation_Harness.slx

BLOCK:
Inport_;Input Conversion Subsystem;Outport_;Output Conversion Subsystem;SigSpec_;SubSystem;TTC;WDGTTCCalculation;mioDistance;mioVelocity


MODELNAME: DetectMIOLaneCenter
DESCRIPTION: Lane Following Data Conditioning (SW Component)
BLOCKTYPE: Inport;ModelReference;Outport;Terminator
BLOCKTYPE_FREQUENCY: 2;3;3;1
CHECKSUM: DF9B862E50586A2EE313E5E4C7DA4192
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_10_SwIntgr/WPs/ISO_6_10_5_2_SwEmb/DetectMIOLaneCenter/DetectMIOLaneCenter.slx

BLOCK:
CoordinateChange;EstimateLaneCenter;FindLeadCar;LaneCenter;Lanes;Terminator;confirmedTracks;mioRelativeDistance;mioRelativeVelocity

EXTERNALFILE_REFERENCE:
EstimateLaneCenter___Model_Block___FindLeadCar___Model_Block___LaneCenterCoordChange___Model_Block___


MODELNAME: HighwayLaneFollowingController
DESCRIPTION: The integrated SW component of highway lane following controller
BLOCKTYPE: Inport;ModelReference;Outport
BLOCKTYPE_FREQUENCY: 4;3;2
CHECKSUM: 01C7AD3CA88EC61152A792088D92994A
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink
PRODUCT_BASECODE: IE
EXTERNALFILE_REFERENCE: DetectMIOLaneCenter___Model_Block___LF_Controller___Model_Block___PreviewCurvature___Model_Block___
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_10_SwIntgr/WPs/ISO_6_10_5_2_SwEmb/HighwayLaneFollowingController/HighwayLaneFollowingController.slx

BLOCK:
AccelertionCmd;DetectMIOLaneCenter;EstimatePathDeviations;LaneFollowingController;Lanes;SetVelocity;SteeringCmd;confirmedTracks;longVelocity


MODELNAME: HighwayLaneFollowingControllerAssessment
BLOCKTYPE_FREQUENCY: 6;1;3;1;7;1;7;1;1;1;3;7;36;3;2;1;3;1;1;4;31;2;2;3;5;5;4;1;6;1;6;4;12;2;1;5;2;1;6;1;1
CHECKSUM: 34F84EA06C0BA2CC657D5C5762E3DB50
PRODUCT: Automated Driving Toolbox;Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: IE
EXTERNALFILE_REFERENCE: HighwayLaneFollowingController___Model_Block___
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_10_SwIntgr/WPs/ISO_6_10_5_2_SwEmb/HighwayLaneFollowingController/HighwayLaneFollowingControllerAssessment.slx

ANNOTATION:
This subsystem has been inserted by Simulink to adapt the output of the source blocks to the interface required by the harnessed component. Modifying the contents of this subsystem may result in compilation and simulation failure.  Metrics Assessment This subsystem has been inserted by Simulink to adapt the output of the harnessed component to the interface required by the sink blocks. Modifying the contents of this subsystem may result in compilation and simulation failure. Pack ground-truth  Simulation 3D Scenario Vehicles Scenario  SAE J670E to ISO 8855 Trivial Braking Trivial Powertrain Trivial Driveline  Vehicle Dynamics Metrics Assessment

BLOCK:
; Demux ; SFunction ; Terminator ;AND;Accel;Acceleration;Acceleration (m/s^2);Actors;Bicycle Model - Force Input SAE J670 (NED);Bus Selector;Collision;Collision Detection;Constant;Cuboid To 3D Simulation;Data Type Conversion;Decel;Demux;Derivative;Detect Collision;Detect MIO;Divide;Ego;Ego Set Velocity;Ego Velocity;Ego Velocity (m/s);First Order Hold;ForwardGear;Front Force;Gain;Gear;GreaterThan;HighwayLaneFollowingController;In Lane;Inport_;Input Conversion Subsystem;IsNaN;Lane Boundaries;Lanes;Lateral Deviation;Lateral Metrics;Longitudinal Acceleration;Longitudinal Velocity;Lower level dynamics;Metrics Assessment;Multiport Switch;Mux;Neutral;Outport_;Output Conversion Subsystem;Pack Actors Truth;Pack Ego Actor;Pack Lanes Truth;Pose;Position;Product;Rate Transition;Rear Force;Reference;SAE J670E to ISO 8855 (NED to NWU);Saturation;Scenario Reader;Selector;Set Velocity;SigSpec_;Simple Driveline & Brakes;Simulation 3D Vehicle with Ground Following ;Simulation3DScenario;Simulation3DSceneConfiguration;Steering Angle;SubSystem;Subtract;Sum;Terminator;Time Gap;To Virtual Bus;Tracks;Trigonometric Function;Unary Minus;Unit Conversion;Vehicle Dynamics;Vehicle To World;Velocity;Verify In Lane;Verify Lateral Deviation;Verify No Collision;Verify Time gap;Yaw Angle;Yaw Rate;a;actors;actorsTruth;collision;headway;lane;lanes;lanesTruth;lanes_in;mioIndex;mioRelLongDist;mioRelLongVel;pos;vehicleTracks;vehicleTracks_in;vel;xdot;yaw;yawRate

BLOCKTYPE:
BusSelector;Checks_SMin;Checks_SRange;CircularGaugeBlock;Constant;DataTypeConversion;Demux;Derivative;Detect Collision;Detect Most Important Obejct (MIO);FirstOrderHold;Gain;Inport;InportShadow;LampBlock;LinearGaugeBlock;Logic;ModelReference;MultiPortSwitch;Mux;Outport;Product;RateTransition;RelationalOperator;S-Function;Saturate;Selector;SignalConversion;SignalSpecification;Simulation 3D Scene Configuration;Simulation 3D Vehicle with Ground Following;Sum;Terminator;TransferFcn;Trigonometry;UnaryMinus;UnitConversion;Vehicle Body 3DOF Lateral;driving.scenario.internal.CuboidTo3DSimulation;driving.scenario.internal.ScenarioReader;driving.scenario.internal.VehicleToWorld


MODELNAME: LF_Controller
DESCRIPTION: Lane following controller (SW component)
BLOCKTYPE: Inport;ModelReference;Outport
BLOCKTYPE_FREQUENCY: 7;3;2
CHECKSUM: 9D55A4E42F24F795BC0F985ADA5855E9
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_10_SwIntgr/WPs/ISO_6_10_5_2_SwEmb/LF_Controller/LF_Controller.slx

BLOCK:
AccelerationCmd;ControlModeSelector;Curvature;LateralDeviation;LongVelocity;MPCController;RelativeYawAngle;SetVelocity;SteeringCmd;WDGBrakingController;mioDistance;mioVelocity

EXTERNALFILE_REFERENCE:
ControllerModeSelector___Model_Block___MPCController___Model_Block___WDGBrakingController___Model_Block___


MODELNAME: WDGBrakingController
DESCRIPTION: WDG Braking Controller (SW Component)
BLOCKTYPE: Inport;ModelReference;Outport
BLOCKTYPE_FREQUENCY: 3;3;2
CHECKSUM: EA5201C0ABE3F5D779EBEBD4CAF51782
PRODUCT: Embedded Coder;MATLAB;Requirements Toolbox;Simulink
PRODUCT_BASECODE: IE
EXTERNALFILE_REFERENCE: WDGBrakeTimeCalc___Model_Block___WDGBrakingLogic___Model_Block___WDGTTCCalculation___Model_Block___
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/ISO_06_10_SwIntgr/WPs/ISO_6_10_5_2_SwEmb/WDGBrakingController/WDGBrakingController.slx

BLOCK:
BrakeStatus;BrakeTimeCalculation;TTCCalculation;WDGBrakingLogic;decel;egoVelocity;mioDistance;mioVelocity


MODELNAME: baseModelConfiguration
DESCRIPTION: This is the base model from which the default model configurations are derived.
BLOCK: Unit_Delay;in;out
BLOCKTYPE: Inport;Outport;UnitDelay
BLOCKTYPE_FREQUENCY: 1;1;1
CHECKSUM: 27E17AB0886C8BC48D29B4123E51470C
PRODUCT: Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/tools_iso26262/templates/model_configurations/baseModelConfiguration.slx

ANNOTATION:
 Input: in1 Description: delay input for one step Output: out1 (delayed input)  This model is to be used for exporting model configuration. The model configuration has been verified against Modeling Standards for ISO 26262 and Embedded Coder Compatibilities. The following procedure has been taken to achieve the final configuration: Verified against Code Generation Advisor with objectives set to Execution efficiency, ROM efficiency, RAM efficiency, MISRA C:2012 guidelines. Verified against Model Advisor checks defined in checks/iso26262.json ReturnWorkspaceOutputs enabled to avoid the need of Simulink Test override. Standard math library set to C99(ISO) Note that: fixing warnings for Modling Standards for ISO 26262 may change some configuration parameters checked and verified using code generation advisor. Note: only the check for linked requirements is failing 


MODELNAME: iso26262ModelTemplate
DESCRIPTION: This is the base model from which the ISO 26262 model template is derived.
CHECKSUM: 582392FD15CC6DF9E7012E2B37D360FA
PRODUCT: Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: IE
PATH:
examples/iec_certkit/projects/src/iso26262CaseStudy/tools_iso26262/templates/model_templates/iso26262ModelTemplate.slx


MODELNAME: ImageSharpeningHDLModel
PATH: examples/images/main/ImageSharpeningHDLModel.slx
ANNOTATION: HDL Code Generation for Image Sharpening Copyright 2015 The MathWorks, Inc.
BLOCKTYPE: EnablePort;Frame To Pixels;Image Filter;Image From File;Inport;Outport;Pixels To Frame;ToWorkspace
BLOCKTYPE_FREQUENCY: 1;1;1;1;3;2;1;1
CHECKSUM: 5B4080AA0091E9D5AD7DE2CE77BF650C
PRODUCT: Computer Vision Toolbox;Image Processing Toolbox;MATLAB;Simulink;Vision HDL Toolbox
PRODUCT_BASECODE: IP;DX
BLOCK:
Enable;Frame To Pixels;Image;Image From File;Image Sharpening HDL System;Pixels To Frame;Reference;Save Result to Workspace;Sharpening Filter;SubSystem;To Workspace;ctrlIn;ctrlOut;pixelIn;pixelOut


MODELNAME: demoimaqsl_barcoderecognition
PATH: examples/imaq/main/demoimaqsl_barcoderecognition.slx
BLOCKTYPE_FREQUENCY: 2;1;1;5;5;1;1;1;1;1;28;1;2;1;21;1;1;1;5;3;3;1;5;1
CHECKSUM: 8284AA47C82F9B40217F6372F2D523C9
PRODUCT: Computer Vision Toolbox;Image Acquisition Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: IA
ANNOTATION:
Barcode Recognition Using Live Video Acquisition Copyright 2008-2011 The MathWorks, Inc. Works with GTIN-13, EAN-13, and UPC barcodes ?

BLOCK:
 Demux ; Ground ; SFunction ; Terminator ;Add;Assignment;Bar Detection;Barcode;Barcode Detection;Barcode Recognition;Barcode Validation;Center;Code;Codebook Generator;Color Space Conversion;Compare To Confidence Threshold (range is 0 to 1);Conf;Constant;Create Scalines;Display;Display Barcode;Draw Shapes;Enable;F;Feature Calculation;From Video Device;GCode;GCodeRev;Gain;I;Image;Image ;Insert Text;LCode;LCodeRev;LGCode;Line;Logical Operator;Math Function;Num;NumBar;NumSeq;Probe;Product;R;RCode;RCodeRev;Reference;Reshape;Row;Row Positions Of Scanlines;Select Width;Selector;Sequence;SubSystem;Sum of Elements;Switch;Threshold For Bar Width Variance;Valid;Variables;Width;WidthVar

BLOCKTYPE:
Assignment;Color Space Conversion;Compare To Constant;Constant;Demux;Draw Shapes;EnablePort;From Video Device;Gain;Ground;Inport;Insert Text;Logic;Math;Outport;Probe;Product;Reshape;S-Function;Selector;Sum;Switch;Terminator;To Video Display


MODELNAME: demoimaqsl_rgbhistogram_all
PATH: examples/imaq/main/demoimaqsl_rgbhistogram_all.slx
ANNOTATION: Live Image Acquisition and Histogram Display ? Copyright 2006-2011 The MathWorks, Inc.
BLOCKTYPE: ArrayPlot;Concatenate;DataTypeConversion;From Video Device;Histogram;Reshape;VideoViewer
BLOCKTYPE_FREQUENCY: 1;1;3;1;3;3;1
CHECKSUM: D6586257125156223285462C92D94876
PRODUCT: Computer Vision Toolbox;DSP System Toolbox;Image Acquisition Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: IA
BLOCK:
Data Type Conversion;From Video Device;Histogram;Matrix Concatenation;RGB Histogram;Reference;Reshape;Video Viewer


MODELNAME: demoimaqsl_rgbhistogram_win
PATH: examples/imaq/main/demoimaqsl_rgbhistogram_win.slx
ANNOTATION: Live Image Acquisition and Histogram Display ? Copyright 2006-2011 The MathWorks, Inc.
BLOCKTYPE: ArrayPlot;Concatenate;DataTypeConversion;From Video Device;Histogram;Reshape;To Video Display
BLOCKTYPE_FREQUENCY: 1;1;3;1;3;3;1
CHECKSUM: 23D90D1F6220ECA0421EEAE6F5E9CE37
PRODUCT: Computer Vision Toolbox;DSP System Toolbox;Image Acquisition Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: IA
BLOCK:
Data Type Conversion;From Video Device;Histogram;Matrix Concatenation;RGB Histogram;Reference;Reshape;To Video Display


MODELNAME: IfxDCDCBuckConverter
PATH: examples/infineonaurix/main/IfxDCDCBuckConverter.slx
BLOCKTYPE_FREQUENCY: 1;5;3;1;1;1;1;4;1;1;1;1;1;7;2;1;1;13;2;2;2;15;1;2;4;1;1;2;1;1;1;1;2;1;1;1;4;1;2;4;1
CHECKSUM: C168321C6AE14FB5A39D17071A83884A
PRODUCT_BASECODE: EC
ANNOTATION:
Voltage Measurement  DC-DC Buck Converter with Infineon AURIX TC4x  Copyright 2022-2023 The MathWorks, Inc.

BLOCK:
ADC Voltage;ADCINT;ADC_Count;BuckConverterPlant;Calculate Voltage Output;CodeGeneration;Constant;Controller;Converter (Code Generation);Converter (Simulation);Cout;Current Sensor;Data Store Memory;Data Store Read;Data Store Write;Data Type Conversion;Delay;Demux;Discrete PI Controller with anti-windup & reset;Display;Electrical Reference;Gain;Ground;HW_INT;Hardware Interrupt;Inductor;Input Scaling;Ki;Kp;Logical Operator;MOSFET;Mux;NOT;Out;Out_Voltage;Output Voltage;PI_Controller;PS Gain;PS-Simulink Converter;PWM;PWM Generator;Push Button;Rate Transition;Reference;Relational Operator;Repeating Sequence;Rout;Saturation;Scale_to_duty in percentages;Simulation;Simulink-PS Converter;Solver Configuration;Source;SubSystem;Sum;SyncBuckPlant;TMADC;Terminator;Trigger;V_fb;V_pu;V_ref;Variant Sink;Variant Source;Vo_ADC;Vo_meas_PU;Vout;Vout_Count;Vpu;duty;dutyCycle;enableStatus;feedback;voltageFeedback

BLOCKTYPE:
Capacitor;Constant;Current Sensor;DC Voltage Source;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;Delay;Demux;Display;Electrical Reference;Function-Call Generator;Gain;Ground;HardwareInterrupt;Inductor;Inport;Logic;MOSFET (Ideal, Switching);Mux;Outport;PID 1dof;PS Gain;PS-Simulink Converter;PWM;PushButtonBlock;RateTransition;RelationalOperator;Repeating table;Resistor;Saturate;Simulink-PS Converter;Solver Configuration;Sum;TMADC;Terminator;TriggerPort;VariantSink;VariantSource;Voltage Sensor

PRODUCT:
Embedded Coder;Embedded Coder Support Package for Infineon AURIX TC3x Microcontrollers;MATLAB;Simscape;Simscape Electrical;Simulink


MODELNAME: tc4x_8ledsBlinky
PATH: examples/infineonaurix/main/tc4x_8ledsBlinky.slx
BLOCKTYPE_FREQUENCY: 2;2;5;4;2;1;4;1;1;2;10;1;8;1;4;2;1;1;1;1
CHECKSUM: 9390F31D45A36925084010FF522B2CD5
PRODUCT_BASECODE: EC
ANNOTATION:
 Running-Light Pattern Switch On the next LED  LEDs have reverse polarity, e.g. low = LED On  Alternate-Light Pattern  LEDs have reverse polarity, e.g. low = LED On Set Ts = 1e-3 for VP simulation or Ts = 0.5 for hardware deployment. You can consider reducing the Ts for hardware deployment if the GPIO P33.11 button press needs to be captured quickly.  Algorithm Different LED pattern Output Input Leading-Edge-Flip-Flop Copyright 2021-2022 The MathWorks, Inc.  Getting Started with Infineon AURIX TC4x  Led Panel

BLOCK:
Action Port;Add;Bitwise NOT;Bitwise XOR;Constant;Counter Free-Running;D Flip-Flop;Data Type Conversion;Demux;Digital Port Read;Digital Port Write;Extract Bits;Generate Code;If;If Action Subsystem;Merge;Mux;Out;P13.;P33.;Reference;Shift Arithmetic;Step;SubSystem;Switch;Variant Source

BLOCKTYPE:
ActionPort;ArithShift;Bitwise Operator;Constant;Counter Free-Running;DFlipFlop;DataTypeConversion;Demux;DigitalPortRead;DigitalPortWrite;Extract Bits;If;LampBlock;Merge;Mux;Outport;Step;Sum;Switch;VariantSource


MODELNAME: tc4x_mcb_pmsm_foc_encoder
PATH: examples/infineonaurix/main/tc4x_mcb_pmsm_foc_encoder.slx
CHECKSUM: 94A98F2569BA90EE500416BA2FE8804F
PRODUCT_BASECODE: EC
ANNOTATION:
1 is added since counter starts from 0 Update midpoint offset Step1- ADC calibration Current Measurements Position & Speed Measurements Encoder Subsystem Scaling Delays  Field Oriented Control with Infineon AURIX TC4x <!DOCTYPE HTML PUBLIC -//W3C//DTD HTML 4.0//EN http://www.w3.org/TR/REC-html40/strict.dtd> <html><head><meta name=qrichtext content=1 /><style type=text/css> p, li { white-space: pre-wrap; } </style></head><body align=center style= font-family:Arial; font-size:20px; font-weight:400; font-style:normal;> <p align=center style= margin-top:0px; margin-bottom:0px; margin-left:0px; margin-right:0px; -qt-block-indent:0; text-indent:0px;><span style= font-size:10px;>Copyright 2022 The MathWorks, Inc. Plant

BLOCK:
 ; Calculate Position and Speed; Demux ; Ground ; SFunction ; Terminator ;10 counts;3-Phase Sine Voltage Generator;ADC MidPoint Calibration;ADC/Encoder config;ADCINT;AND;Abs;Action Port;Add;Add Offset;Address;Average;Average-Value Inverter;Bitwise Operator;Bus Selector;C;Calculate Phase Currents;Cast;Clarke Transform;Closed Loop Control;Code generation;Codegeneration;Constant;Control_System;Correction_Factor_sinePWM;Counter Free-Running;Current Control;Current_Controllers;DQ Limiter;Data;Data Store Memory;Data Store Read;Data Store Write;Data Type Conversion;Data_Type;Data_Type_Fixed_Point;Data_Type_Float;Delay;Demux;Desired Speed;Detect Change;Digital Port Read;Digital Port Write;Direction;Discrete PI Controller with anti-windup & reset;Divide;Duty Cycles;DutyCycles;Duty_Cycles;Duty_abc;EnClosedLoop;EnPWM;Enable;EncSpeed;Enc_Position_Count;Encoder;Equal;Event Listener;Feedbacks;Feedbacks_sim;From;Function-Call Generator;Function-Call Split;Function-Call Subsystem;Gain;Get ADC Count;Get ADC Voltage;Get Current Sense Voltage;Get Currents;Get_PU;Get_PU ;Get_QEP_Counts;Goto;Ground;HW_INT;Hardware Interrupt;IIR Filter;I_fb;I_ref;Ia_ADC;Iab_EnTicks;Iab_meas_PU;Ib_ADC;Id;Id_ref;Ida_ref_PU;Idq;IdqRef_PU;Idq_debug;Idq_ref_PU;If;If Action Subsystem;In;IndexOffset in PU;Info;Initialize Function;Input Scaling;Inverse Park Transform;Inverter;Inverter (Code Generation);Inverter (Simulation);Inverter Signals;Inverter and Motor;Inverting / Non-inverting Current measurement amplifieer;Iq;Iq_ref;Ki;Kp;LED_Blink;Logical Operator;Loop_Execution;MATLAB Function;Mechanical to Electrical Position;Memory;Mod;Mux;NOT;N_fb;N_ref;Offset voltage;One;One_by_Two;Open Loop Start-Up;Out;Output Scaling;PI_Controller_Id;PI_Controller_Iq;PI_Controller_Speed;PU;PU_Conversion;PWM;PWM_Duty;PWM_Duty_Cycles;Park Transform;PhaseCurr;Pos_PU;Position Generator;Product;Pulse Generator;Q17 per unit conversion;QEP_Position_Count;QSPI;Quadrature Decoder;RT;Ramp;Ramp Generator;Ramp_Time;Ramp_Time (sec);Rate Transition;Reference;RxOut;Sample_Time;Saturate at ADC Vref;Saturate at inverter Vref;Saturation;Scale_to_duty in percentages;Selector;Sensor_Measurements;Shift Arithmetic;Sim_fb;Simulation;Sine-Cosine Lookup;Space Vector Generator;Speed Control;Speed Measurement;Speed Ref;Speed_Meas_PU;Speed_Ref_Final (rpm);Speed_Ref_In;Speed_Ref_Init (rpm);Speed_Ref_Open;Speed_Ref_PU;Speed_Ref_Selector;Speed_fb;Speed_ref(rpm);Step;Step speed;SubSystem;Subsystem;Sum;Surface Mount PMSM;Switch;Switch to closed loop ;TLE9180_Enable;TMADC;Terminator;Theta_e;Theta_rad;Trigger;Tx;Unit Delay;V-by-f;V_ref;Vabc;Vabc in PU;Vabc_ref;Variant Sink;Variant Source;Vd_ref;Vq_ref;Wrap;Zero_Cancellation;function;in;out;position_increment;rad;rpm2PU;rpm2freq;speed;speed_PU;~1.65V in ADC counts

BLOCKTYPE:
3-Phase Sine Voltage Generator;Abs;ActionPort;ArithShift;Average Value Inverter;Bitwise Operator;BusSelector;Clarke Transform;Constant;Counter Free-Running;DQ Limiter;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;Delay;Demux;Detect Change;DigitalPortRead;DigitalPortWrite;DiscreteIntegrator;DiscretePulseGenerator;EnablePort;Encoder;EventListener;From;Function-Call Generator;FunctionCallSplit;Gain;Goto;Ground;HardwareInterrupt;IIR Filter;If;Inport;InportShadow;Inverse Park Transform;Logic;Math;Mechanical to Electrical Position;Memory;Mux;Outport;PID 1dof;PWM;PWM Modulation;Park Transform;Position Generator;Product;QSPI;Quadrature Decoder;RateTransition;RelationalOperator;S-Function;Saturate;Selector;Sine-Cosine Lookup;Speed Measurement;Step;Sum;Surface Mount PMSM;Switch;TMADC;Terminator;TriggerPort;UnitDelay;VariantSink;VariantSource

BLOCKTYPE_FREQUENCY:
1;1;4;40;1;65;1;1;87;1;1;5;9;7;10;2;11;1;1;7;1;2;4;1;1;3;2;10;21;3;7;1;2;2;57;1;1;7;2;1;2;12;62;3;2;1;1;1;4;1;1;10;1;5;3;1;1;1;4;11;1;5;1;17;12;2;2;5

PRODUCT:
Embedded Coder;Embedded Coder Support Package for Infineon AURIX TC3x Microcontrollers;MATLAB;Motor Control Blockset;Simulink


MODELNAME: tc4x_qspi_interrupts
PATH: examples/infineonaurix/main/tc4x_qspi_interrupts.slx
BLOCKTYPE_FREQUENCY: 1;1;1;1;1;2;3;5;3;1;1;1;2
CHECKSUM: 868FE5A89B94CE89889DA3305FDFF9D0
PRODUCT_BASECODE: EC
BLOCK:
 Demux ; SFunction ; Terminator ;Constant;Data Store Memory;Data Store Read;Data Store Write;Function-Call Subsystem;In;MATLAB Function;QSPI Receive;QSPI Transmit;QSPI_Rx_Interrupt;QSPI_Tx_Interrupt;Rate Transition;Reference;Rx;Status;SubSystem;function;u;v;y

BLOCKTYPE:
Constant;DataStoreMemory;DataStoreRead;DataStoreWrite;Demux;HardwareInterrupt;Inport;Outport;QSPI;RateTransition;S-Function;Terminator;TriggerPort


MODELNAME: demoinstrslUDPTransmitReceive
PATH: examples/instrument/main/demoinstrslUDPTransmitReceive.slx
BLOCK: Counter Limited;Reference;Scope;UDP Receive;UDP Send
BLOCKTYPE: Counter Limited;Scope;instrument.system.UDPReceive;instrument.system.UDPSend
BLOCKTYPE_FREQUENCY: 1;1;1;1
CHECKSUM: 9B76911D8ACB8FB98DA3354A7FD0EDA2
PRODUCT: Instrument Control Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: IC
ANNOTATION:
demoinstrslUDPTransmitReceive shows how Instrument Control Toolboxs UDP blocks can be used to communicate with an arduino board. In this model, a packet is sent using the UDP Send block to Arduino which returns data after incrementing by one, which is read by the UDP Receive block. Copyright 2022 The MathWorks, Inc.


MODELNAME: demoinstrsl_Serial_read_binary
PATH: examples/instrument/main/demoinstrsl_Serial_read_binary.slx
BLOCKTYPE_FREQUENCY: 1;1;1;1;1;1;1;1;1;1
CHECKSUM: 73161C75088CDF96D9023DDEEE5666BA
PRODUCT: MATLAB;Motor Control Blockset;Simulink
PRODUCT_BASECODE: IC
ANNOTATION:
demoinstrsl_serial_read_binary shows how Instrument Control Toolboxs Serial blocks can be used to communicate with an arduino board. In this model, a read command signal is sent using the Serial Send block to Arduino which returns data which is read by the Serial Receive block. Copyright 2022 The MathWorks, Inc.

BLOCK:
 Demux ; SFunction ; Terminator ;MATLAB Function;Reference;Scope;Serial Configuration;Serial Receive;Serial Send;SubSystem;read command;sensorValue;voltage

BLOCKTYPE:
Constant;Demux;Inport;Outport;S-Function;Scope;Terminator;system.SerialConfiguration;system.SerialReceive;system.SerialSend


MODELNAME: demoinstrsl_VISA_query
PATH: examples/instrument/main/demoinstrsl_VISA_query.slx
BLOCK: Display;Reference;Scope;VISA
BLOCKTYPE: Display;Scope;instrument.system.VISA
BLOCKTYPE_FREQUENCY: 2;1;1
CHECKSUM: A6A138906A66BBE5FC26F53476FF86C9
PRODUCT: Instrument Control Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: IC
ANNOTATION:
demoinstrsl_VISA_ query shows how to use the VISA block to communicate with a Keysight® Technologies DSO-X 1204A oscilloscope. In this model, you configure the VISA block to send a query command to the oscilloscpe to read the waveform. The oscilloscope responds to the command by returning the waveform data to the VISA block. Copyright 2023 The MathWorks, Inc.


MODELNAME: demoinstrsl_tcpipServerCommunication
PATH: examples/instrument/main/demoinstrsl_tcpipServerCommunication.slx
BLOCK: Reference;Scope;TCP/IP Receive
BLOCKTYPE: Scope;instrument.system.TCPIPReceive
BLOCKTYPE_FREQUENCY: 1;1
CHECKSUM: 057B8C61C7EAACBF550CD5F68F491055
PRODUCT: Instrument Control Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: IC
ANNOTATION:
demoinstrsl_tcpipServerCommunication shows how Instrument Control Toolboxs TCP/IP Client Receve block can be used to communicate with tcpserver. In this model, tcpserver sends data that is read by the TCP/IP Receive Client block. Copyright 2022 The MathWorks, Inc.


MODELNAME: demoinstrsl_tcpipclient_read_ASCII
PATH: examples/instrument/main/demoinstrsl_tcpipclient_read_ASCII.slx
BLOCK: Reference;Scope;TCP/IP Receive;TCP/IP Send;read command
BLOCKTYPE: Constant;Scope;instrument.system.TCPIPReceive;instrument.system.TCPIPSend
BLOCKTYPE_FREQUENCY: 1;1;1;1
CHECKSUM: 27414251523FF23DAF4D8C1A779942B0
PRODUCT: Instrument Control Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: IC
ANNOTATION:
demoinstrsl_tcpipclient_read_ASCII shows how Instrument Control Toolboxs TCP/IP Client blocks can be used to communicate with a remote server. In this model, a command signal is sent using the TCP/IP Send Client block to the server running on an Arduino which returns data read by the TCP/IP Receive Client block. Copyright 2018 The MathWorks, Inc.


MODELNAME: demoinstrsl_tcpipclient_stream_ASCII
PATH: examples/instrument/main/demoinstrsl_tcpipclient_stream_ASCII.slx
BLOCKTYPE_FREQUENCY: 1;1;1;1;1;1;1
CHECKSUM: 73F59AAF6C97502CDDC3F2B9B39FC5EF
PRODUCT: Instrument Control Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: IC
ANNOTATION:
demoinstrsl_tcpipclient_stream_ASCII shows how Instrument Control Toolboxs TCP/IP Client blocks can be used to communicate with a remote server. In this model, a trigger sends a signal using the TCP/IP Send Client block to the server running on an Arduino which returns data read by the TCP/IP Receive Client block. Copyright 2018 The MathWorks, Inc.

BLOCK:
Enable;Reference;Scope;Step;SubSystem;TCP/IP Receive;TCP/IP Send;Trigger;read data stream;start command;write start command

BLOCKTYPE:
Constant;EnablePort;Scope;Step;TriggerPort;instrument.system.TCPIPReceive;instrument.system.TCPIPSend


MODELNAME: demoinstrsl_udpReceive
PATH: examples/instrument/main/demoinstrsl_udpReceive.slx
BLOCK: Enable;Enabled Subsystem;In;Reference;Scope;SubSystem;To Workspace;UDP Receive
BLOCKTYPE: EnablePort;Inport;Scope;ToWorkspace;instrument.system.UDPReceive
BLOCKTYPE_FREQUENCY: 1;1;1;1;1
CHECKSUM: 93F359149A6ED8A05EF27E92B183AF2A
PRODUCT: Instrument Control Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: IC
ANNOTATION:
demoinstrsl_udpReceive shows how Instrument Control Toolboxs UDP Receive block can be used to communicate with MATLAB script in same MATLAB session or different MATLAB session or from a MATLAB running in another computer. In this model, a packet is sent from MATLAB script, which is read by the UDP Receive block. Copyright 2022 The MathWorks, Inc.


MODELNAME: demoinstrsl_udpcommunication
PATH: examples/instrument/main/demoinstrsl_udpcommunication.slx
BLOCK: Received data;Reference;Sine Wave;UDP Receive;UDP Send
BLOCKTYPE: Scope;Sin;instrument.system.UDPReceive;instrument.system.UDPSend
BLOCKTYPE_FREQUENCY: 1;1;1;1
CHECKSUM: 5F9381419708D5EF5BC500879B026DC6
PRODUCT: Instrument Control Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: IC
ANNOTATION:
The UDP Send block is set to a higher priority than the UDP Receive block. This ensures that UDP Send block runs before UDP Receive block. ? Basic UDP Communication


MODELNAME: ev3_drive_closedloop
PATH: examples/legomindstormsev3/main/ev3_drive_closedloop.slx
BLOCKTYPE_FREQUENCY: 1;5;4;1;13;2;2;2;2;9;2;2;2;1;9;1;1;2;1
CHECKSUM: AF3B295261FA60FE4BFF8D2D23C38A0F
PRODUCT: Embedded Coder;MATLAB;Simulink;Simulink Support Package for LEGO MINDSTORMS EV3 Hardware
PRODUCT_BASECODE: SL
ANNOTATION:
1) Convert motor power (-100 to +100) to angular velocity (degrees per sec) 2) Add Gaussian noise, possibly with nonzero mean 3) Scale by sample time 3 Accumulate the encoder value change in angle in sample interval angular velocity [deg/sec] change in angle in sample interval angular velocity [deg/sec] 1) Convert motor power (-100 to +100) to angular velocity (degrees per sec) 2) Add Gaussian noise, possibly with nonzero mean 3) Scale by sample time 3 Accumulate the encoder value Actual Motors Detect turn -> straight run change Save the difference between left and right motor revolution angle When phidot goes to 0, remember the difference between L and R encoder values (they need not be equal, since robot would have been turning). While phidot == 0, apply correction to maintain that difference. If phidot ~= 0, dont apply the correction. Copyright 2014-2015 The MathWorks, Inc. Driving with PID Control

BLOCK:
1-D Lookup Table;Actual Rotation Diff;Add;Bias;Calculate theta_diff;Compare To Zero;Constant;Data Type Conversion;Detect Flag;Gain;In;L. Wheel Speed;Left Wheel Motor;Left Wheel Speed;Memory;Motors;Out;PID Controller;R. Wheel Speed;Random Number;Reference;Right Wheel Motor;Right Wheel Motor Encoder;Right Wheel Speed;Rotation;Rotation Diff;Saturation;Scope;Simulated Left Wheel Motor;Simulated Right Wheel Motor;Simulated Rotation Diff;Speed;SubSystem;Subsystem;Sum;Switch;Trigger;Triggered Subsystem;Turn Angle;Unit Delay;Variant Source;Weighted Sample Time;left Wheel Motor Encoder;phidot_cmd;theta_diff;theta_m_l;theta_offset

BLOCKTYPE:
Compare To Zero;Constant;DataTypeConversion;Gain;Inport;LEGO MINDSTORMS EV3 Encoder;LEGO MINDSTORMS EV3 Motor;Lookup_n-D;Memory;Outport;RandomNumber;SampleTimeMath;Saturate;Scope;Sum;Switch;TriggerPort;UnitDelay;VariantSource


MODELNAME: ev3_drive_openloop
PATH: examples/legomindstormsev3/main/ev3_drive_openloop.slx
BLOCKTYPE_FREQUENCY: 4;2;8;2;2;2;2;6;2;2;1;8;1
CHECKSUM: E31F7DD8BF56ECB1DAFB0D667BC5795F
PRODUCT: Embedded Coder;MATLAB;Simulink;Simulink Support Package for LEGO MINDSTORMS EV3 Hardware
PRODUCT_BASECODE: SL
ANNOTATION:
change in angle in sample interval angular velocity [deg/sec] 1) Convert motor power (-100 to +100) to angular velocity (degrees per sec) 2) Add Gaussian noise, possibly with nonzero mean 3) Scale by sample time 3 Accumulate the encoder value 1) Convert motor power (-100 to +100) to angular velocity (degrees per sec) 2) Add Gaussian noise, possibly with nonzero mean 3) Scale by sample time 3 Accumulate the encoder value angular velocity [deg/sec] change in angle in sample interval Actual Motors Copyright 2014-2015 The MathWorks, Inc. Driving with Open-Loop Control

BLOCK:
1-D Lookup Table;Actual Rotation Diff;Add;Bias;Constant;Data Type Conversion;Encoder;L. Wheel Speed;Left Wheel Motor;Left Wheel Speed;Memory;Motor;Motors;Open-Loop Controller;R. Wheel Speed;Random Number;Reference;Right Wheel Motor;Right Wheel Motor Encoder;Right Wheel Speed;Scope;Simulated Left Wheel Motor;Simulated Right Wheel Motor;Simulated Rotation Diff;Speed;SubSystem;Subsystem;Sum;Turn Angle;Variant Source;Weighted Sample Time;left Wheel Motor Encoder

BLOCKTYPE:
Constant;DataTypeConversion;Inport;LEGO MINDSTORMS EV3 Encoder;LEGO MINDSTORMS EV3 Motor;Lookup_n-D;Memory;Outport;RandomNumber;SampleTimeMath;Scope;Sum;VariantSource


MODELNAME: ev3_i2cread_hitechnic_colorsensor
PATH: examples/legomindstormsev3/main/ev3_i2cread_hitechnic_colorsensor.slx
BLOCK: Blue Component;Demux;Green Component;I2C Register Read;Red Component;Reference
BLOCKTYPE: Demux;Display;ev3.I2CRead
BLOCKTYPE_FREQUENCY: 1;3;1
CHECKSUM: 9DABF7F19E519F13CED03F5E75235FA5
PRODUCT: Embedded Coder;MATLAB;Simulink;Simulink Support Package for LEGO MINDSTORMS EV3 Hardware
PRODUCT_BASECODE: SL
ANNOTATION:
Read raw RGB values from a HiTechnic Color Sensor with LEGO MINDSTORMS EV3 Hardware Copyright 2020 The MathWorks, Inc.


MODELNAME: ev3_linetracking
PATH: examples/legomindstormsev3/main/ev3_linetracking.slx
BLOCKTYPE_FREQUENCY: 2;6;2;1;1;4;1;1;10;14;1;1;2;2;1;14;1;1;1;11;3
CHECKSUM: 450D8E5D16B1302A8512A9EC2DB44856
PRODUCT: Embedded Coder;MATLAB;Simulink;Simulink Support Package for LEGO MINDSTORMS EV3 Hardware
PRODUCT_BASECODE: SL
ANNOTATION:
Normalization by maximum voltage and Scaling to PWM Line Tracking Copyright 2014-2015 The MathWorks, Inc.

BLOCK:
 Left Motor; State Feedback [Ki Kp] %Change these values in the models InitFcn callback;Battery;Battery Voltage;Black;Black Value;Color Sensor;Constant;Convert Volt to PWM;Data Type Conversion;Degrees to Radians;Demux;Derivative Gain;Desired Light;Desired Velocity;DesiredLight;DesiredStates;Discrete-Time Integrator;Display;Divide;Enable;Forward;Gain;Left Motor Encoder;LeftMotor;LeftMotorEncoder;LeftMotorT;Light SensorMonitor;LightError;LightErrorDot;LightSensor;Line Tracking Control ;Low Pass Filer and derivative;Low Pass Filter;Motors;Mux;PWM;Proportional Gain;Reference;ReferenceVelocity;Remove Initial Offset;Right Motor;Right Motor Encoder;RightMotor;RightMotorEncoder;RightMotorT;Saturation;Sensors;State Estimation;States;StatesError;Store Offset;SubSystem;Sum;Turning;Unit Delay;Vector Concatenate;Velocity (m/s);Velocity Control;Volt Cmd;White;White Value;m/s --> rad/s;theta;theta_dot;x;x-x

BLOCKTYPE:
Concatenate;Constant;DataTypeConversion;DegreesToRadians;Demux;DiscreteFilter;DiscreteIntegrator;EnablePort;Gain;Inport;LEGO MINDSTORMS EV3 Color Sensor;LEGO MINDSTORMS EV3 Display;LEGO MINDSTORMS EV3 Encoder;LEGO MINDSTORMS EV3 Motor;Mux;Outport;Product;Saturate;Scope;Sum;UnitDelay


MODELNAME: ev3_pixy2_tracking
PATH: examples/legomindstormsev3/main/ev3_pixy2_tracking.slx
BLOCKTYPE_FREQUENCY: 6;3;14;2;6;2;2;2;4;6;1;1
CHECKSUM: 8E86A193C9BD7B648C12B0D95EF18FA6
PRODUCT: Embedded Coder;MATLAB;Simulink;Simulink Support Package for LEGO MINDSTORMS EV3 Hardware
PRODUCT_BASECODE: SL
ANNOTATION:
Algorithm Actuators Data Source Parameter Tuning Object Tracking with Pixy2 Vision Sensor and LEGO MINDSTORMS EV3 Hardware Copyright 2020 The MathWorks, Inc.

BLOCK:
Add;Alignment Control;Constant;Divide;Height;Idle Motor Speed;LM Power;Left Motor;Left Motor Power;Motor Left;Motor Right;Motors;Multiply;Object Count;Object Tracking;Pixy2 Vision Sensor;Pixy2 X Frame Reference;Proximity Control;RM Power;Ref Motor Power;Reference;Reference Motor Power;Right Motor;Right Motor Power;Selector;Slider;SubSystem;Switch;Terminator;X;Y;Y Threshold;Y Threshold 

BLOCKTYPE:
Constant;Gain;Inport;LEGO MINDSTORMS EV3 Motor;Outport;Product;Selector;SliderBlock;Sum;Switch;Terminator;ev3.pixy2_vision


MODELNAME: ev3_pixy2_tracking_pidcontrol
PATH: examples/legomindstormsev3/main/ev3_pixy2_tracking_pidcontrol.slx
BLOCKTYPE_FREQUENCY: 3;3;6;4;2;2;2;2;2;2;5;2;1;1
CHECKSUM: 32AE8413734CF340CCFBD16972BA5197
PRODUCT: Embedded Coder;MATLAB;Simulink;Simulink Support Package for LEGO MINDSTORMS EV3 Hardware
PRODUCT_BASECODE: SL
ANNOTATION:
Parameter Tuning Actuators Algorithm Data Source Copyright 2020 The MathWorks, Inc.  Object Tracking with Pixy2 Vision Sensor and LEGO MINDSTORMS EV3 Hardware using PID Control

BLOCK:
Add;Constant;Height;Knob;Left Motor;Left Motor Power;Motors;Multiply;Object Count;Object Tracking;PID for Alignment Control;PID for Proximity Control;Pixy2 Vision Sensor;Pixy2 X Frame Reference;Pixy2 Y Bottom Threshold;Reference;Right Motor;Right Motor Power;Saturation;Scope;Slider;SubSystem;Switch;Terminator;X;Y

BLOCKTYPE:
Constant;Gain;Inport;KnobBlock;LEGO MINDSTORMS EV3 Motor;Outport;PID 1dof;Saturate;Scope;SliderBlock;Sum;Switch;Terminator;ev3.pixy2_vision


MODELNAME: ev3_robot
PATH: examples/legomindstormsev3/main/ev3_robot.slx
ANNOTATION: LEGO MINDSTORMS EV3 Robot Control Copyright 2016-2018 The MathWorks, Inc.
BLOCK: Demux;Display_Left;Display_Right;Left;Reference;Right;Terminator;UDP Receive
BLOCKTYPE: Demux;LEGO MINDSTORMS EV3 Display;LEGO MINDSTORMS EV3 Motor;Terminator;UDP Receive
BLOCKTYPE_FREQUENCY: 1;2;2;1;1
CHECKSUM: 41DBC327A7293FFB921312C481273CF6
PRODUCT_BASECODE: SL
PRODUCT:
Embedded Coder;MATLAB;Simulink;Simulink Support Package for LEGO MINDSTORMS EV3 Hardware;SoC Blockset Support Package for Xilinx Devices


MODELNAME: ev3_robot_hostcontrol
PATH: examples/legomindstormsev3/main/ev3_robot_hostcontrol.slx
BLOCKTYPE_FREQUENCY: 2;4;2;6;4;1;1;1;4;1;1;1;1;1;1
CHECKSUM: 7CDAAFD6D4A1110D153EC0D334C289DE
PRODUCT: Instrument Control Toolbox;MATLAB;Simulink;Stateflow
PRODUCT_BASECODE: SL
ANNOTATION:
Copyrights 2016, The MathWorks, Inc.  Host model to control LEGO MINDSTORMS EV3 robot Right motor speed Left motor speed DIRECTION MOTION START/STOP EV3 MOTOR SPEED  Data Visualization  Host to Target Communication  Speed Generation algorithm   LEGO MINDSTORMS EV3 Control Dashboard

BLOCK:
 Demux ; SFunction ; Terminator ;Chart;Demux;Dir;Direction;Display_Direction;Display_On/Off;Display_Speed;Display_fwd/rev;Drive Control;Fwd/Rev;Gauge;Knob;Lamp;Left;Left motor speed;Mux;On/off;Reference;Right;Right Motor speed;Rotary Switch;Slider Switch;Speed;SubSystem;Toggle Switch;UDP Send to EV;fwd;on;speed

BLOCKTYPE:
CircularGaugeBlock;Constant;Demux;Display;Inport;KnobBlock;LampBlock;Mux;Outport;RotarySwitchBlock;S-Function;SliderSwitchBlock;Terminator;ToggleSwitchBlock;instrument.system.UDPSend


MODELNAME: raspberrypi_sensehat_ev3robot
PATH: examples/legomindstormsev3/main/raspberrypi_sensehat_ev3robot.slx
BLOCKTYPE_FREQUENCY: 1;2;2;3;1;3;1;4;2;2;1;1;2;1;2;1
CHECKSUM: 36681627BE4E9F9850E1FE159387EC85
PRODUCT_BASECODE: SL
ANNOTATION:
Copyright 2016 - 2021 The Mathworks, Inc.  Controlling LEGO MINDSTORMS EV3 using Raspberry Pi Sense HAT hardware 

BLOCK:
 Demux ; SFunction ; Terminator ;Accel;Callback Button;Convert to Motor Speeds;Convert to pitch and roll;Demux;Divide;LSM9DS1 IMU Sensor;LeftSpeed;Mux;Pitch;Reference;Reshape;RightSpeed;Roll;Scope;SubSystem;Sum;Trigonometric Function;UDP Send to EV;ax^;ay^;az^;pitch;radian2Deg;roll

BLOCKTYPE:
CustomCallbackButton;Demux;Gain;Inport;LSM9DS1 9-DoF IMU Sensor;Math;Mux;Outport;Product;Reshape;S-Function;Scope;Sum;Terminator;Trigonometry;UDP Send

PRODUCT:
Embedded Coder;MATLAB;MATLAB Support Package for Raspberry Pi Hardware;Simulink;Simulink Support Package for Raspberry Pi Hardware


MODELNAME: GeneratePointCloudForDrivingScenario
PATH: examples/lidar/main/GeneratePointCloudForDrivingScenario.slx
BLOCK: Clusters ;Display;Intensity;Lidar Sensor;Point Cloud Viewer;Reference;Scenario Reader
BLOCKTYPE_FREQUENCY: 1;1;2;1;1
CHECKSUM: 608EA602421C16881EBC6D61C11528C4
PRODUCT_BASECODE: LP
BLOCKTYPE:
Display;PointCloudViewer;ToWorkspace;driving.scenario.internal.ScenarioReader;lidarsimulink.internal.LidarSensorBlock

PRODUCT:
Automated Driving Toolbox;Computer Vision Toolbox;Lidar Toolbox;Lidar Toolbox Documentation;MATLAB;Simulink


MODELNAME: MultiLidarSimulation
PATH: examples/lidar/main/MultiLidarSimulation.slx
ANNOTATION: Multi Lidar Calibration SimulinkVehicle and sensors Copyright 2021 The MathWorks Inc.
BLOCKTYPE_FREQUENCY: 3;6;2;1;1;6
CHECKSUM: A6CD2FBB46601BDF9000CA5D0F1B7776
PRODUCT: Computer Vision Toolbox Documentation;MATLAB;Simulink;Vehicle Dynamics Blockset
PRODUCT_BASECODE: LP
BLOCK:
From Workspace;Record Back Lidar;Record Front Lidar;Reference;Simulation 3D Lidar;Simulation 3D Scene Configuration;Simulation 3D Vehicle with Ground Following;SubSystem;To Workspace;lidarLocation;lidarRotation;point cloud

BLOCKTYPE:
FromWorkspace;Inport;Simulation 3D Lidar;Simulation 3D Scene Configuration;Simulation 3D Vehicle with Ground Following;ToWorkspace


MODELNAME: rrScenarioSimWithLidarSensor
PATH: examples/lidar/main/rrScenarioSimWithLidarSensor.slx
ANNOTATION: Copyright 2023 The MathWorks, Inc.
BLOCKTYPE_FREQUENCY: 1;2;4;1;4;1;2;2;1;1;1;2;2;1;1
CHECKSUM: 5FD1AB12F75FE1A4E4236AC6D2C63159
PRODUCT: Automated Driving Toolbox;Computer Vision Toolbox;Lidar Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: LP
BLOCK:
 Demux ; SFunction ; Terminator ;All Actor Runtime;Bus Selector;Get Actor 3D Simulation Coordinates;Lidar Sensor;Message Receive;Message Send;Path Action Reader;Path Follower;Queue;Reference;RoadRunner Scenario;Self Actor Runtime Reader;Self Actor Runtime Writer;Simulation 3D Camera;Simulation 3D Scene Configuration;Simulation 3D Vehicle with Ground Following Ego Car;Simulation 3D Vehicle with Ground Following Other Car;SubSystem;Video Viewer;Visualize Point Cloud;currPose;intensity;nextPose;wayPointPos;x;xyzPoints;y;yaw

BLOCKTYPE:
BusSelector;Demux;Inport;MATLABSystem;Outport;Queue;Receive;S-Function;Send;Simulation 3D Camera;Simulation 3D Scene Configuration;Simulation 3D Vehicle with Ground Following;Terminator;VideoViewer;lidarsimulink.internal.LidarSensorBlock


MODELNAME: PDSCHThroughputSimulinkModel
PATH: examples/lte/main/PDSCHThroughputSimulinkModel.slx
BLOCKTYPE_FREQUENCY: 3;1;2;8;3;1;3;24;1;2;17;2;8;2;1;8;1
CHECKSUM: C97B96FB680CD7D292FEB1805CAAC8A5
PRODUCT: DSP System Toolbox;LTE Toolbox;MATLAB;Simulink
PRODUCT_BASECODE: LS
ANNOTATION:
 Throughput calculation in percentage and kbps: a) When a subframe has an error, the entire subframe is discarded. b) When two or more codewords are transmitted per subframe, the average throughput is calculated. PDSCH Throughput Performance Model  Copyright 2017-2019 The MathWorks, Inc.

BLOCK:
 Demux ; SFunction ; Terminator ;%;Channel;Constant;Counter Free-Running;Data Type Conversion;Discrete-Time Integrator;Divide;Kbps;Logical Operator;MATLAB Function;Mean;Model Parameters;Model Time Step;More Info;NSubframe;Parameters;Receiver;Reference;SubSystem;Subframe Counter;Switch;Throughput %;Throughput Analysis;Throughput Scope;Throughput Scope kbps;Transmitter;Width;crc;cw;hEst;kbps;nEst;percentage;rxSubframe;rxWav;rxbits;rxgrid;tx;txWav;var

BLOCKTYPE:
Constant;Counter Free-Running;DataTypeConversion;Demux;DiscreteIntegrator;Display;Gain;Inport;Logic;Mean;Outport;Product;S-Function;Scope;Switch;Terminator;Width


MODELNAME: RFLTEReceiverModel
PATH: examples/lte/main/RFLTEReceiverModel.slx
BLOCKTYPE_FREQUENCY: 1;1;3;1;1;1;1;1;1;1;2;2;1;1;8;1;2;2;9;4;1;1;2;2;2;2;2;1;1;1;2
CHECKSUM: 05CA6524E15B0683213E51A6C8EFE138
PRODUCT: Communications Toolbox;DSP System Toolbox;MATLAB;RF Blockset;Simulink
PRODUCT_BASECODE: LS
ANNOTATION:
Wideband IQ Demodulator Direct Conversion Receiver High Linearity LNA Typical Characteristics 2140 MHz Band TA = 25 deg C, VCC = 2.8 V  Copyright 2016-2022 The MathWorks, Inc.

BLOCK:
10 Bit ADC;AWGN Channel;Add;Buffer;Complex to Real-Imag;Configuration;DC Offset Cancellation;Digital Model;Discrete FIR Filter;FIR Model;Frame Conversion;Free Space Path Loss;From Workspace;Ideal_LO;In;In_RF;Inport;Input_RF;LNA;LO;LO + PhaseNoise;LO inport;LO+PhaseNoise;MeanFrame;MeanTime;MixerI;MixerQ;More Info;Out;Out_DC;Out_I;Out_Q;OutportI;OutportQ;Phase Shift;Power 1 Ohm;Power 1 Ohm ;QuantizerImag;QuantizerReal;RF Demodulator;RF Receiver;RMS;R_Isolation;R_Isolation ;Real-Imag to Complex;Reference;Spectrum Analyzer;SubSystem;To Workspace;VGA I;VGA Q;Vector Concatenate;available power input;available power output;dB Conversion;limitImag;limitReal;tp32641027_2271_4d4e_ae8f_d207535dc

BLOCKTYPE:
ADC;AWGN Channel;Amplifier;Buffer;ComplexToRealImag;Concatenate;Configuration;Constant;DC Offset Cancellation;DiscreteFir;Display;FrameConversion;Free Space Path Loss;FromWorkspace;Inport;LTE RF Direct Conversion Receiver;Mean;Mixer;Outport;PMIOPort;Phase Noise;Phase Shift;Quantizer;RMS;RealImagToComplex;Resistor;Saturate;SpectrumAnalyzer;Sum;ToWorkspace;dB Conversion


MODELNAME: RFLTETransmitterModel
PATH: examples/lte/main/RFLTETransmitterModel.slx
BLOCKTYPE_FREQUENCY: 2;1;2;1;1;1;2;2;1;1;1;5;1;9;1;2;1;3;1
CHECKSUM: D12E6E44366652150AF4F4FFBE4C5602
PRODUCT_BASECODE: LS
ANNOTATION:
 RF Superheterodyne Transmitter This architecture upconverts the waveform to the carrier frequency 2140MHz (default) and applies RF filtering and amplification before transmitting the signal.   Modeling and Testing an LTE RF Transmitter Input signal: LTE Test Model (E-TM) Tests: EVM, occupied bandwidth, channel power, CCDF and PAPR Baseband Reception and Measurements RF Transmission  Copyright 2020-2022 The MathWorks, Inc. Baseband Generation

BLOCK:
 Demux ; Ground ; SFunction ; Terminator ;Bandpass Filter;CCDF;CCDF and PAPR;Complex to Real-Imag;Configuration;Constellation Diagram;Decode Subframe;EVM;HPA;IQ Modulator;In;Inport I;Inport Q;Input;Input Buffer;LTE Test Model;More Info;Outport;Outport for CCDF;Output;Output Buffer;Output for CCDF;Overall EVM RMS (%);PAPR;PAPR (dB);RF Transmitter;Reference;Spectrum Analyzer;SubSystem;Terminator;VGA;pdschSym;subframe;wf

BLOCKTYPE:
Amplifier;ArrayPlot;Buffer;ComplexToRealImag;Configuration;ConstellationDiagram;Demux;Display;Filter;Ground;IQ Modulator;Inport;LTE Test Model Waveform Generator;Outport;RF Transmitter;S-Function;SpectrumAnalyzer;Terminator;dsp.simulink.PowerMeter

PRODUCT:
Communications Toolbox;DSP System Toolbox;LTE Toolbox;LTE Toolbox Documentation;MATLAB;RF Blockset;Simulink


MODELNAME: C28379dHostMotorControl
PATH: examples/mcb/main/C28379dHostMotorControl.slx
ANNOTATION: TI C2000 F28379d Host Copyright 2023 The MathWorks, Inc.
BLOCKTYPE: EnablePort;Inport;Outport;Scope;system.SerialConfiguration;system.SerialReceive;system.SerialSend
BLOCKTYPE_FREQUENCY: 1;3;2;1;1;1;1
CHECKSUM: 327217A7CE2DAE7839E06C54FF1F7B49
PRODUCT: Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: MT
EXTERNALFILE_REFERENCE: SCIRXFocQepHost___SubsystemReference_Block___UserInputsFocQepHost___SubsystemReference_Block___
BLOCK:
DataChange;Enable;Enabled Subsystem;Host Serial Receive;Host Serial Setup;Host Serial Transmit;Reference;RsData;SCI Out Abstraction;SCI_Rx_Data;SCI_Tx_Data;Selected_Signals;Serial_Communication;SubSystem;TsData;User Inputs


MODELNAME: C28379dTargetMotorControl
PATH: examples/mcb/main/C28379dTargetMotorControl.slx
BLOCKTYPE_FREQUENCY: 6;3;2;1;1;1;1;1;24;1;3;6;2;3;2;2;1;4;1;8;6;1;53;2;2;1;2;1;11;57;1;5;1;1;5;9;7;6;1;3;1;1;2;3
CHECKSUM: 678E3F58948AA16DEC080D9DFDB77003
PRODUCT: C2000 Microcontroller Blockset;Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: MT
ANNOTATION:
for BoostXL-DRV8305 connected to LaunchXL-28379D System Outputs Enable inverter System Outputs for inverter connected with LaunchXL-28379D Fast Serial Data Monitoring (32-bit) Application Driver_Abstraction  Drivers Application Abstraction UX buttons  Copyright 2023 The MathWorks, Inc.  Motor Control using c28379d Launchpad

BLOCK:
6PWM_Mode;ADC Gain setting;ADC_B_IN;ADC_C_IN;ADC_Gain_Setting;Action Port;Add;Application;Application Abstraction;Automatic offset calibration;Bias;C28x Hardware Interrupt;Calculate Phase Currents;ClosedLoop;Code Generation;Code generation;Codegen;Compare To Constant;Compute Offset;Constant;Counter Limited;CurrentCalib;CurrentPosCalib;DRV830x Enable;Data;Data Type Conversion;Data_out;Data_width;Debug_signal;Delay;Demux;Digital Output;Display;Divide;Dummy;Duty_Cycles;Enable;End;Event Listener;Gain;Get_PU ;Get_QEP_Counts;Ground;HW_INT;Hardware Init;Hardware Interrupt;Heartbeat LED;Iab;IabADC;IabADCIn;Iab_ADC;Iab_Offset;Iabc;If;In;Index Vector;IndexOffset;Input HW Drivers;Input Scaling;InvEn;Inverter Enable;Inverter and Motor;InverterEn;Iteration;Merge;Microcontroller;Mod;Mode;Mode Control;Motor;Mux;NOT;Offser via parameter;One_by_Two;Output PWM Drivers;Output Scaling;PWM;PWM In;PWMDutyCycles;PhaseCurr_fb;PosCalib;Position_fb;RED_LED;RT;Rate Transition;Reference;RunTimeMeasurement;SCI Framing;SCI In Abstraction;SCI Out Abstraction;SCI Receive;SCI Transmit;SCI_Data;SCI_Rx;SCI_Rx_INT;SCI_Tx;SCI_Tx_Data;SPI Master Transfer;Saturation;Scale_to_PWM_Counter_PRD;Selector;Sim;Simulation;Start;Step;SubSystem;Subsystem;Sum;Switch;Switch to closed loop ;Terminator;Theta;ThetaMech;Unit Delay;Va Measurement;Vabc;Vabc_ADC;Vabc_ref;Variant Subsystem;Vb Measurement;Vc Measurement;Vdc;Vdc Measurement;VdcADC;Vdc_ADC;While Iterator;While Iterator Subsystem;Width;btnAlgoParam;btnHardwareParam;btnHotModel;ePWM;eQEP;eQEP Driver;eQEPIn;rad;stop;~1.65V in ADC counts

BLOCKTYPE:
ADC Type 3-5;ActionPort;Bias;C28x Interrupt Block;C28x SCI Receive;C28x SCI Transmit;C28x eQEP;Compare To Constant;Constant;Counter Limited;CustomCallbackButton;DataTypeConversion;Delay;Demux;Display;EnablePort;EventListener;F2837x GPIO Digital Output;Function-Call Generator;Gain;Ground;If;Inport;InportShadow;Logic;Math;Merge;MultiPortSwitch;Mux;Outport;Product;RateTransition;Saturate;Selector;Step;Sum;Switch;Terminator;TriggerPort;UnitDelay;WhileIterator;Width;codertarget.tic2000.blocks.SPIMasterTransfer;ePWM Type 1-4

EXTERNALFILE_REFERENCE:
Application___SubsystemReference_Block___ApplicationAbstraction___SubsystemReference_Block___Motor___SubsystemReference_Block___SCIInAbstraction___SubsystemReference_Block___SCIOutAbstraction___SubsystemReference_Block___


MODELNAME: F2800137HostMotorControl
PATH: examples/mcb/main/F2800137HostMotorControl.slx
ANNOTATION: TI C2000 F2800137 Host Copyright 2023 The MathWorks, Inc.
BLOCKTYPE: EnablePort;Inport;Outport;Scope;system.SerialConfiguration;system.SerialReceive;system.SerialSend
BLOCKTYPE_FREQUENCY: 1;3;2;1;1;1;1
CHECKSUM: 201AA51DED1E30ACD624B92C1D5F4BC9
PRODUCT: Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: MT
EXTERNALFILE_REFERENCE: SCIRXFocQepHost___SubsystemReference_Block___UserInputsFocQepHost___SubsystemReference_Block___
BLOCK:
DataChange;Enable;Enabled Subsystem;Host Serial Receive;Host Serial Setup;Host Serial Transmit;Reference;RxData;SCI Out Abstraction;SCI_Rx_Data;SCI_Tx_Data;Selected_Signals;Serial_Communication;SubSystem;TxData;User Inputs


MODELNAME: F2800137TargetMotorControl
PATH: examples/mcb/main/F2800137TargetMotorControl.slx
BLOCKTYPE_FREQUENCY: 6;3;2;1;1;1;1;1;22;1;3;6;2;3;2;2;1;3;1;7;7;1;53;2;1;1;2;1;11;57;2;5;1;1;5;9;6;6;1;3;1;1;2;3
CHECKSUM: DC43E1B3E6547FEF1C8C7E52D7A16AB6
PRODUCT: C2000 Microcontroller Blockset;Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: MT
ANNOTATION:
System Outputs for inverter connected with F2800137 LaunchPad with DRV8305EVM Fast Serial Data Monitoring (32-bit) Application Application_Abstraction Drivers Driver_Abstraction  Scale Vabc output from application to the range required by PWM drivers  Motor Control using F2800137 Launchpad  Copyright 2023 The MathWorks, Inc. UX buttons

BLOCK:
6PWM_Mode;ADC Gain Setting;ADC_A;ADC_Gain_Setting;Action Port;Add;Application;Application Abstraction;Bias;C28x Hardware Interrupt;Calculate Phase Currents;Calculate Phase Voltages;ClosedLoop;Code Generation;Code generation;Codegen;Compare To Constant;Compute Offset;Constant;Counter Limited;CurrentCalib;CurrentPosCalib;Data;Data Type Conversion;Data_out;Data_width;Debug_signal;Delay;Demux;Digital Output;Display;Divide;Dummy;Duty_Cycles;Enable;End;Event Listener;Gain;Get_QEP_Counts;Ground;HW_INT;Hardware Init;Hardware Interrupt;Heartbeat LED;Iab;IabADC;Iab_A;Iab_ADC;Iab_Offset;Iabc;If;In;Index Vector;IndexOffset in PU;Initial offset calibration;Input HW Drivers;Input Scaling;InvEn;Inverter and Motor;InverterEn;Iteration;LED 1 Hz;Merge;Microcontroller;Mod;Mode;Mode Control;Motor;Mux;NOT;One_by_Two;Output PWM Drivers;Output Scaling;PWM;PWM In;PWMDutyCycles;PhaseCurr_fb;PosCalib;PosSense;Position_fb;Product;RT;Rate Transition;Reference;SCI Framing;SCI In Abstraction;SCI Out Abstraction;SCI Receive;SCI Transmit;SCI_Data;SCI_Rx;SCI_Rx_INT;SCI_Tx;SCI_Tx_Data;SPI Master Transfer;Saturation;Scale_to_PWM_Counter_PRD;Selector;Sim;Simulation;Start;Step;SubSystem;Subsystem;Sum;Switch;Switch to closed loop ;Terminator;ThetaMech;Unit Delay;VabcADC;Vabc_V;Vabc_ref;Variant Subsystem;Vdc;VdcADC;Vdc_ADC;Vdc_V;While Iterator;While Iterator Subsystem;Width;Wrap;btnAlgoParam;btnHardwareParam;btnHotModel;ePWM;eQEP;in;one time offset calibration;out;stop;~1.65V in ADC counts

BLOCKTYPE:
ADC Type 3-5;ActionPort;Bias;C28x Interrupt Block;C28x SCI Receive;C28x SCI Transmit;C28x eQEP;Compare To Constant;Constant;Counter Limited;CustomCallbackButton;DataTypeConversion;Delay;Demux;Display;EnablePort;EventListener;F280013x GPIO Digital Output;Function-Call Generator;Gain;Ground;If;Inport;InportShadow;Logic;Math;Merge;MultiPortSwitch;Mux;Outport;Product;RateTransition;Saturate;Selector;Step;Sum;Switch;Terminator;TriggerPort;UnitDelay;WhileIterator;Width;codertarget.tic2000.blocks.SPIMasterTransfer;ePWM Type 1-4

EXTERNALFILE_REFERENCE:
Application___SubsystemReference_Block___ApplicationAbstraction___SubsystemReference_Block___Motor___SubsystemReference_Block___SCIInAbstraction___SubsystemReference_Block___SCIOutAbstraction___SubsystemReference_Block___


MODELNAME: F280039CTargetMotorControl
PATH: examples/mcb/main/F280039CTargetMotorControl.slx
BLOCKTYPE_FREQUENCY: 6;3;2;1;1;1;1;1;22;1;3;6;2;3;2;2;1;3;1;7;7;1;53;2;1;1;2;1;11;57;2;5;1;1;5;9;6;6;1;3;1;1;2;3
CHECKSUM: 413325D1F9887D18E52AE07872B44D2A
PRODUCT: C2000 Microcontroller Blockset;Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: MT
ANNOTATION:
System Outputs for inverter connected with F280039C LaunchPad with DRV8305EVM Fast Serial Data Monitoring (32-bit) Application Application_Abstraction Drivers Driver_Abstraction  Scale Vabc output from application to the range required by PWM drivers  Motor Control using F280039C Launchpad  Copyright 2023 The MathWorks, Inc. UX buttons

BLOCK:
6PWM_Mode;ADC;ADC Gain Setting;ADC_B;ADC_C;ADC_Gain_Setting;Action Port;Add;Application;Application Abstraction;Bias;C28x Hardware Interrupt;Calculate Phase Currents;Calculate Phase Voltages;ClosedLoop;Code Generation;Code generation;Codegen;Compare To Constant;Compute Offset;Constant;Counter Limited;CurrentCalib;CurrentPosCalib;Data;Data Type Conversion;Data_out;Data_width;Debug_signal;Delay;Demux;Digital Output;Display;Divide;Dummy;Duty_Cycles;Enable;End;Event Listener;Gain;Get_QEP_Counts;Ground;HW_INT;Hardware Init;Hardware Interrupt;Heartbeat LED;Iab;IabADC;Iab_A;Iab_ADC;Iab_Offset;Iabc;If;In;Index Vector;IndexOffset in PU;Initial offset calibration;Input HW Drivers;Input Scaling;InvEn;Inverter and Motor;InverterEn;Iteration;LED 1 Hz;Merge;Microcontroller;Mod;Mode;Mode Control;Motor;Mux;NOT;One_by_Two;Output PWM Drivers;Output Scaling;PWM;PWM In;PWMDutyCycles;PhaseCurr_fb;PosCalib;PosSense;Position_fb;Product;RT;Rate Transition;Reference;SCI Framing;SCI In Abstraction;SCI Out Abstraction;SCI Receive;SCI Transmit;SCI_Data;SCI_Rx;SCI_Rx_INT;SCI_Tx;SCI_Tx_Data;SPI Master Transfer;Saturation;Scale_to_PWM_Counter_PRD;Selector;Sim;Simulation;Start;Step;SubSystem;Subsystem;Sum;Switch;Switch to closed loop ;Terminator;ThetaMech;Unit Delay;VabcADC;Vabc_V;Vabc_ref;Variant Subsystem;Vdc;VdcADC;Vdc_ADC;Vdc_V;While Iterator;While Iterator Subsystem;Width;Wrap;btnAlgoParam;btnHardwareParam;btnHotModel;ePWM;eQEP;in;one time offset calibration;out;stop;~1.65V in ADC counts

BLOCKTYPE:
ADC Type 3-5;ActionPort;Bias;C28x Interrupt Block;C28x SCI Receive;C28x SCI Transmit;C28x eQEP;Compare To Constant;Constant;Counter Limited;CustomCallbackButton;DataTypeConversion;Delay;Demux;Display;EnablePort;EventListener;F28003x GPIO Digital Output;Function-Call Generator;Gain;Ground;If;Inport;InportShadow;Logic;Math;Merge;MultiPortSwitch;Mux;Outport;Product;RateTransition;Saturate;Selector;Step;Sum;Switch;Terminator;TriggerPort;UnitDelay;WhileIterator;Width;codertarget.tic2000.blocks.SPIMasterTransfer;ePWM Type 1-4

EXTERNALFILE_REFERENCE:
ApplicationAbstractionOpenLoop___SubsystemReference_Block___ApplicationOpenLoop___SubsystemReference_Block___MotorPMSMOpenLoop___SubsystemReference_Block___SCIInAbstractionOpenLoop___SubsystemReference_Block___SCIOutAbstractionOpenLoop___SubsystemReference_Block___


MODELNAME: F28P650DTargetMotorControl
PATH: examples/mcb/main/F28P650DTargetMotorControl.slx
BLOCKTYPE_FREQUENCY: 6;3;2;1;1;1;1;1;22;1;3;6;2;3;2;2;1;3;1;7;7;1;53;2;1;1;2;1;11;57;2;5;1;1;5;9;6;6;1;3;1;1;2;3
CHECKSUM: EB057C4661B9E06886DBEABB0D4FAD16
PRODUCT: C2000 Microcontroller Blockset;Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: MT
ANNOTATION:
System Outputs for inverter connected with F28P650D LaunchPad with DRV8305EVM Fast Serial Data Monitoring (32-bit) Application Application_Abstraction Drivers Driver_Abstraction  Scale Vabc output from application to the range required by PWM drivers  Motor Control using F28P650D Launchpad  Copyright 2023 The MathWorks, Inc. UX buttons

BLOCK:
6PWM_Mode;ADC Gain Setting;ADC_A;ADC_B;ADC_C;ADC_Gain_Setting;Action Port;Add;Application;Application Abstraction;Bias;C28x Hardware Interrupt;Calculate Phase Currents;Calculate Phase Voltages;ClosedLoop;Code Generation;Code generation;Codegen;Compare To Constant;Compute Offset;Constant;Counter Limited;CurrentCalib;CurrentPosCalib;Data;Data Type Conversion;Data_out;Data_width;Debug_signal;Delay;Demux;Digital Output;Display;Divide;Dummy;Duty_Cycles;Enable;End;Event Listener;Gain;Get_QEP_Counts;Ground;HW_INT;Hardware Init;Hardware Interrupt;Heartbeat LED;Iab;IabADC;Iab_A;Iab_ADC;Iab_Offset;Iabc;If;In;Index Vector;IndexOffset in PU;Initial offset calibration;Input HW Drivers;Input Scaling;InvEn;Inverter and Motor;InverterEn;Iteration;LED 1 Hz;Merge;Microcontroller;Mod;Mode;Mode Control;Motor;Mux;NOT;One_by_Two;Output PWM Drivers;Output Scaling;PWM;PWM In;PWMDutyCycles;PhaseCurr_fb;PosCalib;PosSense;Position_fb;Product;RT;Rate Transition;Reference;SCI Framing;SCI In Abstraction;SCI Out Abstraction;SCI Receive;SCI Transmit;SCI_Data;SCI_Rx;SCI_Rx_INT;SCI_Tx;SCI_Tx_Data;SPI Master Transfer;Saturation;Scale_to_PWM_Counter_PRD;Selector;Sim;Simulation;Start;Step;SubSystem;Subsystem;Sum;Switch;Switch to closed loop ;Terminator;ThetaMech;Unit Delay;VabcADC;Vabc_V;Vabc_ref;Variant Subsystem;Vdc;VdcADC;Vdc_ADC;Vdc_V;While Iterator;While Iterator Subsystem;Width;Wrap;btnAlgoParam;btnHardwareParam;btnHotModel;ePWM;eQEP;in;one time offset calibration;out;stop;~1.65V in ADC counts

BLOCKTYPE:
ADC Type 3-5;ActionPort;Bias;C28x Interrupt Block;C28x SCI Receive;C28x SCI Transmit;C28x eQEP;Compare To Constant;Constant;Counter Limited;CustomCallbackButton;DataTypeConversion;Delay;Demux;Display;EnablePort;EventListener;F28p65x GPIO Digital Output;Function-Call Generator;Gain;Ground;If;Inport;InportShadow;Logic;Math;Merge;MultiPortSwitch;Mux;Outport;Product;RateTransition;Saturate;Selector;Step;Sum;Switch;Terminator;TriggerPort;UnitDelay;WhileIterator;Width;codertarget.tic2000.blocks.SPIMasterTransfer;ePWM Type 1-4

EXTERNALFILE_REFERENCE:
Application___SubsystemReference_Block___ApplicationAbstraction___SubsystemReference_Block___MotorPMSMOpenLoop___SubsystemReference_Block___SCIInAbstraction___SubsystemReference_Block___SCIOutAbstraction___SubsystemReference_Block___


MODELNAME: PMSMFocSensorlessDCShuntCurrentSenseF28069m
PATH: examples/mcb/main/PMSMFocSensorlessDCShuntCurrentSenseF28069m.slx
CHECKSUM: 99B5647F4E17230BB4BDC14E006B695B
PRODUCT_BASECODE: MT
ANNOTATION:
Fast Serial Data Monitoring (32-bit)  Sector Duty Order 1 abc 2 acb 3 bac 4 bca 5 cab 6 cba  Crossing Type Condition Action 0 All three phase has distinct duty ratio No shift is required 1 Two phases have low duty ratio very close to each other Left shift the pulse with lowest duty ratio 2 Two phases have high duty ratio very close to each other Right shift the pulse with highest duty ratio HW Driver Blocks Enable PWM output Hardware Initialization Heartbeat LED 1HZ Heartbeat LED 1HZ Scaling Delays  Copyright 2023 The MathWorks, Inc. Note: This example requires a TI F28069m with DRV8312 connected to a PMSM Motor  Sensorless Field-Oriented Control of PMSM Using DC Shunt Current Sensing  Explore more: 1. Edit motor &amp; inverter parameters 2. Simulate this model 3. Review results in Data Inspector 4. Build, Deploy &amp; Start 5. Control motor via host model 6. Learn more about this example. Compute initial values before enabling the closed-loop control Input Output

BLOCK:
 Demux ; SFunction ; Terminator ;+;-;3phase converter;ADC Calib Enable;AND;Abs;Accumulate;Action Port;Add;Add Offset;Bias;Calculate position and speed;Clarke Transform;Closed Loop Control;Code Generation;Code generation;CodeGeneration;Codegeneration;Compare To Constant;Compute Control-loop Initial Values;Constant;Control_System;Converter (Three-Phase);Counter Limited;Current Control;Current Sensor;Current Sensor (Three-Phase);Current_Controllers;DC Voltage Source;DC component removal;DQ Limiter;DRV8312 Enable;Data;Data Store Memory;Data Store Read;Data Store Write;Data Type Conversion;Data Type Duplicate;Data_Conditioning;Data_Log;Data_Logging;Data_out;Data_width;DebugDemux;Default ADC Offset;Delay;Demux;Desired Speed;Detect Crossing Type;Detect Sector;Digital Output;Discrete PI Controller with anti-windup & reset;Duty;Duty Cycles;DutyCounts;DutyCountsIn;DutyCountsOut;DutyCycles;Duty_Cycles;EE_PWM;Electrical Reference;EnClosedLoop;EnComputeInitControl;Enable;End;Event Listener;Extract Phase Currents;Extraction;Feedbacks;Feedbacks_sim;Flux Observer;From;Gain;Get ADC Count;Get Current Sense Voltage;Goto;Ground;HW Interrupt;HWI_SCIRXINTA;HW_INT;Hardware Init;Heartbeat LED;I Park Transform;IA/IB Measurement;IIR Filter;I_fb;I_ref;Iab;Iab_meas_PU;Id;Id0_closedloop;Id0_in;Id0_out;Id_Controlloop_Init;Idc;Idc Sampling;IdcA;IdcB;IdcC;IdcIn;IdcOut;IdcSampled;Ideal Rotational Motion Sensor;Ideal Torque Source;Idq_Ref;Idq_ref_PU;If;In;Index Vector;Input;Input Scaling;InputSignals;Inverse Park Transform;Inverter;Inverter Signals;Inverter and Motor - Plant Model;Iq;IqRef_PU;Iq_ref;IsNegative;Iteration;Ki;Kp;Left shift the pulse with lowest duty ratio;Line Voltage Sensor (Three-Phase);Load;Load_Profile (Torque);Load_Trq;Logic;Logical Operator;Low-Pass Filter (Discrete or Continuous);MATLAB Function;Mechanical Rotational Reference;Memory;Merge;ModWave;Mux;NOT;N_fb;N_ref;No shift is required;Offset voltage;Open_Loop_Control;Out;Outport;Output Scaling;PI_Controller_Id;PI_Controller_Iq;PI_Controller_Speed;PMSM;PS-Simulink Converter;PWM Compensation;PWM Generation;PWM_Duty;PWM_Duty_Cycles;PWM_Enable;Park Transform;Pos_PU;Pos_PU_Out;Position Generator;Position/Speed;Product;Q17 per unit conversion;R ;RED_LED;RT;Ramp limiter;Rate Limiter;Rate Transition;Reference;Reversal;Right shift the pulse with highest duty ratio;SCI Receive;SCI Transmit;SCI_Data;SCI_Rx;SCI_Rx_INT;SCI_Tx;Saturate at ADC Vref;Saturate at inverter Vref;Saturation;Scale_to_PWM_Counter_PRD;Scaling;Scope;Secotor;Sector;Sensor Driver Blocks;Sensor Driver Blocks (codegen);Sensor Driver Blocks (sim);Sensor_Measurements;Serial Receive;Shift;ShiftCount;SigIN;SigOUT;Sim;Sim_fb;Simulation;Simulation_Terminator;Simulink-PS Converter;Sine-Cosine Lookup;Six-Pulse Gate Multiplexer;SlewRate;Solver Configuration;Space Vector Generator;SpdRef;SpdRef_PU;SpdRef_out;Speed Control;Speed Measurement;Speed_Meas_PU;Speed_Ref;Speed_Ref_Final (rpm);Speed_Ref_Init (rpm);Speed_Ref_PU;Speed_meas_PU;Start;State Machine Handler;State Machine OL - CL;SubSystem;Subsystem;Subtract;Sum;Switch;Switch Case;Switch Case Action Subsystem;T_load;Terminator;Th;Theta;Theta_e_prev;Tm;Unit Delay;V Park Transform;VI;VI_fb;V_ref;Vabc in PU;Vabc_In_PU;Variant Sink;Variant Source;Variant Subsystem;Vd_OpenLoop;Vd_computed;Vd_ref;Vq_OpenLoop;Vq_computed;Vq_ref;While Iterator;Width;Zero_Cancellation;diff;ePWM;elect2mech;g;measVI;rpm2PU;speed_PU;stop;theta_e;u;y;~;~1.65V in ADC counts

BLOCKTYPE:
ADC Type 3-5;Abs;ActionPort;ArithShift;Bias;C2806x GPIO Digital Output;C28x SCI Receive;C28x SCI Transmit;Clarke Transform;CombinatorialLogic;Compare To Constant;Compare To Zero;Constant;Converter (Three-Phase);Counter Limited;Current Sensor;Current Sensor (Three-Phase);DC Voltage Source;DQ Limiter;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;DataTypeDuplicate;Delay;Demux;Electrical Reference;EnablePort;EventListener;Flux Observer;From;Function-Call Generator;Gain;Goto;Ground;HardwareInterrupt;IIR Filter;Ideal Rotational Motion Sensor;Ideal Torque Source;If;Inport;InportShadow;Inverse Park Transform;Line Voltage Sensor (Three-Phase);Logic;Low-Pass Filter (Discrete or Continuous);Mechanical Rotational Reference;Memory;Merge;MultiPortSwitch;Mux;Outport;PID 1dof;PMIOPort;PMSM;PS-Simulink Converter;PWM Modulation;Park Transform;Position Generator;Product;RateLimiter;RateTransition;S-Function;Saturate;Scope;Simulink-PS Converter;Sine-Cosine Lookup;Six-Pulse Gate Multiplexer;Solver Configuration;Speed Measurement;Step;Sum;Switch;SwitchCase;Terminator;TriggerPort;UnitDelay;VariantSink;VariantSource;WhileIterator;Width;ePWM Type 1-4

BLOCKTYPE_FREQUENCY:
3;1;18;1;2;3;1;1;2;1;1;6;26;1;1;1;1;1;1;16;19;14;28;1;11;35;1;6;1;1;11;1;22;11;4;1;4;1;1;1;119;12;1;1;16;1;3;1;6;1;38;91;3;6;1;5;1;3;1;3;2;12;4;3;2;7;2;1;1;1;3;39;11;4;28;1;1;1;1;1;1;6

PRODUCT:
C2000 Microcontroller Blockset;Embedded Coder;MATLAB;Motor Control Blockset;Simscape;Simscape Electrical;Simulink;Stateflow


MODELNAME: STM32G4xxTargetMotorControl
PATH: examples/mcb/main/STM32G4xxTargetMotorControl.slx
BLOCKTYPE_FREQUENCY: 5;2;2;2;24;1;3;6;2;3;2;1;8;3;10;7;7;2;66;5;2;1;2;1;8;70;1;1;17;1;1;5;8;6;7;3;4;1;1;2;4;1;3;1;1
CHECKSUM: 33F171AE8CA195BC0B4A86E2EAF49C46
PRODUCT_BASECODE: MT
ANNOTATION:
Vfdbk = offset + 1.5278*Vshunt Vshunt = (Vfdbk - offset)/1.5278 Ishunt = Vshunt / Rshunt where Rsunt = 0.33 ohm System Outputs for inverter connected with LaunchXL-28379D Fast Serial Data Monitoring (32-bit) Heartbeat LED 1HZ Heartbeat LED 1HZ  1) Add Subsystem or Model blocks as valid variant choices. 2) You cannot connect blocks at this level. At simulation, connectivity is automatically determined, based on the active variant and port name matching.  Copyright 2023 The MathWorks, Inc.  Motor Control using STM32G4xx Nucleo Board UX buttons

BLOCK:
ADC1_INJ_INT;Action Port;Add;Analog to Digital Converter;Application Abstraction;Application SlowTask;Automatic offset calibration;Bias;Calculate Phase Currents;ClosedLoop;Code generation;Codegen;Compare To Constant;Compute Offset;ConfigAndCommand;Constant;Counter Limited;CurrentAndVoltage;CurrentCalib;CurrentPosCalib;Data;Data Type Conversion;Data_Log;Data_Logging;Data_out;Data_width;DebugSel;Delay;Demux;Digital Port Write;Divide;Dummy;Duty Cycles;Duty_Cycles;Enable;End;Event Listener;FastTask;FastTaskData;From;Gain;Get_PU ;Get_QEP_Counts;Goto;Ground;HW Interrupt;HW_INT;Hardware Interrupt;Heartbeat LED;Iab;IabADC;IabADCIn;Iab_ADC;Iab_Offset;Iabc;If;If Action Subsystem;In;Index Vector;IndexOffset;Initialize Function;Input HW Drivers;Input Scaling;InvEn;Inverter Board Selector;Inverter and Motor;InverterEn;Iteration;Merge;Mod;Mode;Mode Control;Motor;Mux;NOT;Offser via parameter;One_by_Two;Output PWM Drivers;Output Scaling;PWM;PWM In;PWM Output;PhaseCurr_fb;PosCalib;PositionAndSpeed;Position_fb;Process SCI Data;RT;Rate Transition;Reference;SCI In Abstraction;SCI Out Abstraction;SCI_Data;SCI_Rx_INT;SCI_Status;SCI_Tx;SCI_Tx_Data;Saturation;Scale_to_PWM_Counter_PRD;Selector;Serial Receive;SerialData Rx Task;SerialRxTask;Sim;Simulation;SlowTask;SlowTask Function;SlowTaskData;Start;Step;SubSystem;Subsystem;Sum;Switch;Switch to closed loop ;SysControlData;SystemControl;Terminator;Theta;ThetaMech;Trigger;UART/USART Read;UART/USART Write;Unit Delay;Vabc;VabcADC;Vabc_ADC;Vabc_ref;Variant Subsystem;Vdc;VdcADC;Vdc_ADC;Vector Concatenate;While Iterator;While Iterator Subsystem;Width;btnAlgoParam;btnHardwareParam;btnHotModel;eQEP;eQEPIn;qposcnt;qposilat;rad;stop;~1.65V in ADC counts

BLOCKTYPE:
ActionPort;Bias;Compare To Constant;Concatenate;Constant;Counter Limited;CustomCallbackButton;DataTypeConversion;Delay;Demux;EnablePort;EventListener;From;Function-Call Generator;Gain;Goto;Ground;If;Inport;InportShadow;Logic;Math;Merge;MultiPortSwitch;Mux;Outport;Product;RadioButtonGroup;RateTransition;Saturate;Selector;Step;Sum;Switch;Terminator;TriggerPort;UnitDelay;WhileIterator;Width;stm32cube.blocks.AnalogInput;stm32cube.blocks.DigitalPortWrite;stm32cube.blocks.HardwareInterrupt;stm32cube.blocks.PWMOutput;stm32cube.blocks.UARTRead;stm32cube.blocks.UARTWrite

PRODUCT:
Embedded Coder;Embedded Coder Support Package for STMicroelectronics STM32 Processors;MATLAB;Simulink;Simulink Coder Support Package for STMicroelectronics Nucleo Boards;Simulink Coder Support Package for STMicroelectronics Nucleo Boards

EXTERNALFILE_REFERENCE:
ApplicationAbstraction___SubsystemReference_Block___ApplicationHighPrio___SubsystemReference_Block___ApplicationLowPrio___SubsystemReference_Block___ApplicationSysControl___SubsystemReference_Block___Motor___SubsystemReference_Block___SCIInAbstraction___SubsystemReference_Block___SCIOutAbstraction___SubsystemReference_Block___


MODELNAME: SpeedgoatBaselineMotorControl
PATH: examples/mcb/main/SpeedgoatBaselineMotorControl.slx
BLOCKTYPE_FREQUENCY: 1;13;2;11;2;2;1;7;4;35;1;2;8;37;1;3;1;1;1;1;4;6;2;9;3;1;1;1;1;1;1
CHECKSUM: 683DF5A3854AFAD55C04C3AF871EB3E4
PRODUCT: MATLAB;MATLAB Support Package for LEGO MINDSTORMS EV3 Hardware;Simulink;Simulink Real-Time
PRODUCT_BASECODE: MT
ANNOTATION:
Application Application Abstraction Driver Abstraction Drivers  Motor Control using Speedgoat baseline motor control kit  Copyright 2023 The MathWorks, Inc. UX buttons

BLOCK:
 Demux ; SFunction ; Terminator ;Add;Application;Application Abstraction;Automatic offset calibration;Calculate Phase Currents;ClosedLoop;Codegen;Compare To Constant;Compute Offset;Condition Encoder;Constant;Current Offset Calibration;CurrentCalib;CurrentPosCalib;Data Type Conversion;Delay;Demux;Digital output;Divide;Duty cycles for current offset calibration;Duty cycles for pos offset calibration;DutyCycles;Duty_Cycles;Enable;Gain;Get Current Sense Voltage;Get_PU;Get_PU ;Get_QEP_Counts;Ground;IO397 Analog Input;Iab;Iab ADC;IabADCIn;Iab_ADC;Iab_Offset;Iabc;In;Input HW Drivers;Input Scaling;Inverter and Motor;InverterEn;InverterEnOut;Math Function;Microcontroller;Mod;Mode;Mode Control;Motor;Mux;NOT;Offset via parameter;One_by_Two;Out;Output HW Drivers;Output Scaling;Overload Options;PU;PWM generation (5);PWMDutyCycles;PhaseCurr_fb;Pos Offset Calibration;PosCalib;Position_fb;QAD;QEPCounts;Rate Transition;Reference;Saturation;Selector;Setup;Sim;Step;SubSystem;Subsystem;Sum;Switch;System Inputs;Terminator;ThetaMech;Unit Delay;Vabc;Vabc_ref;Vdc;Wrap to Positive;btnAlgoParam;btnHardwareParam;eQEPIn;rad;u;y

BLOCKTYPE:
Compare To Constant;Constant;CustomCallbackButton;DataTypeConversion;Delay;Demux;EnablePort;Gain;Ground;Inport;Logic;Math;Mux;Outport;Product;RateTransition;S-Function;Saturate;Selector;Speedgoat Encoder Counter;Step;Sum;Switch;Terminator;UnitDelay;ad_IO397;do_fpga_a2;pwm_fpga_5;qad_fpga_a5;setup_fpga_3;slrtOverloadOptions

EXTERNALFILE_REFERENCE:
ApplicationAbstractionOpenLoop___SubsystemReference_Block___ApplicationOpenLoop___SubsystemReference_Block___MotorPMSMOpenLoop___SubsystemReference_Block___SystemInputsSimOpenLoop___SubsystemReference_Block___


MODELNAME: Tc3xTargetMotorControl
PATH: examples/mcb/main/Tc3xTargetMotorControl.slx
CHECKSUM: 16CA01E4F12998882F201729D5291759
PRODUCT_BASECODE: MT
ANNOTATION:
1 is added since counter starts from 0 Update midpoint offset Step1- ADC calibration Current Measurements Subsystem  Motor Control with Infineon AURIX TC3x UX buttons  Copyright 2023 The MathWorks, Inc.

BLOCK:
 Demux ; Ground ; SFunction ; Terminator ;10 counts;ADC MidPoint Calibration;ADC/Encoder config;ADCINT;AND;Action Port;Add;Address;Application Abstraction;Application SlowTask;Bitwise Operator;C;Calculate Phase Currents;Cast;ClosedLoop;Code Generation;Code generation;Codegen;ConfigAndCommand;Constant;Counter Free-Running;CurrentAndVoltage;CurrentCalib;CurrentPosCalib;Data;Data Store Memory;Data Store Read;Data Store Write;Data Type Conversion;Delay;Demux;Detect Change;Divide;Duty Cycles;DutyCycles;Duty_Cycles;EnPWM;Enable;Encoder;Equal;Evadc;Event Listener;FastTask;FastTaskData;From;Function-Call Generator;Function-Call Split;Function-Call Subsystem;Gain;Get Currents;Get_PU ;Get_QEP_Counts;Goto;Ground;HW_INT;Hardware Interrupt;INHIBIT_FC_;Ia_ADC;Iab;IabADC;Iab_EnTicks;Iabc;Ib_ADC;If;If Action Subsystem;In;IndexOffset;Initialize Function;Input;Input Scaling;Inverter;Inverter Signals;Inverter and Motor;MATLAB Function;Memory;Microcontroller;Mod;Mode;Mode Control;Motor;Mux;NOT;One_by_Two;Out;Output Scaling;PWM;PWM_Duty_Cycles;PhaseCurr_fb;PosCalib;PositionAndSpeed;Position_fb;QSPIController;RT;Rate Transition;Reference;RxOut;SAFEOFF;Saturation;Scale_to_duty in percentages;Selector;Shift Arithmetic;Sim;Simulation;SlowTask;SlowTaskData;Step;SubSystem;Subsystem;Subtract;Sum;Switch;Switch to closed loop ;SysControl;SysControlData;System Inputs;SystemControl;TLE9180_Enable;Terminator;Theta;ThetaMech;Trigger;Tx;Unit Delay;Vabc;Vabc_ref;Variant Source;Vdc;btnAlgoParam;btnHardwareParam;cal_current;eQEP;function;rad;~1.65V in ADC counts

BLOCKTYPE:
ActionPort;ArithShift;Bitwise Operator;Constant;Counter Free-Running;CustomCallbackButton;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;Delay;Demux;Detect Change;DigitalPortWrite;EnablePort;Encoder;Evadc;EventListener;From;Function-Call Generator;FunctionCallSplit;Gain;Goto;Ground;HardwareInterrupt;If;Inport;InportShadow;Logic;Math;Memory;Mux;Outport;PWM;Product;QSPIController;RateTransition;RelationalOperator;S-Function;Saturate;Selector;Step;Sum;Switch;Terminator;TriggerPort;UnitDelay;VariantSource

BLOCKTYPE_FREQUENCY:
4;39;65;74;1;2;2;2;4;6;2;9;1;5;2;1;2;1;8;2;10;6;7;8;1;2;42;1;2;1;2;14;57;2;2;1;15;1;5;1;1;5;11;1;9;12;3;2

EXTERNALFILE_REFERENCE:
ApplicationAbstraction___SubsystemReference_Block___ApplicationHighPrio___SubsystemReference_Block___ApplicationLowPrio___SubsystemReference_Block___ApplicationSysControl___SubsystemReference_Block___Motor___SubsystemReference_Block___SystemInputs___SubsystemReference_Block___


MODELNAME: mcb_acim_foc_host_model
PATH: examples/mcb/main/mcb_acim_foc_host_model.slx
BLOCKTYPE_FREQUENCY: 2;3;9;9;2;2;1;1;1;1;1;17;1;1;3;16;2;1;2;2;1;1;2;1;1;2;1;2;1
CHECKSUM: B3BAE3DFD915FF1370401CD4FDF7F944
PRODUCT: Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: MT
ANNOTATION:
RX TX  AC Induction Motor Field Oriented Control Host  Copyright 2020-2023 The MathWorks, Inc.  Steps: 1. Set DC power supply to inverter.V_dc (volts) 2. Set the serial port to target.comport in the init script of the target model. 3. Simulate this model 4. Use Start / Stop Motor switch to control the motor. 5. Enter Reference Speed in RPM using the edit box 6. Observe the selected Debug signal in the Scope  Prerequisites: 1. Deploy the target model to the hardware mcb_acim_foc_qep_f28379d mcb_acim_foc_sensorless_f28379d 2.Verify the variables from the target model in the base workspace. 

BLOCK:
 Demux ; SFunction ; Terminator ;Bitwise Operator;Change_detect;Convert_to_SI_Units;Data;Data Type Conversion;Data_Conditioning_Tx;Data_Type_Fixed_Point;Data_Type_Float;Debug1 (SI units);Debug2 (SI units);Debug_signals;Demux;Display;Display_Value;Enable;Enable_FWC;Enable_PWM;Enabled Subsystem;FWC Enable;Field Weakening Control;From;Gain;Goto;Host Serial Receive;Host Serial Setup;Host Serial Transmit;Ia_Ib;Id_control;In;Input;Iq_control;Logical Operator;Motor;Motor Enable;Multiport Switch;Mux;Out;Output;Parse;Product;Radio Button;Rate Transition;Reference;Reference Speed;Reference Speed (RPM);Relational Operator;Scope;Scope (Per-Unit);Serial Communication;Shift Arithmetic;Speed_control;SubSystem;Sum;Target_F;Target_F28379D_Fixed_Point;Target_F28379D_Float;Torque and Power;Unit Delay;debug_

BLOCKTYPE:
ArithShift;Bitwise Operator;Constant;DataTypeConversion;Demux;Display;EditField;EnablePort;From;Gain;Goto;Inport;Logic;MultiPortSwitch;Mux;Outport;Product;RadioButtonGroup;RateTransition;RelationalOperator;S-Function;Scope;SliderSwitchBlock;Sum;Terminator;UnitDelay;system.SerialConfiguration;system.SerialReceive;system.SerialSend


MODELNAME: mcb_acim_foc_qep_f28379d
PATH: examples/mcb/main/mcb_acim_foc_qep_f28379d.slx
CHECKSUM: C7FCF815F8A6AAFF0EA1644E063B06A0
PRODUCT: C2000 Microcontroller Blockset;Embedded Coder;MATLAB;Motor Control Blockset;Simulink
PRODUCT_BASECODE: MT
ANNOTATION:
Current Measurements Position & Speed Measurements for BoostXL-DRV8305 connected with LaunchXL-28379D System Outputs Fast Serial Data Monitoring (32-bit) HW Driver Blocks Enable DRV8305 in CPU1 for BoostXL-DRV8305 connected to LaunchXL-28379D System Outputs  Enable ADC offset calibration only when motor is not loaded and not rotating due to external factors Heartbeat LED 1HZ Scaling Delays Global Variables Copyright 2020-2023 The MathWorks, Inc.  Explore more: 1. Edit motor &amp; inverter parameters 2. Simulate this model 3. Review results in Data Inspector 4. Generate code from hardware tab with &quot;Build, Deploy &amp; Start&quot; 5. Control motor via host model 6. Learn more about this example. Note: This example requires a TI F28379D LaunchPad with a BOOSTXL-DRV8305 booster pack connected to an Induction Motor with QEP Sensor  Note: 1) To achieve higher speeds, increase the &quot;Max current&quot; value in &quot;Speed Control \ ACIM Control Reference&quot; block (e.g. set to 2xIrated). 2) It is recommended to monitor motors temperature for operation above base speed, while working with hardware.   Field-Oriented Control of AC Induction Motor

BLOCK:
6PWM_Mode;ACIM Control Reference;ACIM Feed Forward Control;ACIM Slip Speed Estimator;ACIM Torque Estimator;ADC Calib Enable;ADC Interrupt;ADCINT;ADC_B_IN;ADC_C_IN;ADC_Gain_Setting;Action Port;Add;Add Offset;Average-Value Inverter;Bias;Bitwise Operator;Bus Selector;Bypass_FWC;Byte Pack;Calculate ADC Offset ;Calculate Phase Currents;Calculate position and speed;Clarke Transform;Code Generation;Code generation;Codegeneration;Constant;Control_System;Counter Limited;Current Control;Current_Controllers;DQ Limiter;DRV Enable;DRV830x Enable;Data;Data Store Memory;Data Store Read;Data Store Write;Data Type Conversion;Data Type Duplicate;Data_Conditioning_Rx;Data_Conditioning_Tx;Data_Log;Data_Logging;Data_Type;Data_Type_Fixed_Point;Data_Type_Float;Data_out;Data_width;Debug;Debug_signal_;Debug_signals;Default ADC Offset;Delay;Demux;Digital Output;Discrete PI Controller with anti-windup & reset;Display;Divide;Dummy;DutyCycles;Duty_Cycles;Duty_abc;Enable;Enable_FWC;Enable_PWM;Enable_fwc;End;Event Listener;FW_Controller;Feedbacks;Feedbacks_sim;For Iterator;For Iterator Subsystem;From;Gain;Get ADC Count;Get ADC Voltage;Get Current sense voltage;Get Currents;Get_PU;Get_PU ;Get_QEP_Counts;Goto;Ground;HWI_ADCB1_INT;HWI_SCIA_RX_INT;HW_INT;HW_Inputs;HW_Interrupt;Hardware Init;Heartbeat LED;IIR Filter;I_fb;I_ref;Ia_ADC;Ia_Ib;Iab_meas_PU;Iabc;Ib_ADC;Id_control;Id_fb;Id_fwc;Idq_ref;If;If Action Subsystem;In;Index Vector;IndexOffset;IndexOffset in PU;Index_Latch;Induction Motor;Initial_Condition;Input Scaling;Inverse Park Transform;Inverter;Inverter Signals;Inverter and Motor;Inverting / Non-inverting Current measurement amplifieer;Iq_control;Iq_fb;Iteration;Ki;Kp;Load;Load_Profile (Torque);Load_Trq;Logical Operator;Mechanical to Electrical Position;Memory;Merge;Mod;Motor and Inverter;Multiport Switch;Mux;NOT;Offset voltage;One_by_Two;Optional_Read_SPI;Out;Output Scaling;PI_Controller_Id;PI_Controller_Iq;PI_Controller_Speed;PU;PU_Conversion;PWM_Duty_Cycles;PWM_Enable;Park Transform;Parse;PhaseCurr;Pos/Speed;Position Generator;Position_Computation;Q17 per unit conversion;QEP_Index_Latch;QEP_Position_Count;Quadrature Decoder;RED_LED;RT;Rate Transition;Read_ADC_Gain;Read_PWM_mode;Read_SPI;Reference;Reversal;SCI Receive;SCI Transmit;SCI_Data;SCI_Rx;SCI_Rx_INT;SCI_Tx;SPI Master Transfer;Saturate at ADC Vref;Saturate at inverter Vref;Saturation;Scale_to_PWM_Counter_PRD;Selector;Sensor Driver Blocks (codegen);Sensor Driver Blocks (sim);Sensor_Measurements;Serial Receive;Shift Arithmetic;Sim;Sim_fb;Simulation;Simulation_Terminator;Sine-Cosine Lookup;Space Vector Generator;Speed Control;Speed Measurement;Speed_PU;Speed_Ref (rpm);Speed_fb;Speed_ref;Start;SubSystem;Sum;Switch;T_load;T_ref;Terminator;Theta;Torque_and_Power;Unit Delay;Vabc;Vabc_In_PU;Vabc_ref;Variant Sink;Variant Source;Variant Subsystem;Vd_ref;Vmax_fb;Vmax_ref;Vq_ref;While Iterator;While Iterator Subsystem;Width;Wm_fb;Wrap;Zero_Cancellation;ePWM;eQEP;in;out;pos;rad;rpm2PU;speed_control;stop;theta_e;unParse;~1.65V in ADC counts

BLOCKTYPE:
ACIM Control Reference;ACIM Feed Forward Control;ACIM Slip Speed Estimator;ACIM Torque Estimator;ADC Type 3-5;ActionPort;ArithShift;Average Value Inverter;Bias;Bitwise Operator;BusSelector;Byte pack;C28x SCI Receive;C28x SCI Transmit;C28x eQEP;Clarke Transform;Constant;Counter Limited;DQ Limiter;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;DataTypeDuplicate;Delay;Demux;Display;EnablePort;EventListener;F2837x GPIO Digital Output;ForIterator;From;Function-Call Generator;Gain;Goto;Ground;HardwareInterrupt;IIR Filter;If;Induction Motor;Inport;InportShadow;Inverse Park Transform;Logic;Math;Mechanical to Electrical Position;Memory;Merge;MultiPortSwitch;Mux;Outport;PID 1dof;PWM Modulation;Park Transform;Position Generator;Product;Quadrature Decoder;RateTransition;Saturate;Scope;Selector;Sine-Cosine Lookup;Speed Measurement;Step;Sum;Switch;Terminator;TriggerPort;UnitDelay;VariantSink;VariantSource;WhileIterator;Width;codertarget.tic2000.blocks.SPIMasterTransfer;ePWM Type 1-4

BLOCKTYPE_FREQUENCY:
1;1;1;1;4;8;5;1;2;6;1;1;2;1;1;1;47;1;1;6;12;10;26;1;2;16;2;2;1;3;1;5;2;14;5;4;2;4;4;1;88;3;1;6;2;1;2;2;2;31;76;4;1;1;1;2;1;12;3;1;2;1;1;8;16;5;9;2;2;1;1;1;1;4;3


MODELNAME: mcb_acim_foc_sensorless_f28379d
PATH: examples/mcb/main/mcb_acim_foc_sensorless_f28379d.slx
CHECKSUM: 92B53CA35F5FD173FAAAF925FE952358
PRODUCT: C2000 Microcontroller Blockset;Embedded Coder;MATLAB;Motor Control Blockset;Simulink
PRODUCT_BASECODE: MT
ANNOTATION:
Current Measurements Position & Speed Measurements for BoostXL-DRV8305 connected with LaunchXL-28379D System Outputs Fast Serial Data Monitoring (32-bit) HW Driver Blocks Enable DRV8305 in CPU1 for BoostXL-DRV8305 connected to LaunchXL-28379D System Outputs  Enable ADC offset calibration only when motor is not loaded and not rotating due to external factors Heartbeat LED 1HZ Scaling Delays Global Variables Copyright 2020-2023 The MathWorks, Inc.  Explore more: 1. Edit motor &amp; inverter parameters 2. Simulate this model 3. Review results in Data Inspector 4. Generate code from hardware tab with &quot;Build, Deploy &amp; Start&quot; 5. Control motor via host model 6. Start the motor in open loop and transition to closed loop. The model works in open loop for speed ref below 0.2pu. 7. Learn more about this example. Note: This example requires a TI F28379D LaunchPad with a BOOSTXL-DRV8305 booster pack connected to an Induction Motor  Note: 1) To achieve higher speeds, increase the &quot;Max current&quot; value in &quot;Speed Control \ ACIM Control Reference&quot; block (e.g. set to 2xIrated). 2) It is recommended to monitor motors temperature for operation above base speed, while working with hardware.   Field-Oriented Control of AC Induction Motor

BLOCK:
 Code Generation;6PWM_Mode;ACIM Control Reference;ACIM Slip Speed Estimator;ACIM Torque Estimator;ADC Calib Enable;ADC Interrupt;ADCINT;ADC_B_IN;ADC_C_IN;ADC_Gain_Setting;Abs;Action Port;Add;Add Offset;Average-Value Inverter;Bias;Bitwise Operator;Bypass_FWC;Byte Pack;Calculate ADC Offset ;Calculate Phase Currents;Calculate position and speed;Clarke Transform;Code Generation;Code generation;Codegeneration;Constant;Control_System;Counter Limited;Current Control;Current_Controllers;DQ Limiter;DRV Enable;DRV830x Enable;Data;Data Store Memory;Data Store Read;Data Store Write;Data Type Conversion;Data Type Duplicate;Data_Conditioning_Rx;Data_Conditioning_Tx;Data_Log;Data_Logging;Data_Type;Data_Type_Fixed_Point;Data_Type_Float;Data_out;Data_width;Debug;Debug_signal_;Debug_signals;Default ADC Offset;Delay;Demux;Digital Output;Discrete PI Controller with anti-windup & reset;Display;Divide;Dummy;DutyCycles;Duty_Cycles;Duty_abc;Enable;Enable_FWC;Enable_PWM;Enable_fwc;End;Event Listener;FW_Controller;Feedbacks;Feedbacks_sim;Flux Observer;For Iterator;For Iterator Subsystem;From;Gain;Get ADC Count;Get ADC Voltage;Get Current sense voltage;Get Currents;Goto;Ground;HWI_ADCB1_INT;HWI_SCIA_RX_INT;HW_INT;HW_Inputs;HW_Interrupt;Hardware Init;Heartbeat LED;IIR Filter;I_fb;I_ref;Ia_ADC;Ia_Ib;Iab_meas_PU;Iabc;Ib_ADC;Id_control;Id_fb;Id_fwc;Idq_ref;If;If Action Subsystem;In;Index Vector;Induction Motor;Input Scaling;InputSignals;Inverse Park Transform;Inverter;Inverter Signals;Inverter and Motor;Inverting / Non-inverting Current measurement amplifieer;Iq_control;Iq_fb;Iteration;Ki;Kp;Load;Load_Profile (Torque);Load_Trq;Logical Operator;Memory;Merge;Motor and Inverter;Multiport Switch;Mux;NOT;Offset voltage;One_by_Two;Open_Loop_Control;Optional_Read_SPI;Out;Output Scaling;PI_Controller_Id;PI_Controller_Iq;PI_Controller_Speed;PU_Conversion;PWM_Duty_Cycles;PWM_Enable;Park Transform;Parse;PhaseCurr;Pos_PU;Pos_meas_PU;Position Generator;Position/Speed;Q17 per unit conversion;RED_LED;RT;Rate Transition;Read_ADC_Gain;Read_PWM_mode;Read_SPI;Reference;SCI Receive;SCI Transmit;SCI_Data;SCI_Rx;SCI_Rx_INT;SCI_Tx;SPI Master Transfer;Saturate at ADC Vref;Saturate at inverter Vref;Saturation;Scale_to_PWM_Counter_PRD;Selector;Sensor Driver Blocks (codegen);Sensor Driver Blocks (sim);Sensor_Measurements;Serial Receive;Shift Arithmetic;Sim;Sim_fb;Simulation;Simulation_Terminator;Sine-Cosine Lookup;Space Vector Generator;Speed Control;Speed Measurement;Speed_PU;Speed_Ref_CW (rpm);Speed_fb;Speed_ref;Start;SubSystem;Sum;Switch;T_load;T_ref;Terminator;Theta;Torque_and_Power;Unit Delay;VI_fb;V_ref;Vabc;Vabc_In_PU;Vabc_ref;Variant Sink;Variant Source;Variant Subsystem;Vd_OpenLoop;Vd_ref;Vmax_fb;Vmax_ref;Vq_OpenLoop;Vq_ref;While Iterator;While Iterator Subsystem;Width;Wm_fb;Zero_Cancellation;ePWM;elect2mech;rpm2PU;speed_control;stop;unParse;~1.65V in ADC counts

BLOCKTYPE:
ACIM Control Reference;ACIM Slip Speed Estimator;ACIM Torque Estimator;ADC Type 3-5;Abs;ActionPort;ArithShift;Average Value Inverter;Bias;Bitwise Operator;Byte pack;C28x SCI Receive;C28x SCI Transmit;Clarke Transform;Constant;Counter Limited;DQ Limiter;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;DataTypeDuplicate;Delay;Demux;Display;EnablePort;EventListener;F2837x GPIO Digital Output;Flux Observer;ForIterator;From;Function-Call Generator;Gain;Goto;Ground;HardwareInterrupt;IIR Filter;If;Induction Motor;Inport;InportShadow;Inverse Park Transform;Logic;Memory;Merge;MultiPortSwitch;Mux;Outport;PID 1dof;PWM Modulation;Park Transform;Position Generator;Product;RateTransition;Saturate;Scope;Selector;Sine-Cosine Lookup;Speed Measurement;Step;Sum;Switch;Terminator;TriggerPort;UnitDelay;VariantSink;VariantSource;WhileIterator;Width;codertarget.tic2000.blocks.SPIMasterTransfer;ePWM Type 1-4

BLOCKTYPE_FREQUENCY:
1;1;1;4;1;8;5;1;2;6;1;2;1;1;48;1;1;8;18;12;24;1;2;16;2;2;1;3;1;1;8;2;14;8;4;2;5;4;1;83;2;1;8;2;2;2;31;75;4;1;1;1;2;10;3;1;2;1;1;3;13;9;9;2;4;1;1;1;1;4;3


MODELNAME: mcb_acim_param_est_f28379D_DRV8305
PATH: examples/mcb/main/mcb_acim_param_est_f28379D_DRV8305.slx
CHECKSUM: A9140ABD9BA37757FBBE0038EF060B8E
PRODUCT: C2000 Microcontroller Blockset;Embedded Coder;MATLAB;Motor Control Blockset;Simulink
PRODUCT_BASECODE: MT
ANNOTATION:
Open loop control for no load/ magnetizing current Single phase test : Rr, Lm, Lls and Llr measurment TestNum 0: ADC Calibration TestNum 1: Openloop TestNum 2-4: two freq/high freq injecion VqIq used further in computations EnOpenLoop : 0 : Consider user input value of ID0 1: Consider ID0 from openloop test  0 - Vq 1 - Vd 2 - VdcMeas 3 - VqMeas 4 - VdMeas 5 - Speed 6 - Theta 7 - Iq 8 - Id 9 - Ia 10 - Ib  1st 2nd byte - 00 00 3ed byte - DetPar1 4th Byte(7 Bits) - DetPar2 last bit LSB - testEnable Parameter Estimation for ACIM Motors Copyright 2021-2023 The MathWorks, Inc. Sensor Data Store Inputs from Host Estimated Parameters  Steps: 1. This example requires LaunchXL-F28379D with BoostXL-DRV8305 connected to an Induction Motor with QEP sensor. 2. Open mcb_acim_param_est_host_read model, update input details, and press Ctrl+D to update the workspace. 3. Build, Deploy &amp; Start this model in target hardware.4. Run mcb_acim_param_est_host_read model to estimate motor parameters. 

BLOCK:
; ; Calculate Position and Speed; Demux ; SFunction ; Terminator ;0_out;3-Phase Sine Voltage Generator;6PWM_Mode;ADC Interru pt;ADC_A_IN;ADC_B_IN;ADC_Calibration;ADC_Gain_Setting;ActSpeed;Action Port;Add;Algorithm Variables;AllSig;Alogrithm;Alpha;AlternateData;Alternate_0_;Avoid_divide_by_zero;B;Beta;Bias;Bitwise AND;Byte Pack;ChangeDet;ChangeDetect;Clarke Transform;ClarkePark;ClarkePark ;ClosedLoop;Compare To Constant;Constant;Control Algorithm;Cosine;Counter Limited;CurrentScaling;D;DQ-AlphaBeta;DRV8305 Reset;DRV8305 Set;Data;Data Store Memory;Data Store Read;Data Store Write;Data Type Conversion;Data_out;Data_width;Demux;Derating Function;DetectParam;Digital Output;Discrete PI Controller with anti-windup & reset;Display;Divide;En;Enable;EnableMosfets;End;Equal;ErrorCase;EstPar;EstPara;EstParaIdx;Event Listener;Freq;Freq_rated;From;GPIOToggle;Gain;Goto;HW Interrupt;HWI_ADCB1_INT;HWI_SCIA_RX_INT;HW_INT;IA/IB;IIR Filter;I_rated;Ia;Ia/Ib;IaIbVdc;IaIb_adc_counts;Ia_Ib_ADC_count_VdId;Ia_Ib_ADC_count_VdId ;Ia_cal_val;Ib;Ib_cal_val;Id;Id_ref;Id_ref_closedloop_control;Idx;If;In;Index Vector;Initialize Function;Inputs;Inverse Park Transform;Iq;IqId_desired;Iq_ref;Isd;Isq;Iteration;J;Ki_iOut;Kp_iOut;LED_Toggle;Ld;Lls_Llr;Lm;Ls;Ls calculation;MATLAB Function;MaxSpeed;Mechanical to Electrical Position;Merge;Multiport Switch;Mux;MuxAllSignals;NOT;Offset;Omega_slip;One;OpenLoop;OpenLoop_CloseLoop;Openloop;Openloop_SVM;Out;PWM;PWM A/B/C;PWM scaling;PWM_Counter_Period;ParameterEstimationTests;Park Transform;Pole_Voltage to Phase_Voltage;Pos/Speed;Position Generator;Position_Speed_Sensing;Product;Q;QEP_Index_Latch;QEP_Position_Count;Quadrature Decoder;R_board;Ramp;Ramp Generator;Ramp_Time;Ramp_Time (sec);RefSignal;RefSignal ;RefVdVqV;Ref_pos;Ref_pos ;Ref_posOL;Reference;Reference signal conditioning;Rr;Rr_L_Measurment;Rs;RsMeasTestTime;Rs_Measurement;Running;Rx_single;SCI Receive;SCI Transmit;SCI_Rx_INT;SPI Master Transfer;SVM_Alpha_Beta;Sample_Time;SaveToMemory;SelSig;SelectSignal;Selector;Serial Send;SerialReceive;Shift Arithmetic;Sig;Signal Selection;SignalPU;Signal_for_algo;SignalsPU;Sine;Sine-Cosine Lookup;SinePWM;Slip Speed Estimator;Space Vector Generator;Speed;Speed Measurement;Start;SubSystem;Subsystem;Sum;Switch;Switch Case;Switch Case Action Subsystem;Ta;Ta/Tb/Tc;Tb;Tc;Terminator;TestNum;Testnum;Theta;Theta_e;Torque_control_with_speed_limit;Trigger;Triggered Subsystem;Ts;Unit Delay;V;V0_ref;VAlpha;V_rated;V_ref;Va;Va Measurement;VaIaVbIb;Vabc;Vabc_Vdc;Vao;Vb;Vb Measurement;Vbeta;Vbo;Vc;Vc Measurement;Vco;Vd;VdId;VdVqV;VdVqv;Vd_Meas;Vdc;Vdc Measurement;Vdq;Voltage Scaling;Vq;VqIq;Vq_Meas;Vq_ref;While Iterator;While Iterator Subsystem;Width;algoVar;bytepack;cos;count_to_PU;counter;curTime;currentPU_RWV;d;ePWM;eQEP;estParIdx;estParIdxOut;estimatedParameter;estimatedParameterOut;injFreqOut;inverter_V_max;pos;q;ref;refSignalOut;sigma;sin;speed;speedFB;speed_rated;testEnable;testEnableFromHost;testEnableFromTrgt;testEnableOut;testEnable_sigSel1_;testNumOut;u;y;zero_out

BLOCKTYPE:
3-Phase Sine Voltage Generator;ADC Type 3-5;ActionPort;ArithShift;Bias;Bitwise Operator;Byte pack;C28x SCI Receive;C28x SCI Transmit;C28x eQEP;Clarke Transform;Compare To Constant;Constant;Counter Limited;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;Demux;Derating Function;DiscreteIntegrator;Display;EnablePort;EventListener;F2837x GPIO Digital Output;From;Gain;Goto;HardwareInterrupt;IIR Filter;If;Inport;InportShadow;Inverse Park Transform;Logic;Mechanical to Electrical Position;Merge;MultiPortSwitch;Mux;Outport;PID 1dof;PWM Modulation;Park Transform;Position Generator;Product;Quadrature Decoder;RelationalOperator;S-Function;Selector;Sine-Cosine Lookup;Speed Measurement;Sum;Switch;SwitchCase;Terminator;TriggerPort;UnitDelay;WhileIterator;Width;codertarget.tic2000.blocks.SPIMasterTransfer;ePWM Type 1-4

BLOCKTYPE_FREQUENCY:
1;6;29;2;2;3;1;1;1;1;2;7;34;1;29;32;29;20;19;1;1;2;5;1;2;47;15;23;2;2;2;166;8;1;6;1;5;5;23;106;2;1;2;3;13;1;1;3;2;2;1;13;11;2;8;4;8;1;1;2;3


MODELNAME: mcb_acim_param_est_f28379d
PATH: examples/mcb/main/mcb_acim_param_est_f28379d.slx
CHECKSUM: F28FD61E1BCDC345FB41954C9B860D70
PRODUCT: C2000 Microcontroller Blockset;Embedded Coder;MATLAB;Motor Control Blockset;Simulink;Stateflow
PRODUCT_BASECODE: MT
ANNOTATION:
Enable DRV8305 in CPU1 for BoostXL-DRV8305 connected to LaunchXL-28379D System Outputs  Enable ADC offset calibration only when motor is not loaded and not rotating due to external factors Heartbeat LED 1HZ Scaling Delays System Outputs for inverter connected with LaunchXL-28379D Fast Serial Data Monitoring (32-bit)  Id0 Rs Rr Lm Lls Llr B  Copyright 2022-2023 The MathWorks, Inc. Note: This example requires a TI F28379D LaunchPad with a BOOSTXL-DRV8305 booster pack connected to an Induction Motor with QEP Sensor  Parameter Estimation of AC Induction Motor  Steps 1. Edit motor and inverter parameters. 2. Simulate the model. Use User Control panel to control parameter estimation tests. 3. When in Manual mode, run test in sequence and do not skip any tests. 4. Build, Deploy &amp; Start 4. Use host model to control the hardware 5. Learn more about this example. User Controls

BLOCK:
; Demux ; SFunction ; Terminator ;6PWM_Mode;ADC Calib Enable;ADC Interrupt;ADCINT;ADC_B_IN;ADC_C_IN;ADC_Gain_Setting;AND;Abs;Action Port;ActiveTest;Add;Add Offset;Average-Value Inverter;B;Bias;Bitwise Operator;Bus Creator;Bus Selector;Byte Pack;Calculate ADC Offset ;Calculate Phase Currents;Calculate position and speed;Chart;Closed Loop Operation;Code Generation;Code generation;Codegen;Codegeneration;Compare To Constant;Config;Constant;Counter Limited;Current Voltage Monitoring;Current and Voltage Monitoring;CurrentLimit_PU;DRV Enable;DRV830x Enable;Data;Data Store Memory;Data Store Read;Data Store Write;Data Type Conversion;Data Type Duplicate;Data_Conditioning_Tx;Data_Log;Data_Logging;Data_Type_Fixed_Point;Data_Type_Float;Data_out;Data_width;DebugData;DebugDataSelect;DebugSelect;DebugSignals;Debug_signal;Debug_signals;Default ADC Offset;Delay;Demux;Desired Speed;Digital Output;Display;Divide;Dummy;Duty_Cycles;Duty_abc;EnClosedLoop;EnPrev;Enable;EnableFromHost;EnableIn;End;Estimated Parameters;Event Listener;Feedbacks;For Iterator;For Iterator Subsystem;From;Gain;Get ADC Count;Get Current sense voltage;Get_PU;Get_PU ;Get_QEP_Counts;Goto;GreaterThan;Ground;HWI_ADCB1_INT;HWI_SCIA_RX_INT;HWInpust;HWInputs;HWOutputs;HW_INT;HW_Inputs;Hardware Init;Hardware Interrupt;Heartbeat LED;IIR Filter;Iab;IabADC;Iab_ADC;Iabc;IcNotUsed;Id;Id0 Estimator;Id0Status;Id0Test;If;If Action Subsystem;In;Index Vector;IndexOffset;IndexOffset in PU;Index_Latch;Induction Motor;Init;Input Scaling;Inverter;Inverter and Motor;InverterEn;InverterSig;Iteration;J;Less Than;Llr;Lls;Lm;Load;Load_Profile (Torque);Load_Trq;Log;MechLog;MechParam;MechStatus;Mechanical Parameter Estimator;Mechanical to Electrical Position;Memory;Merge;Mod;Motor and Inverter;MotorParam;MotorParams;Multiport Switch;Mux;NOR;NOT;OR;Offset voltage;One_by_Two;Out;Output HW Drivers;Output Scaling;OverCurrent;PU;PWM;PWM Drivers;PWMDutyCycle;PWM_Duty_Cycles;PWM_Enable;Param Est;Parameter Estimation;Parameter Estimation Configurator;ParameterEstimation;PhaseCurr;Pos/Speed;Pos_PU;Product;QEP_Index_Latch;QEP_Position_Count;Quadrature Decoder;RED_LED;RT;Rate Transition;Reference;Rr;Rr L Estimator;RrLLog;RrLStatus;RrLTest;Rs;Rs Estimator;RsLog;RsStatus;RsTest;SCI Drivers;SCI Receive;SCI Transmit;SCI_Data;SCI_Rx_INT;SCI_Tx;SPI Master Transfer;Saturate at ADC Vref;Saturate at inverter Vref;Scale_to_PWM_Counter_PRD;Selector;Sensor Driver Blocks (codegen);Sensor Driver Blocks (sim);Sensor_Measurements;Serial Receive;Shift Arithmetic;Sim;SimFb;Sim_fb;Simulation;Simulation_Terminator;Speed Measurement;Speed_RPM;Start;StartEst;SubSystem;Subsystem;Sum;Switch;Switch Case;Switch Case Action Subsystem;Terminator;Test Control;Test Enable;Test Method;Test Select;TestMethod;TestNum;TestSelect;Theta;Ts;UnderVoltage;Unit Delay;Vabc;Vabc_In_PU;Vabc_ref;Variant Sink;Variant Source;Variant Subsystem;Vdc;Vdc Measurement;VdcADC;Vdc_ADC;VoltLimit_PU;While Iterator;While Iterator Subsystem;Width;Wrap;codegen;ePWM;eQEP;in;out;pos;rad;sim;stop;unParse;~1.65V in ADC counts

BLOCKTYPE:
ACIM Parameter Estimation Configurator;ADC Type 3-5;Abs;ActionPort;ArithShift;Average Value Inverter;Bias;Bitwise Operator;BusCreator;BusSelector;Byte pack;C28x SCI Receive;C28x SCI Transmit;C28x eQEP;ComboBox;Compare To Constant;Constant;Counter Limited;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;DataTypeDuplicate;Delay;Demux;Display;EnablePort;EventListener;F2837x GPIO Digital Output;ForIterator;From;Function-Call Generator;Gain;Goto;Ground;HardwareInterrupt;IIR Filter;Id0 Estimator;If;Induction Motor;Inport;InportShadow;Logic;Math;Mechanical Parameter Estimator;Mechanical to Electrical Position;Memory;Merge;MultiPortSwitch;Mux;Outport;Product;Quadrature Decoder;RateTransition;RelationalOperator;Rr L Estimator;Rs Estimator;S-Function;Saturate;Selector;SliderSwitchBlock;Speed Measurement;Step;Sum;Switch;SwitchCase;Terminator;TriggerPort;UnitDelay;VariantSink;VariantSource;WhileIterator;Width;codertarget.tic2000.blocks.SPIMasterTransfer;ePWM Type 1-4

BLOCKTYPE_FREQUENCY:
1;5;1;37;3;1;2;4;3;23;1;1;1;1;1;5;39;1;2;4;6;22;1;2;14;3;9;1;3;1;52;2;11;21;5;2;2;1;4;1;154;16;9;2;1;1;2;3;2;26;146;5;1;16;3;1;1;1;2;2;2;1;1;9;5;1;10;2;9;1;1;1;1;2;3


MODELNAME: mcb_acim_param_est_host_f28379d
PATH: examples/mcb/main/mcb_acim_param_est_host_f28379d.slx
BLOCKTYPE_FREQUENCY: 1;6;3;4;1;2;6;1;2;1;3;9;1;11;2;1;1;1;1;26;2;1;1;2;6;2;1;1;1;10;3;1;1;1
CHECKSUM: 3832758F8BDE3C37AF0D194A51D6C954
PRODUCT: Embedded Coder;MATLAB;Motor Control Blockset;Simulink
PRODUCT_BASECODE: MT
ANNOTATION:
Rx TX  Ohm User Controls  ACIM Parameter Estimation Host  Copyright 2022-2023 The MathWorks, Inc.  Prerequisites: 1. Deploy the target model to the hardware mcb_acim_param_est_f28379d 2. You should see and verify the variables from the target model in the base workspace.   Steps: 1. Set the serial port to target.comport in the init script of the target model. 2. Simulate this model to communicate with hardware. 3. Use Parameter Estimation switch to control the parameter estimation tests. 4. Run parameter estimation tests sequentially by selecting Auto for Test Method switch. 5. Select Manual to run the tests individually by selecting in Test Selection radio button. 6. When in Manual mode, keep the Enable switch off, select the test in Test selection then turn on the Enable switch. Turn off the Enable before moving to the next test. 7. Do not skip any tests in Manual mode.   Ohm  H  Kg m^2  N m s  Rs  Rr  Lm  Lls  Motor Inertia  Friction Constant  A  Id0  Llr  H  H

BLOCK:
 Demux ; SFunction ; Terminator ;Action Port;Active Test;ActiveTest;B;Bitwise Operator;Bus Selector;Change_detect;Config;Constant;Count;Data;Data Type Conversion;Debug;Debug Select;DebugSelect;Enable;Enable_PWM;Enabled Subsystem;Host Serial Receive;Host Serial Setup;Host Serial Transmit;IaOffset;IbOffset;Id;In;Index Vector;Input;J;Llr;Lls;Lm;Logical Operator;MATLAB Function;Merge;Mux;Out;Over Current;OverCurrent;Parameter Estiimation;Parameter Estimation Configurator;Parse;Reference;Relational Operator;Rr;Rs;Scope;Serial Communication;Shift Arithmetic;String Constant;SubSystem;Subsystem;Sum;Switch;Switch Case;Switch Case Action Subsystem;Test Enable;Test Method;Test Select;TestMethod;TestSelect;To Workspace;Tx;Under Voltage;UnderVoltage;Unit Delay;count

BLOCKTYPE:
ACIM Parameter Estimation Configurator;ActionPort;ArithShift;Bitwise Operator;BusSelector;ComboBox;Constant;Counter ;DataTypeConversion;Demux;Display;DisplayBlock;EnablePort;Inport;LampBlock;Logic;Merge;MultiPortSwitch;Mux;Outport;RelationalOperator;S-Function;Scope;SliderSwitchBlock;StringConstant;Sum;Switch;SwitchCase;Terminator;ToWorkspace;UnitDelay;system.SerialConfiguration;system.SerialReceive;system.SerialSend


MODELNAME: mcb_acim_param_est_host_read
PATH: examples/mcb/main/mcb_acim_param_est_host_read.slx
BLOCKTYPE_FREQUENCY: 10;2;4;1;1;29;1;2;16;6;1;8;7;3;1;1;6;1;56;12;6;2;1;29;3;5;6;3;1;1;1;1;13;12;9;1;2;2
CHECKSUM: 192A1233D958E4185ADCE318B2DB002F
PRODUCT: Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: MT
ANNOTATION:
 Note: - This subsystem reads parameters for paramer estimation algorithm and assigns to variables in base workspace using an initialization script. - The script can be found at: Example -&gt; Model Properties -&gt; Callbacks -&gt; InitFcn - The variables are listed in init callback  Serial Send  0 - Vq 1 - Vd 2 - VdcMeas 3 - VqMeas 4 - VdMeas 5 - Speed 6 - Theta 7 - Iq 8 - Id 9 - Ia 10 - Ib  1st 2nd byte - 00 00 3rd byte - DetPar1 4th Byte(7 Bits) - DetPar2 last bit LSB - testEnable  Note 1. It is recommended to set the power supply DC bus voltage as: Input DC Voltage (V) = sqrt(2) * Nominal Voltage of motor (Line-Line RMS V). 2. For some phase sequences, the parameter estimation tool may not compute the inertia and friction constant parameters. Interchange any two motor phase connections and try running the parameter estimation host model again to estimate these parameters. 3. Use Nominal Magnetizing current (Id0) input as zero, to estimate Id0 using open loop control   ACIM Parameter Estimation  Rs Signal Conditioning and Scaling Rr Lm Lls Motor Inertia  Required Inputs  Nominal Current:  V  A (phase peak value)  Pole pairs:  Input DC Voltage: Friction constant  Ohm  Ohm N.m.s  Fault Status Over Current Under Voltage Serial communication  Estimated Motor Parameters  Signal from Target  Test Status  Copyright 2021-2023 The MathWorks, Inc.  Communication Port  Steps 1. Provide required inputs. 2. Press Ctrl+D to update the workspace 3. Build, Deploy &amp; Start required target model 4. Select port in Host Serial Setup, Host Serial Receive, Host Serial transmit 5. Run this model to estimate motor parameters  H  Kg.m^2  Target Model (F28379D + DRV8305): mcb_acim_param_est_f28379D_DRV8305   Rated Frequency: Llr  H  H  Hz  Total QEP Slits:  Nominal Magnetizing current ( Id0 )   A (phase peak value)  Nominal Voltage:  V (Line-Line RMS) Id0  A

BLOCK:
 Demux ; SFunction ; Terminator ;AND;Action Port;Algorithm;Bitwise AND;Bitwise OR;Callback Button;Change_detect;Combo Box;Compare To Constant;Constant;CurrentPU_RWV;Data;Data Type Conversion;Data_Conditioning;Data_Conditioning_Tx;Dc Test Voltage Level;DetectParam;Display;Edit;Enable;Enable_Openloop;Enabled Subsystem;EnabledSubsystem;ErrorCode;ErrorConditions;Event Listener;Fixed_Point_Target;Floating_Point_Target;From;FromTarget;Gain;Goto;Host Serial Receive;Host Serial Setup;Host Serial Transmit;I_rated;Idx;In;Index Vector;Lamp;LatchIdx;LatchZero;Logical Operator;MATLAB Function;Magnetizing_Current;Mux;Out;Overall_Delay;PU2RWV;Parameters;Product;RWV;R_board;Rated_Frequency;RefVdVqScaling;Reference;Relational Operator;RsMeasTestTime;Scale Over Current;Scale Under Voltage;Scope;Scope_Display;SelTestHost;SelectedSignal;SerialReceive;SerialSend;Shift Arithmetic;SigFromTarget;SignalConditioning;SignalScaling;Slider Switch;SpeedScaling;Status;SubSystem;Subsystem;Sum;Switch;Switch Case;Switch Case Action Subsystem;Terminator;ThetaScaling;To Workspace;Unit Delay;V_Rated;V_bus;VoltagePU_RWV;bytepack;chageDetect;changeDetect;changeDetected;checkStatus;count;data;errorID;estParIdx;estParam;estParamIdx;estimatedParameter;idx;index;inverter_V_max;pole_pairs;qepSlits;rawInput;selSig;selSignal;sigSel;speed_base;status;testEnable;testEnable_sigSel1_;testEnable_sigSel1_2 ;u;unused;y

BLOCKTYPE:
ActionPort;ArithShift;Bitwise Operator;ComboBox;Compare To Constant;Constant;Counter ;CustomCallbackButton;DataTypeConversion;Demux;Display;DisplayBlock;EditField;EnablePort;EventListener;From;Gain;Goto;Inport;LampBlock;Logic;MultiPortSwitch;Mux;Outport;Product;RelationalOperator;S-Function;Scope;SliderSwitchBlock;Sum;Switch;SwitchCase;Terminator;ToWorkspace;UnitDelay;system.SerialConfiguration;system.SerialReceive;system.SerialSend


MODELNAME: mcb_bldc_host_model_f28379d
PATH: examples/mcb/main/mcb_bldc_host_model_f28379d.slx
BLOCKTYPE_FREQUENCY: 2;3;8;6;2;2;1;1;1;1;1;14;1;1;2;15;2;1;2;2;1;1;1;1;1;2;1;2;1
CHECKSUM: 0DF7134EF0404AF289A795A67C853A1F
PRODUCT: Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: MT
ANNOTATION:
Rx TX  BLDC Control Host  Copyright 2020-2023 The MathWorks, Inc.  Steps: 1. Set the serial port to target.comport in the init script of the target model. 2. Simulate this model. 3. Use Motor switch to control the motor. 4. Input speed request in the Reference Speed edit box. 5. Observe the debug signals in scope.  Prerequisites: 1. Deploy the target model to the hardware mcb_bldc_sixstep_f28379d 2.The variables from the target model are loaded to the base workspace. 

BLOCK:
 Demux ; SFunction ; Terminator ;Bitwise Operator;Change_detect;Convert_to_SI_Units;Data;Data Type Conversion;Data_Conditioning_Tx;Data_Type_Fixed_Point;Data_Type_Float;Debug1 (SI units);Debug2 (SI units);Debug_signals;Demux;Display;Display_Value;Enable;Enable_PWM;Enabled Subsystem;FWC Enable;From;Gain;Goto;Host Serial Receive;Host Serial Setup;Host Serial Transmit;Ia_Ib;Idc_control;In;Input;Logical Operator;Motor;Motor Enable;Multiport Switch;Mux;Out;Output;Parse;Pos_HallState;Product;Radio Button;Rate Transition;Reference;Reference Speed (RPM);Relational Operator;Scope (Per-Unit);SelectedSignals;Serial Communication;Shift Arithmetic;Speed_control;SubSystem;Sum;Unit Delay;debug_

BLOCKTYPE:
ArithShift;Bitwise Operator;Constant;DataTypeConversion;Demux;Display;EditField;EnablePort;From;Gain;Goto;Inport;Logic;MultiPortSwitch;Mux;Outport;Product;RadioButtonGroup;RateTransition;RelationalOperator;S-Function;Scope;SliderSwitchBlock;Sum;Terminator;UnitDelay;system.SerialConfiguration;system.SerialReceive;system.SerialSend


MODELNAME: mcb_bldc_sixstep_f28069mLaunchPad
PATH: examples/mcb/main/mcb_bldc_sixstep_f28069mLaunchPad.slx
CHECKSUM: 0B9F8FC81D11739F8C85B292E8C429AD
PRODUCT_BASECODE: MT
ANNOTATION:
Fast Serial Data Monitoring (32-bit) for BoostXL-DRV8305 connected with LaunchXL-28379D System Outputs for BoostXL-DRV8305 connected to LaunchXL-28069M System Outputs Heartbeat LED 1HZ Scaling Delays  Explore more: 1. Edit motor &amp; inverter parameters 2. For position sense using QEP, use Offset computation model to find out position offset. Update offset in Init script to variable bldc.PositionOffset. 3. For position sense using HALL, use hall sequence calibration to find out hall sequence. Update hall sequence in Init script to variable bldc.HallSequence. 4.Click Build, Deploy &amp; Start in hardware tab 5. Control motor via host model 6. Learn more about this example.  HW Prerequisites 1. TI F28069m LaunchPad 2. BOOSTXL-DRV8305 Booster pack 3. BLDC motor with Hall or QEP sensor  Copyright 2020-2023 The MathWorks, Inc. Six Step Control of BLDC Global Variables

BLOCK:
 Calculate Position and Speed; Code Generation;+;-;3phase converter;6-pulse PWM generator;6PWM_Mode;ADC Calib Enable;ADCINT;ADC_Gain_Setting;AND;Abs;Action Port;Add;Add Offset;BLDC;Bias;Bitwise AND;Bus Creator;Bus Selector;Calculate ADC Offset ;Code Generation;Code generation;CodeGeneration;Codegeneration;Constant;Control_System;Convert ADC value to PU;Counter Limited;Current Control;Current Sensor (Three-Phase);DC Voltage Source;DRV Enable;DRV830x_Enable;Data;Data Store Memory;Data Store Read;Data Store Write;Data Type Conversion;Data Type Duplicate;Data_Conditioning;Data_Log;Data_Logging;Data_out;Data_width;Default ADC Offset;Delay;Demux;Desired Speed;Detect Change;Digital Input;Digital Output;Discrete PI Controller with anti-windup & reset;Display;Divide;Duty;Duty Cycles;Duty_Cycles;Electrical Reference;Enable;Enabled Subsystem;End;Event Listener;Feedback_sim;For Iterator;For Iterator Subsystem;From;Gain;Get ADC Count;Get Current Sense Voltage;Get_PU;Get_PU ;Get_QEP_Counts;Goto;Ground;HWI_ADCINT;HWI_SCIRXINTA;HW_INT;HW_Interrupt;Hall;Hall Feedback;Hall Signals;Hall Signals HW;Hall Speed and Position;Hall State Plant to HW;Hall Validity;Hall sensor;HallState;HallStatePlant;Hall_A;Hall_B;Hall_C;Hall_Commutation;Hall_Meas;Hall_State;Halls;Hallstate;HallstateHw;Hardware Init;Heartbeat LED;IA/IB Measurement;IC Measurement;IIR Filter;Ia_meas_PU;Iabc;Iabc meas;Iabc meas ADC;Iabc_Meas_ADC;Iabc_meas_ADC;IdcRef_PU;Idc_fb;Idc_fb_PU;Idc_meas_PU;Idc_ref;Idc_ref_PU;Ideal Rotational Motion Sensor;Ideal Torque Source;If;If Action Subsystem;In;Index Vector;IndexOffset;IndexOffset in PU;Input;Input Scaling;Inverter;Inverter Signals;Inverter and Motor;Inverter and Motor - Plant Model;Iteration;Ki;Kp;Line Voltage Sensor (Three-Phase);Load;Load_Profile (Torque);Load_Trq;Logical Operator;LowerSwitchCurrents;MRRef;Mechanical Rotational Reference;Mechanical to Electrical Position;Memory;Merge;Mod;ModWave;Motion Sensor;Motor Load reverse ;Mux;NOT;N_fb;N_ref;Offset;Offset voltage;Out;PI_Controller_Idc;PI_Controller_Speed;PS-Simulink Converter;PU;Pos;Pos_Commutation;Pos_PU;Pos_mech;PositionInput;PrevHallState;Previous_Hall_State;Product;Q17 per unit conversion;QEP Feedback;QEP_Index_Latch;QEP_Position_Count;Qep_Meas;Quadrature Decoder;R;R ;RED_LED;RT;Radio Button;Rate Transition;Read Halls;Reference;Relational Operator;Relay;Repeating Sequence Interpolated;Reversal;SCI Receive;SCI Transmit;SCI_Data;SCI_Rx;SCI_Rx_INT;SCI_Tx;SPI Master Transfer;Saturate at ADC Vref;Saturate at inverter Vref;Scale;Scale_to_PWM_Counter_PRD;Selector;Sensing w a;Sensor Driver Blocks;Sensor Driver Blocks (codegen);Sensor Driver Blocks (sim);Sensor_Measurements;Serial Receive;Shift Arithmetic;Sign;Simulation;Simulation_Terminator;Simulink-PS Converter;Six Step Commutation;Six-Pulse Gate Multiplexer;Solver Configuration;Speed Control;Speed Counter;Speed Measurement;Speed_Count;Speed_Meas_PU;Speed_PU;Speed_Ref_Final (rpm);Speed_Ref_In;Speed_Ref_Init (rpm);Speed_Ref_Open;Speed_Ref_PU;Speed_Ref_Selector;Speed_fb;Speed_fb_Sel;Start;SubSystem;Subsystem;Sum;Sum of Elements;Switch;Switch Case;Switch to closed loop ;T_load;Terminator;Theta;Theta_e;Tm;TorqueSign;Trigger;Trigonometric Function;Unary Minus;Unit Delay;V_ref;Variant Sink;Variant Source;Variant Subsystem;While Iterator;Width;Wrap;Zero_Cancellation;cu;deg;duty_abc;ePWM;eQEP;fb_codegen;fb_sim;feedback_sim;g;in;measVI;mech->elec;out;rad;rad->deg;rpm2PU;speed;speed_PU;stop;switching;theta;x;y;~;~1.65V in ADC counts

BLOCKTYPE:
ADC Type 3-5;Abs;ActionPort;ArithShift;BLDC;Bias;Bitwise Operator;BusCreator;BusSelector;C2806x GPIO Digital Input;C2806x GPIO Digital Output;C28x SCI Receive;C28x SCI Transmit;C28x eQEP;Constant;Converter (Three-Phase);Counter Limited;Current Sensor (Three-Phase);DC Voltage Source;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;DataTypeDuplicate;Delay;Demux;Detect Change;Display;Electrical Reference;EnablePort;EventListener;ForIterator;From;Function-Call Generator;Gain;Goto;Ground;Hall Speed and Position;Hall Validity;HardwareInterrupt;IIR Filter;Ideal Rotational Motion Sensor;Ideal Torque Source;If;Inport;Line Voltage Sensor (Three-Phase);Logic;Math;Mechanical Rotational Reference;Mechanical to Electrical Position;Memory;Merge;MultiPortSwitch;Mux;Outport;PID 1dof;PMIOPort;PS-Simulink Converter;Product;Quadrature Decoder;RadioButtonGroup;RateTransition;RelationalOperator;Relay;Repeating Sequence Interpolated;Saturate;Selector;Signum;Simulink-PS Converter;Six-Pulse Gate Multiplexer;Six-Step Commutation;Solver Configuration;Speed Measurement;Step;Sum;Switch;SwitchCase;Terminator;TriggerPort;Trigonometry;UnaryMinus;UnitDelay;VariantSink;VariantSource;WhileIterator;Width;codertarget.tic2000.blocks.SPIMasterTransfer;ePWM Type 1-4

BLOCKTYPE_FREQUENCY:
4;1;20;3;1;2;3;2;1;2;3;1;1;1;50;1;1;1;1;4;9;10;27;1;4;12;1;2;1;3;1;1;13;2;13;9;2;1;1;2;4;2;1;7;87;1;7;2;4;1;3;5;1;17;90;2;7;6;4;1;1;12;6;1;1;2;1;1;7;1;2;1;1;5;16;6;1;11;2;2;1;3;1;1;1;1;2;3

PRODUCT:
C2000 Microcontroller Blockset;Embedded Coder;MATLAB;Motor Control Blockset;Simscape;Simscape Electrical;Simulink


MODELNAME: mcb_bldc_sixstep_f28379d
PATH: examples/mcb/main/mcb_bldc_sixstep_f28379d.slx
CHECKSUM: 122A3FFCE9D82F3A90FF04BE6892EB81
PRODUCT_BASECODE: MT
ANNOTATION:
for BoostXL-DRV8305 connected with LaunchXL-28379D System Outputs Fast Serial Data Monitoring (32-bit) Heartbeat LED 1HZ Scaling Delays  Copyright 2020-2023 The MathWorks, Inc. Six Step Control of BLDC  Steps: 1. Edit motor &amp; inverter parameters 2. For position sense using QEP, use Offset computation model to find out position offset. Update offset in Init script to variable bldc.PositionOffset. 3. For position sense using HALL, use hall sequence calibration to find out hall sequence. Update hall sequence in Init script to variable bldc.HallSequence. 4. Click Build, Deploy &amp; Start in hardware tab 5. Control motor via host model 6. Learn more about this example.  HW Prerequisites 1. TI F28379D LaunchPad 2. BOOSTXL-DRV8305 Booster pack 3. BLDC motor with Hall or QEP sensor Global Variables

BLOCK:
 Calculate Position and Speed; Simulation;+;-;3phase converter;6-pulse PWM generator;6PWM_Mode;ADC Calib Enable;ADC_A_IN;ADC_B_IN;ADC_C_IN;ADC_Gain_Setting;AND;Abs;Action Port;Add;Add Offset;BLDC;Bias;Bitwise AND;Bitwise Operator;Bus Creator;Bus Selector;Byte Pack;Calculate ADC Offset ;Code Generation;Code generation;Codegeneration;Compare To Constant;Constant;Control_System;Convert ADC value to PU;Counter Limited;Current Control;Current Measurment;Current Sensor (Three-Phase);DC Voltage Source;DRV Enable;DRV830x Enable;Data;Data Store Memory;Data Store Read;Data Store Write;Data Type Conversion;Data Type Duplicate;Data_Conditioning_Rx;Data_Conditioning_Tx;Data_Log;Data_Logging;Data_Type;Data_Type_Fixed_Point;Data_Type_Float;Data_out;Data_width;Debug_signal;Debug_signals;Default ADC Offset;Delay;Demux;Desired Speed;Detect Change;Digital Input;Digital Output;Discrete PI Controller with anti-windup & reset;Display;Divide;Dummy;Duty;DutyCycles;Duty_Cycles;Electrical Reference;Enable;Enable_PWM;Enabled Subsystem;End;Event Listener;For Iterator;For Iterator Subsystem;From;Function-Call Generator;Gain;Get ADC Count;Get ADC Voltage;Get Current Sense Voltage;Get Currents;Get_PU;Get_PU ;Get_QEP_Counts;Goto;Ground;HWI_ADCA1_INT;HWI_SCIA_RX_INT;HW_INT;HW_Interrupt;Hall;Hall Feedback;Hall Signals;Hall Signals HW;Hall Speed and Position;Hall State Plant to HW;Hall Validity;Hall sensor;HallState;HallStatePlant;Hall_A;Hall_B;Hall_C;Hall_Commutation;Hall_Meas;Hall_State;Halls;Hallstate;HallstateHw;Hardware Init;Heartbeat LED;IA;IB;IC;IIR Filter;Iab;Iab_PU;Iab_meas_ADC;Iab_meas_PU;Iabc;Iabc meas;Iabc meas ADC;Iabc_Meas_ADC;Iabc_meas_ADC;IdcRef_PU;Idc_control;Idc_debug;Idc_fb;Idc_fb_PU;Idc_meas_PU;Idc_ref;Idc_ref_PU;Ideal Rotational Motion Sensor;Ideal Torque Source;If;If Action Subsystem;In;Index Vector;IndexFinder;IndexFound;IndexOffset;IndexOffset in PU;Input Scaling;Inverter;Inverter Signals;Inverter and Motor;Inverter and Motor - Plant Model;Iteration;Ki;Kp;Line Voltage Sensor (Three-Phase);Load;Load_Profile (Torque);Load_Trq;Logical Operator;LowerSwitchCurrents;MRRef;Mechanical Rotational Reference;Mechanical to Electrical Position;Memory;Merge;Mod;ModWave;Motion Sensor;Motor Load reverse ;Multiport Switch;Mux;NOT;N_fb;N_ref;Offset;Offset voltage;Out;PI_Controller_Idc;PI_Controller_Speed;PS-Simulink Converter;PU;PU_Conversion;Parse;Pos;Pos_Commutation;Pos_PU;Pos_hall_state;Pos_mech;Position;PositionInput;PrevHallState;Previous_Hall_State;Product;Q17 per unit conversion;QEP Feedback;QEP_Index_Latch;QEP_Position_Count;Qep_Meas;Quadrature Decoder;R;R ;RED_LED;RT;Radio Button;Rate Transition;Read Halls;Reference;Relational Operator;Relay;Repeating Sequence Interpolated;Reversal;SCI Receive;SCI Transmit;SCI_Rx;SCI_Rx_INT;SCI_Tx;SPI Master Transfer;Saturate at ADC Vref;Saturate at inverter Vref;Scale;Scale_to_PWM_Counter_PRD;Selector;Sensing w a;Sensor Driver Blocks;Sensor Driver Blocks (codegen);Sensor Driver Blocks (sim);Sensor_Measurements;Serial Receive;Shift Arithmetic;Sign;Simulation;Simulation_Terminator;Simulink-PS Converter;Six Step Commutation;Six-Pulse Gate Multiplexer;Solver Configuration;Speed Control;Speed Counter;Speed Measurement;Speed_Count;Speed_Meas_PU;Speed_PU;Speed_Ref_Final (rpm);Speed_Ref_In;Speed_Ref_Init (rpm);Speed_Ref_Open;Speed_Ref_PU;Speed_Ref_Selector;Speed_fb;Speed_fb_Sel;Start;SubSystem;Subsystem;Sum;Sum of Elements;Switch;Switch Case;Switch to closed loop ;T_load;Terminator;Theta;Theta_e;Tm;TorqueSign;Trigger;Trigonometric Function;Unary Minus;Unit Delay;V_ref;Variant Sink;Variant Source;Variant Subsystem;While Iterator;While Iterator Subsystem;Width;Wrap;Zero_Cancellation;cu;deg;duty_abc;ePWM;eQEP;fb_codegen;fb_sim;feedback_sim;g;in;measVI;mech->elec;out;rad;rad->deg;rpm2PU;speed;speed_control;stop;switching;theta;unParse;x;y;~;~1.65V in ADC counts

BLOCKTYPE:
ADC Type 3-5;Abs;ActionPort;ArithShift;BLDC;Bias;Bitwise Operator;BusCreator;BusSelector;Byte pack;C28x SCI Receive;C28x SCI Transmit;C28x eQEP;Compare To Constant;Constant;Converter (Three-Phase);Counter Limited;Current Sensor (Three-Phase);DC Voltage Source;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;DataTypeDuplicate;Delay;Demux;Detect Change;Display;Electrical Reference;EnablePort;EventListener;F2837x GPIO Digital Input;F2837x GPIO Digital Output;ForIterator;From;Function-Call Generator;Gain;Goto;Ground;Hall Speed and Position;Hall Validity;HardwareInterrupt;IIR Filter;Ideal Rotational Motion Sensor;Ideal Torque Source;If;Inport;Line Voltage Sensor (Three-Phase);Logic;Math;Mechanical Rotational Reference;Mechanical to Electrical Position;Memory;Merge;MultiPortSwitch;Mux;Outport;PID 1dof;PMIOPort;PS-Simulink Converter;Product;Quadrature Decoder;RadioButtonGroup;RateTransition;RelationalOperator;Relay;Repeating Sequence Interpolated;Saturate;Selector;Signum;Simulink-PS Converter;Six-Pulse Gate Multiplexer;Six-Step Commutation;Solver Configuration;Speed Measurement;Step;Sum;Switch;SwitchCase;Terminator;TriggerPort;Trigonometry;UnaryMinus;UnitDelay;VariantSink;VariantSource;WhileIterator;Width;codertarget.tic2000.blocks.SPIMasterTransfer;ePWM Type 1-4

BLOCKTYPE_FREQUENCY:
6;1;20;5;1;2;7;2;1;1;2;1;1;2;57;1;1;1;1;6;10;12;31;1;6;14;1;2;1;4;1;2;3;1;12;2;16;8;2;1;1;2;4;2;1;7;108;1;8;2;4;1;3;7;2;20;117;2;7;6;4;1;1;12;6;1;1;2;2;1;7;1;2;1;1;5;17;6;1;12;2;2;1;3;1;1;1;1;2;3

PRODUCT:
C2000 Microcontroller Blockset;Embedded Coder;MATLAB;Motor Control Blockset;Simscape;Simscape Electrical;Simulink


MODELNAME: mcb_ee_pmsm_foc
PATH: examples/mcb/main/mcb_ee_pmsm_foc.slx
CHECKSUM: C8AEEE8FFCB70793069D8D54F4E22CEF
PRODUCT_BASECODE: MT
ANNOTATION:
Current Measurements Position & Speed Measurements QEP for BoostXL-DRV8305 connected with LaunchXL-28379D System Outputs Fast Serial Data Monitoring (32-bit) HW Driver Blocks Enable DRV8305 in CPU1 for BoostXL-DRV8305 connected to LaunchXL-28379D System Outputs  Enable ADC offset calibration only when motor is not loaded and not rotating due to external factors Heartbeat LED 1HZ Scaling Delays  Explore more: 1. Edit motor &amp; inverter parameters 2. Simulate this model 3. Review results in Data Inspector 4. Use Offset computation model to find out position offset. 5. Update offset in Init script to variable pmsm.PositionOffset 6. Build, Deploy &amp; Start 7. Control motor via host model 8. Learn more about this example Global Variables Note: This example requires a TI F28379D LaunchPad with a BOOSTXL-DRV8305 booster pack connected to a PMSM Motor with QEP Sensor  Copyright 2020-2023 The MathWorks, Inc. Permanent Magnet Synchronous Motor Field Oriented Control

BLOCK:
 ; Calculate Position and Speed;+;+ ;-;- ;1-D Lookup Table;3-Phase Sine Voltage Generator;3phase converter;6-pulse PWM generator;6PWM_Mode;A;ADC Calib Enable;ADCINT;ADC_A_IN;ADC_B_IN;ADC_C_IN;ADC_Gain_Setting;AND;Abs;Action Port;Add;Add Offset;Average-Value Inverter;Bias;Bitwise Operator;Bus Selector;Byte Pack;CELL ;Calculate ADC Offset ;Calculate Phase Currents;Capacitor;Clarke Transform;Clock;Closed Loop Control;Code Generation;Code generation;Codegeneration;Compare To Constant;Constant;Control_System;Converter (Three-Phase);Correction_Factor_sinePWM;Counter Limited;Current Control;Current Sensor (Three-Phase);Current_Controllers;DC Voltage Source;DQ Limiter;DRV Enable;DRV830x Enable;Data;Data Store Memory;Data Store Read;Data Store Write;Data Type Conversion;Data Type Duplicate;Data_Conditioning_Rx;Data_Conditioning_Tx;Data_Log;Data_Logging;Data_Type;Data_Type_Fixed_Point;Data_Type_Float;Data_out;Data_width;Debug_signal;Debug_signals;Default ADC Offset;Delay;Demux;Desired Speed;Digital Output;Direction;Discrete PI Controller with anti-windup & reset;Display;Divide;Dummy;Duty Cycles;DutyCycles;Duty_Cycles;Duty_abc;EE_MMC;EE_PWM;EE_PWM_DELTA;Electrical Reference;EnClosedLoop;Enable;Enable_PWM;End;Event Listener;FEM-Parameterized PMSM;Feedbacks;Feedbacks_sim;For Iterator;For Iterator Subsystem;From;Gain;Get ADC Count;Get ADC Voltage;Get Current Sense Voltage;Get Currents;Get_PU;Get_PU ;Get_QEP_Counts;Goto;Ground;HWI_ADCB1_INT;HWI_SCIA_RX_INT;HW_Inputs;HW_Interrupt;Hardware Init;Heartbeat LED;IIR Filter;I_fb;I_ref;Ia_ADC;Ia_Pos;Iab;Iab_PU;Iab_meas_PU;Iabc;Ib_ADC;Id;Id_control;Id_ref;Ida_ref_PU;Ideal Rotational Motion Sensor;Ideal Semiconductor Switch;Ideal Torque Source;Idq;IdqRef_PU;Idq_debug;Idq_ref_PU;If;If Action Subsystem;In;Index Vector;IndexFinder;IndexFound;IndexOffset;IndexOffset in PU;Input Scaling;Interrupt;Inverse Park Transform;Inverter;Inverter Signals;Inverter and Motor - Plant Model;InverterSelection;Inverting / Non-inverting Current measurement amplifieer;Iq;Iq_control;Iq_ref;Iteration;Ki;Kp;Line Voltage Sensor (Three-Phase);Load;Load_Profile (Torque);Load_Trq;Logical Operator;Low-Pass Filter (Discrete or Continuous);MCB;MMC;Math Function;Mechanical Rotational Reference;Mechanical to Electrical Position;Memory;Merge;Mod;ModWave;Multiport Switch;Mux;NOT;N_fb;N_ref;Offset;Offset voltage;One;One_by_Two;Open Loop Start-Up;Out;Output Scaling;PI_Controller_Id;PI_Controller_Iq;PI_Controller_Speed;PMSM;PS-Simulink Converter;PU;PU_Conversion;PWM;PWM_Duty;PWM_Duty_Cycles;PWM_Enable;Park Transform;Parse;Phase Splitter;PhaseCurr;Pos_PU;Position;Position Generator;Product;Q17 per unit conversion;QEP_Index_Latch;QEP_Position_Count;Quadrature Decoder;R ;RED_LED;RT;Radio Button;Ramp;Ramp Generator;Ramp_Time;Ramp_Time (sec);Rate Transition;Reference;Relay;Repeating Sequence Interpolated;Reversal;SCI Receive;SCI Transmit;SCI_Data;SCI_Rx;SCI_Rx_INT;SCI_Tx;SPI Master Transfer;Sample_Time;Saturate at ADC Vref;Saturate at inverter Vref;Saturation;Scale;Scale_to_PWM_Counter_PRD;Scope;Selector;Sensor Driver Blocks (codegen);Sensor Driver Blocks (sim);Sensor_Measurements;Serial Receive;Shift Arithmetic;Sim_fb;Simulation;Simulation_Terminator;Simulink-PS Converter;Sine-Cosine Lookup;Six-Pulse Gate Multiplexer;Solver Configuration;Space Vector Generator;Speed Control;Speed Measurement;Speed_Meas_PU;Speed_PU;Speed_Ref_Final (rpm);Speed_Ref_In;Speed_Ref_Init (rpm);Speed_Ref_Open;Speed_Ref_PU;Speed_Ref_Selector;Speed_fb;Speed_ref(rpm);Start;SubSystem;Subsystem;Sum;Surface Mount PMSM;Switch;Switch to closed loop ;T_load;Terminator;Theta;Theta_e;Tm;Trigger;V-by-f;V_ref;Vabc;Vabc in PU;Vabc_In_PU;Vabc_ref;Variant Sink;Variant Source;Variant Subsystem;Vd_ref;Vq_ref;While Iterator;While Iterator Subsystem;Width;Wrap;Zero_Cancellation;duty_abc;ePWM;eQEP;fmod;g;gmod;in;measVI;mod;negative arm A;negative arm B;negative arm C;out;pos;position_increment;positive arm A;positive arm B;positive arm C;rad;rpm2PU;rpm2freq;sim;speed;speed_control;stop;unParse;~;~1.65V in ADC counts

BLOCKTYPE:
3-Phase Sine Voltage Generator;ADC Type 3-5;Abs;ActionPort;ArithShift;Average Value Inverter;Bias;Bitwise Operator;BusSelector;Byte pack;C28x SCI Receive;C28x SCI Transmit;C28x eQEP;Capacitor;Clarke Transform;Clock;Compare To Constant;Constant;Converter (Three-Phase);Counter Limited;Current Sensor (Three-Phase);DC Voltage Source;DQ Limiter;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;DataTypeDuplicate;Delay;Demux;DiscreteIntegrator;Display;Electrical Reference;EnablePort;EventListener;F2837x GPIO Digital Output;FEM-Parameterized PMSM;ForIterator;From;Function-Call Generator;Gain;Goto;Ground;HardwareInterrupt;IIR Filter;Ideal Rotational Motion Sensor;Ideal Semiconductor Switch;Ideal Torque Source;If;Inport;Inverse Park Transform;Line Voltage Sensor (Three-Phase);Logic;Lookup_n-D;Low-Pass Filter (Discrete or Continuous);Math;Mechanical Rotational Reference;Mechanical to Electrical Position;Memory;Merge;MultiPortSwitch;Mux;Outport;PID 1dof;PMIOPort;PMSM;PS-Simulink Converter;PWM Modulation;Park Transform;Phase Splitter;Position Generator;Product;Quadrature Decoder;RadioButtonGroup;RateTransition;Relay;Repeating Sequence Interpolated;Saturate;Scope;Selector;Simulink-PS Converter;Sine-Cosine Lookup;Six-Pulse Gate Multiplexer;Solver Configuration;Speed Measurement;Step;Sum;Surface Mount PMSM;Switch;Terminator;TriggerPort;VariantSink;VariantSource;WhileIterator;Width;codertarget.tic2000.blocks.SPIMasterTransfer;ePWM Type 1-4

BLOCKTYPE_FREQUENCY:
1;4;1;8;3;1;2;4;1;1;2;1;1;72;1;1;2;52;2;1;3;3;1;6;11;10;41;1;4;96;1;2;3;5;1;3;1;1;91;2;30;88;4;2;3;3;144;3;4;267;1;3;16;1;3;3;9;1;2;2;2;30;98;3;390;2;12;1;1;2;1;4;1;1;24;5;2;3;3;10;159;1;2;3;1;4;21;1;6;15;2;1;1;1;1;2;3


MODELNAME: mcb_hall_calibration_f28069mLaunchPad
PATH: examples/mcb/main/mcb_hall_calibration_f28069mLaunchPad.slx
BLOCKTYPE_FREQUENCY: 1;3;2;2;2;2;1;1;1;2;14;1;1;1;2;7;1;4;4;3;1;3;2;1;25;1;1;2;1;7;21;1;1;1;1;4;1;5;2;1;1;3
CHECKSUM: 841A9AF49B0738CB5C67D5600F59B50B
PRODUCT_BASECODE: MT
ANNOTATION:
Fast Serial Data Monitoring (16-bit)  Note: Hall sequence calibration host model expects open loop position in PU  Note: - This subsystem reads the user inputs and assigns them to the variables in the base workspace by using an initialization script. - To determine the script name, navigate to Model Settings in the Modeling tab and open Model Properties &gt; Callbacks &gt; InitFcn. - Ensure that these variables are created in the base workspace and have correct values for algorithm export (generate code only for control algorithm) or customized models. - You can find these variables in init callback.  HW Driver Blocks Global variable Hall Sequence Calibration of 3-phase motors  Copyright 2020-2023 The MathWorks, Inc. Target Model  Note: This example requires a TI F28069m launchpad with BOOSTXL-DRV8305 inverter connected to a Motor with Hall Sensor  Steps: 1. Enter parameters in the Configuration panel. 2. Click Build, Deploy &amp; Start in the Hardware tab. 3. Perform calibration by using host model. 4. If the motor does not start or rotate smoothly, increase Vd Ref in Per Unit voltage (that can have a maximum value of 1) in the Configuration panel. 5. If the current drawn by the connected motor is too high, reduce the value mentioned in step 4. 6. Learn more about this example.  Configuration  Motor Base Speed [rpm]  PWM Frequency [Hz]  Data type for control algorithm  Number of Pole Pairs  Vd Ref in Per Unit voltage

BLOCK:
Action Port;Add;Bias;Combo Box;Communication;Constant;Count;Counter;Counter Limited;Data;Data Serial Output;Data Store Memory;Data Store Read;Data Store Write;Data Type;Data Type Co nversion;Data Type Conversion;Data1_Log;Data2_Log;Data_Conditioning;Data_out;Data_width;Delay;Demux;Desired Speed;Digital Output;Duty Output;Edit;EnPWM;EnPWMOut;Enable;End;Event Listener;Gain;HW Drivers;HW Interrupt;HWI_ADCINT;HWI_SCIRXINTA;HW_INT;Hall A, Hall B;Hall C;Hall Calibration;Hall Sensor;Hall State;HallA;HallB;HallC;HallState;Hall_State;Heartbeat LED;IA/IB Measurement;If;In;Index Vector;Inverse Park Transform;Iteration;LED 1 Hz;Merge;Motor BaseSpeed;Mux;NOT;Number of pole pairs;Open Loop Control;Open_Loop_Control;Out;Output;Output Scaling;PWM Duty Cycle;PWM Frequency;PWM_Duty;Parameters;Pos;Position Generator;Rate Transition;Reference;Reset Counter/Enable;SCI Receive;SCI Transmit;SCI_Rx_INT;Scale_to_PWM_Counter_PRD;Serial Receive;Shift Arithmetic;Sine-Cosine Lookup;Space Vector Generator;Speed_ref;Start;SubSystem;Sum;Switch;Terminator;Trigger;Up Counter;Vabc_ref;Wait for 7 sec ;Wait for 9 sec ;While Iterator;While Iterator Subsystem;Width;ePWM;pos;rpm2deltatheta;stop

BLOCKTYPE:
ADC Type 3-5;ActionPort;ArithShift;Bias;C2806x GPIO Digital Input;C2806x GPIO Digital Output;C28x SCI Receive;C28x SCI Transmit;ComboBox;Compare To Constant;Constant;Counter Limited;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;Delay;Demux;EditField;EnablePort;EventListener;Gain;HardwareInterrupt;If;Inport;Inverse Park Transform;Logic;Merge;MultiPortSwitch;Mux;Outport;PWM Modulation;Position Generator;RateTransition;Sine-Cosine Lookup;Sum;Switch;Terminator;TriggerPort;WhileIterator;Width;ePWM Type 1-4


MODELNAME: mcb_hall_calibration_f28379d
PATH: examples/mcb/main/mcb_hall_calibration_f28379d.slx
BLOCKTYPE_FREQUENCY: 2;3;2;2;1;1;1;1;2;15;1;1;1;1;9;1;5;4;2;1;2;3;2;2;1;31;1;1;2;1;9;24;1;1;1;1;1;4;1;5;2;1;1;3
CHECKSUM: DBBA3BF9E51EF7F99B6B22673725B76E
PRODUCT_BASECODE: MT
ANNOTATION:
Fast Serial Data Monitoring (32-bit) Fast Serial Data Monitoring for BoostXL-DRV8305 connected with LaunchXL-28379D System Initialization  Note: Hall sequence calibration host model expects open loop position in PU  Note: - This subsystem reads the user inputs and assigns them to the variables in the base workspace by using an initialization script. - To determine the script name, navigate to Model Settings in the Modeling tab and open Model Properties &gt; Callbacks &gt; InitFcn. - Ensure that these variables are created in the base workspace and have correct values for algorithm export (generate code only for control algorithm) or customized models. - You can find these variables in init callback.   HW Driver Blocks (Outputs) Target Model Hall Sequence Calibration of 3-phase motors  Copyright 2020-2023 The MathWorks, Inc. Note: This example requires a TI F28379D LaunchPad with a BOOSTXL-DRV8305 booster pack Global Variables  Number of Pole Pairs Configuration  PWM Frequency [Hz]  Motor Base Speed [rpm]  Vd Ref in Per Unit voltage  Steps: 1. Enter parameters in the Configuration panel. 2. Click Build, Deploy &amp; Start in the Hardware tab. 3. Perform calibration by using host model. 4. If the motor does not start or rotate smoothly, increase Vd Ref in Per Unit voltage (that can have a maximum value of 1) in the Configuration panel. 5. If the current drawn by the connected motor is too high, reduce the value mentioned in step 4. 6. Learn more about this example.   Data type for control algorithm

BLOCK:
 Grounding the SPI clockfor the DRV830x;ADC Interrupt;ADC_B_IN;ADC_C_IN;Action Port;Add;Bias;Byte Pack;Combo Box;Communication;Constant;Count;Counter;Counter Limited;DRV830x Enable;Data;Data Serial Output;Data Store Memory;Data Store Read;Data Store Write;Data Type;Data Type Co nversion;Data Type Conversion;Data_Conditioning;Data_Conditioning_Tx;Data_Log;Data_Logging;Data_Type_Fixed_Point;Data_Type_Float;Data_out;Data_width;Delay;Demux;Desired Speed;Dummy;Duty Output;Edit;EnPWM;Enable;End;Event Listener;Gain;HW Drivers;HW Interrupt;HWI_ADCB1_INT;HWI_SCIA_RX_INT;HW_INT;Hall A, Hall B;Hall C;Hall Calibration;Hall Sensor;Hall State;HallA;HallB;HallC;HallState;Hall_State;Heartbeat LED;Heartbeat LED 1Hz;Iab_measured_ADC;If;In;Index Vector;Inverse Park Transform;Inverter Enable;Iteration;Merge;Motor BaseSpeed;Mux;NOT;Number of pole pairs;Open Loop Control;OpenLoopPos;Open_Loop_Control;Out;Output Scaling;PWM Duty Cycle;PWM Frequency;PWM Output;PWM_Counter_Period;PWM_Duty;Parameters;Pos;Position Generator;Product;RED_LED;Rate Transition;Reference;SCI Receive ;SCI Transmit;SCI_Rx_INT;SCI_Tx;Sensors;Serial Receive;Shift Arithmetic;Sine-Cosine Lookup;Space Vector Generator;Speed_ref;Speed_ref_PU;Start;StopHost;SubSystem;Sum;Switch;Terminator;Up Counter;Vabc_ref;Wait for 7 sec ;Wait for 9 sec ;While Iterator;While Iterator Subsystem;Width;ePWM;pos;rpm2deltatheta;stop

BLOCKTYPE:
ADC Type 3-5;ActionPort;ArithShift;Bias;Byte pack;C28x SCI Receive;C28x SCI Transmit;ComboBox;Compare To Constant;Constant;Counter Limited;DataStoreMemory;DataStoreRead;DataStoreWrite;DataTypeConversion;Delay;Demux;EditField;EnablePort;EventListener;F2837x GPIO Digital Input;F2837x GPIO Digital Output;Gain;HardwareInterrupt;If;Inport;Inverse Park Transform;Logic;Merge;MultiPortSwitch;Mux;Outport;PWM Modulation;Position Generator;Product;RateTransition;Sine-Cosine Lookup;Sum;Switch;Terminator;TriggerPort;WhileIterator;Width;ePWM Type 1-4


MODELNAME: mcb_hall_calibration_host_f28069mLaunchPad
PATH: examples/mcb/main/mcb_hall_calibration_host_f28069mLaunchPad.slx
BLOCKTYPE_FREQUENCY: 1;5;6;1;5;2;3;1;2;1;3;2;2;15;2;7;1;15;1;1;3;3;1;2;1;1;1;4;2;2;1;1;1
CHECKSUM: EBFF15ADACE8C2F9BD1314338F86139C
PRODUCT: Embedded Coder;MATLAB;Simulink
PRODUCT_BASECODE: MT
ANNOTATION:
RX TX Hall Sequence Calibration Host   Copyright 2020-2023 The MathWorks, Inc.  Prerequisites: 1. Deploy the target model to the hardware mcb_hall_calibration_f28069mLaunchPad 2. You should see and verify the variables from the target model in the base workspace.   Steps: 1. Select port in Host Serial Setup, Host Serial Receive and Host Serial Transmit 2. Simulate this model to start the Hall sequence calibration for six step control. Motor starts spinning when calibration starts. 3. After calibration completes, simulation ends and motor stops automatically. 4. Push the Emergency Motor Stop button to stop the motor during emergency.   Calibration Output  Calibration in progress  Calibration complete

BLOCK:
 Demux ; SFunction ; Terminator ;AND;Adapt Display;Add;Buffer HallState;Calibration Status;Change_detect;Check Stop Simulation;Clock;Compare To Constant;Consider stop command 5 sec after start;Constant;Count;Counter;Data Type Conversion;Data_Conditioning;Delay;Detect Hallsequence Change;Display;Display_Value;Emergency Stop;Enable;Enable at pos 1;From;Goto;Hall Sequence;HallSequence;HallState;Host Serial Receive;Host Serial Setup;Host Serial Transmit;Host timeout in Seconds;In;Input;Keep Sim Running;Lamp;Latch HallState;Logical Operator;MATLAB Function;Motor is not rotating All hall states are zero;Mux;NOT;OR;OpenLoopPos;Out;Output;Pos;Product;Push for emergency stop;Rate Transition;Reference;Relational Operator;SCI_TX;Scope;Serial Communication;Speed demand (RPM);Step;Stop Host 2 sec after calibration complete;Stop Sim;Stop Simulation;StopSim;SubSystem;Switch;Terminator;Timeout;Trigger;Unit Delay;counter for electrical cycle;u;y

BLOCKTYPE:
Clock;Compare To Constant;Constant;CustomCallbackButton;DataTypeConversion;Delay;Demux;Detect Change;Display;DisplayBlock;EnablePort;From;Goto;Inport;LampBlock;Logic;Mux;Outport;Product;RateTransition;RelationalOperator;S-Function;Scope;Step;Stop;Sum;Switch;Terminator;TriggerPort;UnitDelay;system.SerialConfiguration;system.SerialReceive;system.SerialSend


