function [oport,tnext] = siggenerator(iport,tnow,portinfo)
% SIGGENERATOR HDL simulator example of signal generator
%   SIGGENERATOR is executed by HDLDAEMON on request from the HDL
%   simulator.  According to the global variables set in the MODSIMSIGGEN
%   example, it generates an output wave of a specific type, frequency and
%   amplitude.
%
%   ModelSim Entry - Executed by HDLDAEMON on request from the HDL
%   simulator.
%   SIGGENERATOR(IPORT,TNOW,PORTINFO)
%   SIGGENERATOR(IPORT,TNOW)
%   where
%   IPORT.DATA      - VHDL signal DATA value at simulation time TNOW
%   TNOW            - Simulation time (in seconds)
%   PORTINFO.DATA   - Structure of port information (first invocation)

% Copyright 2005-2009 The MathWorks, Inc.

% Variables set by MODSIMSIGGEN
global waveform
global amp
global freq
global frequnits
global clockperiod

% Generate output based on user specifications
if strcmp(frequnits,'Hertz')
    f = freq;
else
    f = freq/(2*pi);
end
switch(waveform)
    case 'sine'
        oport.signal_out = amp*sin(2*pi*f*tnow);
    case 'square'
        if tnow*f-floor(tnow*f) < .5
            oport.signal_out = -amp;
        else
            oport.signal_out = amp;
        end
    case 'sawtooth'
        oport.signal_out = amp*(1-2*(tnow*f-floor(tnow*f)));
    case 'random'
        oport.signal_out = amp*(2*rand-1);
end

% Wake up on the next clock rising edge
tnext = tnow + clockperiod;
