These checks are used to validate that code generated by Embedded Coder® complies with the CERT C, CWE, and ISO/IEC TS 17961 (Embedded Coder) secure coding standards.
Check ID:
mathworks.security.CodeGenSettings
Identify configuration parameters that might impact compliance with secure coding standards.
Following the recommendations of this check increases the likelihood of generating code that complies with CERT C, CWE, ISO/IEC TS 17961 secure coding standards.
Available with Embedded Coder and Simulink® Check™.
| Condition | Recommended Action |
|---|---|
| Diagnostics | |
Configuration parameter
Inf or NaN block output is set to
Configuration
parameter Inf or NaN block output is set to
| When Support non-finite numbers is:
|
Configuration parameter Model Verification block
enabling is set to Use local
settings or Enable
All. | Set Model Verification block enabling to
Disable
All. |
Configuration parameter Undirected event
broadcasts is set to none or
warning. | Set Undirected event broadcasts to
error. |
Configuration parameter Wrap on overflow is set
to none. | Set Wrap on overflow to
warning or
error. |
| Hardware Implementation | |
Configuration parameter Production hardware signed integer
division rounds to is set to
Undefined. | Set Production hardware signed integer division rounds
to to Zero or
Floor. |
| Configuration parameter Shift right on a signed integer as arithmetic shift is selected. | Clear Shift right on a signed integer as arithmetic shift. |
| Simulation Target | |
Configuration parameter Compile-time
recursion limit for MATLAB functions is set to a value
other than 0. | Set Compile-time recursion limit for MATLAB
functions to 0. |
| Configuration parameter Dynamic memory allocation in MATLAB functions is selected. | Clear Dynamic memory allocation in MATLAB functions. |
| Configuration parameter Enable run-time recursion for MATLAB functions is selected. | Clear Enable run-time recursion for MATLAB functions. |
| Code Generation | |
Configuration parameter Code replacement library
is not set to None or AUTOSAR
4.0. | Set Code replacement library to
None or AUTOSAR
4.0. |
| Configuration parameter External mode is selected. | Clear External mode. |
Configuration parameter Include comments is cleared. | Select Include comments. |
| Configuration parameter MAT-file logging is selected. | Clear MAT-file logging. |
| For ERT-based target systems, configuration parameter MATLAB user comments is cleared. | Select MATLAB user comments. |
| Configuration parameter Replace multiplications by powers of two with signed bitwise shifts is selected. | Clear Replace multiplications by powers of two with signed bitwise shifts. |
| For ERT-based target systems, configuration parameter Support continuous time is selected | Clear Support continuous time. |
| For ERT-based target systems, configuration parameter Support non-inlined S-functions is selected | Clear Support non-inlined S-functions. |
| Configuration parameter System target file is set to a GRT-based target. | Set System target file to an ERT-based target. |
| Configuration parameter Use dynamic memory allocation for model initialization is selected. | Clear Use dynamic memory allocation for model
initialization. Note Select only when Code Interface Packaging
is set to |
Clicking Modify All changes the parameter values to the recommended values.
Note
When you click Modify All for models with a GRT-based target, the Model Advisor does not update the System target file configuration parameter to an ERT-based system.
Parameter subchecks depend on the results of the parameter noted with D in the results table. When the result is D-Warning, the Current Value column in the results table states Prerequisite constraint not met for the subchecks. After you change the parameter, rerun the check.
Note
Some subchecks are specific to configuration parameters for ERT-based systems. These parameters are not updated when you click Modify All unless you change the model to an ERT-based system.
Secure Coding Standards (Embedded Coder)
Check ID: mathworks.codegen.PCGSupport
Identify blocks not supported by code generation or not recommended for C/C++ production code deployment.
This check partially identifies model constructs that are not recommended for C/C++ production code generation. For Simulink Coder™ and Embedded Coder, these model construct identities appear in tables of Simulink Block Support (Simulink Coder).
In some instances, this check flags blocks that are supported for code generation. For these blocks, you should review the footnote information that is provided in the support notes and adhere to the recommended action provided by the Model Advisor.
Following the recommendations of this check increases the likelihood of generating code that complies with the CERT C, CWE, and ISO/IEC TS 17961 standards.
Available with Embedded Coder and Simulink Check.
| Condition | Recommended Action |
|---|---|
| The model or subsystem contains blocks that should not be used for production code deployment. | Consider replacing the blocks listed in the results. Click an element from the list of questionable items to locate condition. |
| The model or subsystem contains blocks that are supported but not recommended for production code generation. | Review the support notes and adhere to the recommended action provided by the Model Advisor. |
You can:
Run this check on your library models.
Analyze content of library linked blocks.
Analyze content in masked subsystems.
Exclude blocks and charts if you have a Simulink Check license.
This check is supported by edit-time checking.
Blocks and Products Supported for Code Generation (Simulink Coder)
Secure Coding Standards (Embedded Coder)
Check ID:
mathworks.security.BlockSupport
Identify blocks not recommended for compliance with secure coding standards.
Following the recommendations of this check increases the likelihood of generating code that complies with CERT C, CWE, ISO/IEC TS 17961 secure coding standards.
Available with Embedded Coder and Simulink Check.
| Condition | Recommended Action |
|---|---|
Lookup Table blocks using cubic spline interpolation or extrapolation methods were found in the model or subsystem. Specific blocks are:
| Consider other interpolation and extrapolation methods for the Lookup Table blocks. |
Deprecated Lookup Table blocks were found in the model or subsystem. Specific blocks are:
| Consider replacing the deprecated Lookup Table blocks. |
| S-Function Builder blocks were found in the model or subsystem. | Consider replacing the S-Function Builder blocks with blocks recommended for production. |
| From Workspace blocks were found in the model or subsystem | Consider replacing the From Workspace blocks with blocks recommended for production. |
String blocks were found in the model or subsystem. Specific blocks are:
| Consider replacing the String blocks with blocks recommended for production. |
You can:
Run this check on your library models.
Exclude blocks and charts from this check if you have a Simulink Check license.
Edit-Time Checking. This check is supported by edit-time checking.
Secure Coding Standards (Embedded Coder)
Check ID: mathworks.misra.AssignmentBlocks
Identify Assignment blocks that do not have block parameter Action if any output element is not assigned set to Error or Warning.
This check applies to the Assignment block that is available in the Simulink block library under Simulink > Math Operations.
Following the recommendations of this check increases the likelihood of generating MISRA C:2012 compliant code for embedded applications, as well as code that complies with the CERT C, CWE, ISO/IEC TS 17961 standards.
Available with Embedded Coder and Simulink Check.
| Condition | Recommended Action |
|---|---|
| The model or subsystem might contain Assignment blocks with incomplete array initialization that do not have block parameter Action if any output element is not assigned set to Error or Warning. | Set block parameter Action if any output element is not assigned to one of the recommended values:
|
Runs on library models.
Analyzes content of library linked blocks.
Analyzes content in masked subsystems.
If you have a Simulink Check license, allows exclusions of blocks and charts.
Edit-Time Checking. This check is supported by edit-time checking. However, the following check condition is not supported because edit-time checking is unable to determine whether the Assignment block is in an Iterator subsystem.
Set block parameter Action if any output element is not assigned to one of the recommended values:
Error, if Assignment block is not in an Iterator subsystem.
Warning, if Assignment block is in an Iterator subsystem.
MISRA C:2012, Rule 9.1
ISO/IEC TS 17961: 2013, uninitref
CERT C, EXP33-C
CWE, CWE-908
MISRA C Guidelines (Embedded Coder)
Secure Coding Standards (Embedded Coder)
Check ID: mathworks.misra.SwitchDefault
Identify switch case expressions that do not have a default case.
The check flags model objects that have switch case expressions without a default case.
Following the recommendations of this check increases the likelihood of generating MISRA C:2012 compliant code for embedded applications, as well as code that complies with the CERT C, CWE, ISO/IEC TS 17961 standards.
The check does not flag blocks without default cases if they are justified with a Polyspace® annotation. When you run the check, the Blocks with justification table lists blocks without default cases that have a justification.
Available with Embedded Coder and Simulink Check.
| Condition | Recommended Action |
|---|---|
Model object has a switch case expression without a default case. | For Switch Case blocks, consider selecting block parameter Show default case to explicitly specify a default case. |
You can:
Run this check on your library models.
Exclude blocks and charts from this check if you have a Simulink Check license.
Edit-Time Checking. This check is supported by edit-time checking.
MISRA C:2012, Rule 16.4
ISO/IEC TS 17961: 2013, swtchdflt
CERT C, MSC01-C
CWE, CWE-478
Annotate Code and Hide Known or Acceptable Results (Polyspace Bug Finder)
Secure Coding Standards (Embedded Coder)
Check ID: mathworks.misra.CompliantCGIRConstructions
Identify Simulink blocks that contain bitwise operations on signed integers.
Following the recommendations of this check increases the likelihood of generating MISRA C:2012 compliant code for embedded applications, as well as code that complies with the CERT C and CWE standards.
Available with Embedded Coder and Simulink Check.
This check requires a Stateflow® license when Stateflow is used in the model.
| Condition | Recommended Action |
|---|---|
| The model has blocks that contain bitwise operations on signed integers. | Consider using unsigned integers for bitwise operations. |
You can:
The check assumes that code is generated for the whole model. When code is generated by a subsystem build or export functions, the check can product incorrect results.
Exclude blocks and charts from this check if you have a Simulink Check license.
MISRA C:2012, Rule 10.1
CERT C, INT13-C
CWE, CWE-682
hisl_0060: Configuration parameters that improve MISRA C:2012 compliance
Secure Coding Standards (Embedded Coder)
Check ID: mathworks.misra.CompareFloatEquality
Identify equality and inequality operations on floating-point values.
The check flags sources causing equality or inequality operations on floating-point values.
Following the recommendations of this check increases the likelihood of generating MISRA C:2012 compliant code for embedded applications, as well as code that complies with the CERT C and CWE standards.
The check does not flag blocks with equality or inequality operations on floating-point values if they are justified with a Polyspace annotation. When you run the check, the Blocks with justification table lists blocks with equality or inequality operations that have a justification.
Available with Embedded Coder and Simulink Check.
| Condition | Recommended Action |
|---|---|
Model object has an equality or inequality operation on a floating-point value. | Consider using non-floating-point values for equality or inequality operations. |
You can:
Exclude blocks and charts from this check if you have a Simulink Check license.
MISRA C:2012, Dir 1.1
CERT C, FLP00-C
CWE, CWE-697
Annotate Code and Hide Known or Acceptable Results (Polyspace Bug Finder)
Secure Coding Standards (Embedded Coder)
Check ID:
mathworks.misra.IntegerWordLengths
Identify integer word lengths that do not comply with hardware implementation settings
The check flags integers whose word lengths exceed the number of bits permitted via the hardware implementation settings.
Following the recommendations of this check increases the likelihood of generating MISRA C:2012 compliant code for embedded applications, as well as code that complies with the CERT C and CWE standards.
Available with Embedded Coder and Simulink Check.
| Condition | Recommended Action |
|---|---|
|
Model object contains integer word lengths that are not compliant with hardware implementation settings. |
Update the integer so its length does not exceed the permitted number of bits. You can view the permitted number of bits in the Configuration Parameters dialog box, on the Hardware Implementation > Device details pane. |
You can:
Exclude blocks and charts from this check if you have a Simulink Check license.
MISRA C:2012, Rule 10.1
CERT C, INT13-C
CWE, CWE-682
MISRA C Guidelines (Embedded Coder)
Secure Coding Standards (Embedded Coder)
Check ID:
mathworks.sldv.deadlogic
Identify logic that stays inactive during simulation.
This check identifies portions of your model that stay inactive during simulation.
You can run a more detailed analysis that identifies both dead logic and active logic using Simulink Design Verifier™ design error detection. For more information, see Detect Dead Logic Caused by an Incorrect Value (Simulink Design Verifier).
Following the recommendations of this check increases the likelihood of generating MISRA C:2012 compliant code for embedded applications, as well as code that complies with the CERT C and CWE standards
| Result | Recommended Action |
|---|---|
| Failed, model incompatible | Resolve the model incompatibility. See:
Also see Handle Incompatibilities with Automatic Stubbing (Simulink Design Verifier). |
| Dead logic found in model | Simulink Design Verifier proved that these decision and condition outcomes cannot occur and are dead logic in the model. Dead logic can also be a side effect of specified constraints on parameters or specified minimum and maximum constraints on input ports. In rare cases, dead logic can result from approximations performed by Simulink Design Verifier. It is possible that there are objectives that this analysis did not decide. To extend the results of this analysis, use Simulink Design Verifier design error detection to also identify active logic. From the Simulink Editor, select Apps > Design Verifier > Settings. In the Configuration Parameters window, from Design Verifier > Design Error Detection pane, select both Dead logic and Identify active logic. |
| Dead logic not found in model | Simulink Design Verifier did not find dead logic in the model. It is possible that there are objectives that this analysis did not decide. To extend the results of this analysis, use Simulink Design Verifier design error detection to also identify active logic. From the Simulink Editor, select Apps > Design Verifier > Settings. In the Configuration Parameters window, from Design Verifier > Design Error Detection pane, select both Dead logic and Identify active logic. |
MISRA C:2012: Rule 2.1
CERT C, MSC07-C
CWE, CWE-561
Secure Coding Standards (Embedded Coder)
Detect Dead Logic Caused by an Incorrect Value (Simulink Design Verifier)
Design Verifier Pane: Design Error Detection (Simulink Design Verifier)
Check ID:
mathworks.sldv.integeroverflow
Detects integer or fixed-point data overflow errors in your model
This check identifies operations that exceed the data type range for integer or fixed-point operations.
Following the recommendations of this check increases the likelihood of generating MISRA C:2012 compliant code for embedded applications, as well as code that complies with the CERT C, CWE, ISO/IEC TS 17961 standards.
| Result | Recommended Action |
|---|---|
| Failed, model incompatible | Resolve the model incompatibility. See
Also see Handle Incompatibilities with Automatic Stubbing (Simulink Design Verifier). |
| Integer overflow found in model |
To view the conditions that cause the integer overflow, create a harness model. When you simulate the harness, the inputs replicate the error. Click View test case in the Model Advisor report. |
MISRA C:2012: Directive 4.1
ISO/IEC TS 17961: 2013, intoflow
CERT C, INT30-C and INT32-C
CWE, CWE-190
Secure Coding Standards (Embedded Coder)
Design Error Detection (Simulink Design Verifier)
Detect Integer Overflow and Division-by-Zero Errors (Simulink Design Verifier)
Check ID:
mathworks.sldv.divbyzero
Detects division-by-zero errors in your model
This check identifies operations in your model that cause division-by-zero errors.
Following the recommendations of this check increases the likelihood of generating MISRA C:2012 compliant code for embedded applications, as well as code that complies with the CERT C, CWE, ISO/IEC TS 17961 standards.
| Result | Recommended Action |
|---|---|
| Failed, model incompatible | Resolve the model incompatibility. See
Also see Handle Incompatibilities with Automatic Stubbing (Simulink Design Verifier). |
| Division by zero found in model |
To view the conditions that cause the division by zero, create a harness model. When you simulate the harness, the inputs replicate the error. Click View test case in the Model Advisor report. |
MISRA C:2012: Directive 4.1
ISO/IEC TS 17961: 2013, diverr
CERT C, INT33-C and FLP03-C
CWE, CWE-369
Secure Coding Standards (Embedded Coder)
Design Error Detection (Simulink Design Verifier)
Detect Integer Overflow and Division-by-Zero Errors (Simulink Design Verifier)
Check ID:
mathworks.sldv.arraybounds
Detects operations that access outside the bounds of an array index
This check detects instances of out of bound array access in Simulink Design Verifier.
Following the recommendations of this check increases the likelihood of generating MISRA C:2012 compliant code for embedded applications, as well as code that complies with the CERT C, CWE, ISO/IEC TS 17961 standards.
| Result | Recommended Action |
|---|---|
| Failed, model incompatible | Resolve the model incompatibility. See
Also see Handle Incompatibilities with Automatic Stubbing (Simulink Design Verifier). |
| Out of bound array access found in model |
To view the conditions that cause the out of bound array access, create a harness model. When you simulate the harness, the inputs replicate the error. Click View test case in the Model Advisor report. |
MISRA C:2012: Rule 18.1
ISO/IEC TS 17961: 2013, invptr
CERT C, ARR30-C
CWE, CWE-118
Secure Coding Standards (Embedded Coder)
Design Error Detection (Simulink Design Verifier)
Detect Out of Bound Array Access Errors (Simulink Design Verifier)
Check ID: mathworks.sldv.minmax
Detect signals which exceed specified minimum and maximum values
This analysis checks the specified minimum and maximum values (the design ranges) on intermediate signals throughout the model and on the output ports. If the analysis detects that a signal exceeds the design range, the results identify where in the model the errors occurred.
Following the recommendations of this check increases the likelihood of generating MISRA C:2012 compliant code for embedded applications, as well as code that complies with the CERT C and CWE standards.
| Result | Recommended Action |
|---|---|
| Failed, model incompatible | Resolve the model incompatibility. See
Also see Handle Incompatibilities with Automatic Stubbing (Simulink Design Verifier). |
| Violation of minimum and/or maximum found in model |
To view the conditions that cause the violation, create a harness model. When you simulate the harness, the inputs replicate the error. Click View test case in the Model Advisor report. |
MISRA C:2012: Directive 4.1
CERT C, API00-C
CWE, CWE-628
Secure Coding Standards (Embedded Coder)
Design Range Checks (Simulink Design Verifier)
Check for Specified Minimum and Maximum Value Violations (Simulink Design Verifier)