Subsystem that repeats execution during a simulation time step
Simulink / Ports & Subsystems
The While Iterator Subsystem block is a Subsystem block
preconfigured as a starting point for creating a subsystem that repeats execution during
a simulation time step while a logical condition is true
. Open model
.
Use While Iterator Subsystem blocks to model:
Block diagram equivalent of a program while
or
do-while
loop.
An iterative algorithm that converges on a more accurate solution after multiple iterations.
When using simplified initialization mode, if you place a block that needs elapsed time (such as a Discrete-Time Integrator block) in a While Iterator Subsystem block, Simulink® displays an error.
If the output signal from a While Iterator Subsystem block is a function-call signal, Simulink displays an error when you simulate the model or update the diagram.
Data Types |
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Direct Feedthrough |
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Multidimensional Signals |
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Variable-Size Signals |
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Zero-Crossing Detection |
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[a] Actual data type or capability support depends on block implementation. |