AND

  • Library:
  • AND block

Description

The AND block implements the AND ladder instruction. When the rung conditions are true, the block performs bitwise AND operation on the values at source A with the values at source B. The result of this operation is available at the destination port (dest).

Ports

Input

expand all

Controls the execution of the block. EnableIn reflects the rung state preceding the block. If the rung state preceding the block is false, EnableIn is false, the block does not execute and the outputs are not updated.

The first input signal to the bitwise AND operation. If the datatype is single (REAL – ladder equivalent), the input value is converted to int32 (DINT – ladder equivalent). int8, int16 (SINT,INT – ladder equivalent) datatypes are converted to int32 (DINT – ladder equivalent) by filling the upper bits with 0s.

Data Types: int8 | int16 | int32 | single

The second input signal to the bitwise AND operation. If the datatype is single (REAL – ladder equivalent), the input value is converted to int32 (DINT – ladder equivalent). int8, int16 (SINT,INT – ladder equivalent) datatypes are converted to int32 (DINT – ladder equivalent) by filling the upper bits with 0s.

Data Types: int8 | int16 | int32 | single

Output

expand all

By default, EnableOut follows the state of EnableIn. If the EnableIn input to the block is false, the logic implemented by the block is not executed and EnableOut signal is set to false.

Output signal resulting from the bitwise AND operation. If the datatype is single (REAL – ladder equivalent), the resultant int32 (DINT – ladder equivalent) is converted to REAL (single – ladder equivalent).

Data Types: int8 | int16 | int32 | single

See Also

|

Introduced in R2019a