Variable Capacitor

Discrete variable capacitor

  • Library:
  • Simscape / Electrical / Specialized Power Systems / Fundamental Blocks / Elements

  • Variable Capacitor block

Description

The Variable Capacitor block represents a linear time-varying capacitor. It implements a discrete variable capacitor as a current source. The capacitance is specified by the Simulink input signal. The capacitance value can be negative.

When you use a Variable Capacitor block in your model, set the powergui block Simulation type to Discrete. The robust discrete solver is used to discretize the electrical model.

Equations

The block uses the following equations for the relationship between the voltage, v, across the device and the current through the capacitor, i, when the capacitance at port C is C:

i=Cdvdt.

Ports

Input

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Input port associated with the capacitance. The capacitance can be negative and must be finite.

Conserving

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Specialized electrical conserving port associated with the capacitor positive voltage.

Specialized electrical conserving port associated with the capacitor negative voltage.

Parameters

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Robust integration method used by the block. The discrete solver method is automatically set to Trapezoidal when, in the powergui block, in the Preferences settings, you select Automatically handle discrete solver and Advanced tab solver settings of blocks.

The Trapezoidal robust solver is slightly more accurate than the Backward Euler robust solver, especially when the model is simulated at larger sample times. The Trapezoidal robust solver may produce slight damped numerical oscillations on machine voltage in no-load conditions, while the Backward Euler robust solver prevents oscillations and maintains good accuracy.

Lower limit on the absolute value of the signal at port C. This limit prevents the signal from reaching a value that has no physical meaning. The value of this parameter must be greater than 0.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

Introduced in R2019b