%--------------------------------------------------------------------------
% HDL Workflow Script
% Generated with MATLAB 9.9 (R2020b) at 12:52:22 on 01/06/2020
% This script was generated using the following parameter values:
%     Filename  : 'C:\Users\ggnanase\Desktop\R2020b\hdlworkflow_slrt.m'
%     Overwrite : true
%     Comments  : true
%     Headers   : true
%     DUT       : 'gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem'
% To view changes after modifying the workflow, run the following command:
% >> hWC.export('DUT','gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem');
%--------------------------------------------------------------------------

%% Load the Model
load_system('gmStateSpaceHDL_TwoLevelConverter_HDL');

%% Restore the Model to default HDL parameters
%hdlrestoreparams('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem');

%% Model HDL Parameters
%% Set Model 'gmStateSpaceHDL_TwoLevelConverter_HDL' HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'FloatingPointTargetConfiguration', hdlcoder.createFloatingPointTargetConfig('NativeFloatingPoint' ...
, 'LatencyStrategy', 'MIN') ...
);
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'HDLSubsystem', 'gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'MaskParameterAsGeneric', 'on');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'Oversampling', 60);
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'ReferenceDesign', 'Speedgoat IO334-325k');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'ScalarizePorts', 'dutlevel');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'SynthesisTool', 'Xilinx Vivado');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'SynthesisToolChipFamily', 'Kintex7');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'SynthesisToolDeviceName', 'xc7k325t');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'SynthesisToolPackageName', 'fbg676');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'SynthesisToolSpeedValue', '-2');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'TargetDirectory', 'hdl_prj\hdlsrc');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'TargetFrequency', 100);
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'TargetPlatform', 'Speedgoat IO334-325k');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL', 'Workflow', 'Simulink Real-Time FPGA I/O');

% Set SubSystem HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem', 'AXI4SlaveIDWidth', '12');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem', 'FlattenHierarchy', 'on');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem', 'IPCoreName', 'Simscape_ip');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem', 'ProcessorFPGASynchronization', 'Free running');

% Set Inport HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/Simulink-PS Converter1', 'IOInterface', 'PCIe Interface');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/Simulink-PS Converter1', 'IOInterfaceMapping', 'x"100"');

% Set Inport HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/Simulink-PS Converter2', 'IOInterface', 'PCIe Interface');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/Simulink-PS Converter2', 'IOInterfaceMapping', 'x"104"');

% Set Inport HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/Simulink-PS Converter3', 'IOInterface', 'PCIe Interface');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/Simulink-PS Converter3', 'IOInterfaceMapping', 'x"108"');

% Set Inport HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/Simulink-PS Converter4', 'IOInterface', 'PCIe Interface');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/Simulink-PS Converter4', 'IOInterfaceMapping', 'x"10C"');

% Set Inport HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/Simulink-PS Converter5', 'IOInterface', 'PCIe Interface');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/Simulink-PS Converter5', 'IOInterfaceMapping', 'x"110"');

% Set Inport HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/Simulink-PS Converter6', 'IOInterface', 'PCIe Interface');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/Simulink-PS Converter6', 'IOInterfaceMapping', 'x"114"');

hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/HDL Algorithm/Mode Selection/Generate Mode Vector', 'Architecture', 'MATLAB Datapath');

% Set SubSystem HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/HDL Algorithm/State Update/Multiply State', 'SharingFactor', 1);

% Set Outport HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/PS-Simulink Converter', 'IOInterface', 'PCIe Interface');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/PS-Simulink Converter', 'IOInterfaceMapping', 'x"120"');

% Set Outport HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/PS-Simulink Converter1', 'IOInterface', 'PCIe Interface');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/PS-Simulink Converter1', 'IOInterfaceMapping', 'x"140"');

% Set Outport HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/PS-Simulink Converter3', 'IOInterface', 'PCIe Interface');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/PS-Simulink Converter3', 'IOInterfaceMapping', 'x"118"');

% Set Outport HDL parameters
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/PS-Simulink Converter2', 'IOInterface', 'PCIe Interface');
hdlset_param('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem/PS-Simulink Converter2', 'IOInterfaceMapping', 'x"11C"');


%% Workflow Configuration Settings
% Construct the Workflow Configuration Object with default settings
hWC = hdlcoder.WorkflowConfig('SynthesisTool','Xilinx Vivado','TargetWorkflow','Simulink Real-Time FPGA I/O');

% Specify the top level project directory
hWC.ProjectFolder = 'hdl_prj';
hWC.ReferenceDesignToolVersion = '2019.2';
hWC.IgnoreToolVersionMismatch = false;

% Set Workflow tasks to run
hWC.RunTaskGenerateRTLCodeAndIPCore = true;
hWC.RunTaskCreateProject = true;
hWC.RunTaskBuildFPGABitstream = true;
hWC.RunTaskGenerateSimulinkRealTimeInterface = true;

% Set properties related to 'RunTaskGenerateRTLCodeAndIPCore' Task
hWC.IPCoreRepository = '';
hWC.GenerateIPCoreReport = true;

% Set properties related to 'RunTaskCreateProject' Task
hWC.Objective = hdlcoder.Objective.None;
hWC.AdditionalProjectCreationTclFiles = '';
hWC.EnableIPCaching = true;

% Set properties related to 'RunTaskBuildFPGABitstream' Task
hWC.RunExternalBuild = false;
hWC.TclFileForSynthesisBuild = hdlcoder.BuildOption.Default;
hWC.CustomBuildTclFile = '';

% Validate the Workflow Configuration Object
hWC.validate;

%% Run the workflow
hdlcoder.runWorkflow('gmStateSpaceHDL_TwoLevelConverter_HDL/Simscape_system/HDL Subsystem', hWC);
