%% Troubleshoot Conversion of Simscape DC Motor Control to HDL-Compatible Simulink Model
% This example shows how to modify a Simscape(TM) plant model to generate
% an HDL-compatible Simulink(R) model with HDL Coder(TM). HDL code is then 
% generated from this Simulink model. 

%% Introduction
% The Simscape plant model is converted to an HDL-compatible
% Simulink model by using the Simscape HDL Workflow Advisor.
% To run the Advisor, you run the |sschdladvisor| function for the model.
%
% The Simscape HDL Workflow Advisor generates an HDL implementation
% model from which you generate HDL code. Before you generate the implementation
% model, configure the Simscape plant model for generation of the 
% implementation model using the Simscape HDL Workflow Advisor. 
% For more information, see <docid:hdlcoder_ug#mw_0d53015d-fb97-4537-b065-452c4a45d722>.
%
% In some cases, the Simscape plant model may not be compatible for generation
% of the implementation model using the Simscape HDL Workflow Advisor. For HDL
% compatibility, you modify the Simscape plant model and then run the Simscape
% HDL Workflow Advisor. This example illustrates the DC Motor 
% Control plant model. The model contains a nonlinear Friction block. You can use the
% approach in this example to convert Simscape models with few nonlinear
% blocks to a HDL-compatible Simulink model.
%
% Copyright 2019 The MathWorks, Inc.

%% DC Motor Control Model
% The DC Motor Control model is a physical model developed in Simscape. The 
% model contains nonlinear elements and must be modified for 
% implementation model generation.
%
%   open_system('ee_dc_motor_control')
%
% Enclose the DC Motor and Friction block inside a Subsystem and save the
% model as |ee_dc_motor_control_original|. 
open_system('ee_dc_motor_control_original')
set_param('ee_dc_motor_control_original','SimulationCommand','Update')
%%
% DC motor control is used as a speed control structure. A PWM controlled
% four-quadrant Chopper is used to feed the DC motor. The DC motor consists
% of Rotational Electromechanical Converter, Resistor, Inductance, Friction
% block and an Inertia block. The control subsystem includes the outer
% speed-control loop, the inner current-control loop and the PWM
% generation. 
sim('ee_dc_motor_control_original')
open_system('ee_dc_motor_control_original/Scope')
%% Make DC Motor Model HDL-Compatible
% To convert the model to a model that is compatible for conversion with
% Simscape HDL Workflow Advisor:
%
% 1. Detect presence of nonlinear components or blocks in the model. To verify 
% the presence of nonlinear blocks in Simscape plant model, enter:
simscape.findNonlinearBlocks('ee_dc_motor_control_original')
%%
% The Simscape plant model has a nonlinear block, which is the Friction block.
%
% 2. For HDL compatibility, the model must not contain nonlinear elements.
% Remove the Friction block from the model.
%
% 3. To simulate the model faster and to reduce the time that the Simscape HDL Workflow
% Advisor takes to extract the state-space equations, reduce the stop time of this 
% model. In the Simulink Toolstrip, on the Simulation tab, change *Stop Time* to |1|.
%%
% Save the changes into a new model as |ee_dc_motor_control_modified|.
open_system('ee_dc_motor_control_modified')
set_param('ee_dc_motor_control_original','SimulationCommand','Update')
%%
% To see the simulation results of the modified model, run these commands:
sim('ee_dc_motor_control_modified')
open_system('ee_dc_motor_control_modified/Scope')
%% Run Simscape HDL Workflow Advisor and Verify Simulation Results
% 
% To open the Simscape HDL Workflow Advisor, run the |sschdladvisor| for your model. 
sschdladvisor('ee_dc_motor_control_modified')
%%
% To generate the implementation model, in the Simscape HDL Workflow Advisor, 
% leave all tasks to the default settings and then run the tasks. Click
% the link in the *Generate implementation model* task to open the model.
%
% <<../gmStateSpaceHDL_ee_dc_motor_control_modified.png>>
%
%% Simulate Implementation model and Generate HDL code
%
% Before you can generate HDL code from the model, you must change the sample
% time and specify certain settings that make the model compatible for HDL code
% generation. The sample time of modified plant model is Ts and the number of solver
% iterations to compute the modes is |3|. Therefore, you must change the
% sample time of the model. To specify the HDL-compatible settings:
%
% # In the Configuration Parameters dialog box:
%
% * On the *Solver* pane, set *Fixed-step size (fundamental sample time)*
% to |Ts/3| and select *Treat each discrete rate as a separate task*.
%
% * On the *Diagnostics > Sample Time* pane, set *Multitask rate
% transition* and *Single task rate transition* to |error|.
%
% # Add a Rate Transition block in your Simscape model that is placed
% inside the |Subsystem| block in your implementation model as illustrated in 
% figure below.
%
% <<../ee_dc_motor_control_modified_ratetransition.png>>
% 
%%
% To simulate the model, run this command and then open the Scope block to
% see the results:
%
%   sim('gmStateSpaceHDL_ee_dc_motor_control_modifie')
%
% <<../Implementation_model_waveform.png>> 
%
% You see that the output generated by the modified Simscape
% plant model matches the output generated by the implementation model.
%% Generate HDL Code and Validation Model
%
% Before you generate HDL code, it is recommended that you enable generation of
% the validation model. The validation model compares the output of the generated
% model after code generation and the modified Simscape plant model. To learn more, see 
% <docid:hdlcoder_ug#bqq0e5p>.
% 
% To save validation model generation settings on your Simulink model,
% run this command:
%
%   hdlset_param('gmStateSpaceHDL_ee_dc_motor_control_modifie', 'GenerateValidationModel', 'on');
%
%%
% To generate HDL code, run this command:
%
%   makehdl('gmStateSpaceHDL_ee_dc_motor_control_modified/HDL Subsystem')
%
% By default, HDL Coder generates VHDL code. To generate Verilog code,
% run this command:
%
%   makehdl('gmStateSpaceHDL_ee_dc_motor_control_modifie/HDL Subsystem', 'TargetLanguage', 'Verilog')
%
% The generated HDL code and the validation model is saved in the |hdlsrc|
% directory. The generated code is saved as |HDL_Subsystem_tc.vhd|. You can
% also verify the simulation results by running the validation model 
% |gm_gmStateSpaceHDL_ee_dc_motor_control_modifie_vnl.slx|.