%% Synthesis Benchmark of Common Native Floating Point Operators 
% This example shows how to access and generate synthesis benchmarks for
% common native floating-point operators with Xilinx(R) Vivado(R) and 
% Intel(R) Quartus(R) Prime. 
%
% Copyright 2020 The MathWorks, Inc.
     
%% Access Synthesis Results from a MAT File
% Synthesis and timing analysis is performed on common operators with
% Xilinx Vivado, Intel Quartus Prime. These operators can include basic
% math operators such as add and subtract to complex math and trigonometric
% operators such as log, sin, cos, and atan.
% The Simulink(R) models used for synthesis are configured with native 
% floating-point mode in single precision with different latency strategies. 
% The strategies include maximum, minimum, zero, and custom latency values 
% from zero to the maximum latency of the floating-point operator. 
%
% To view the MAT-file that contains synthesis results that are already generated,
% run the following command:

%%
% 
%   load('hdlcoder_synthesis_benchmark.mat')
%

%% 
% The MAT-file contains a struct named |Results|, which has two fields
% |Vivado| and |Quartus| for each synthesis tool. |Results.Vivado| and 
% |Results.Quartus| contain the following six fields: 
%
% 
% * MaxLatency - A table of synthesis results using MAX latency strategy
% * MinLatency - A table of synthesis results using MIN latency strategy
% * ZeroLatency - A table of synthesis results using ZERO latency strategy
% * CustomLatency - A table of synthesis results using latency values from
%   zero to maximum latency
% * HardwareDetails - A struct of tool and device information
% * TargetFrequency - Numeric value of target frequency in MHz
% 

%% 
% The Simulink model used for benchmarking data in the above MAT-file is 
% |hdl_nfp_single_ops_benchmark.slx|
% The subsystems that have names starting with |op_| are DUTs that are analyzed.
%
% To open the Simulink model, run the following commands:  
%

%%
%
%   addpath(fullfile(matlabroot, 'toolbox', 'hdlcoder', 'hdlcoder', 'hdlutils', 'hdlBenchMarking'))
%   open_system('hdl_nfp_single_ops_benchmark')
%

%% 
% To generate the synthesis result from the MAT-file, first make a
% copy of the Simulink model in a directory with write permission.
% Next you can run functions |runBenchmarkNFPSingle| with the following commands: 

%%
% 
%   addpath(fullfile(matlabroot, 'toolbox', 'hdlcoder', 'hdlcoder', 'hdlutils', 'hdlBenchMarking'))
%   Results = runBenchmarkNFPSingle;
%

%% Generate Synthesis Results
% To generate synthesis result for other Simulink models or different settings, 
% you can pass input arguments to the functions |runBenchmarkNFPSingle|.
% Specify settings by using property-value pairs: Property ID following by
% corresponding input values.
%
% **Note that property IDs are case sensitive and every property must have 
%   a corresponding value.
%
% The function takes the following Properties - Input Values:
% 
% * ModelName - Character vector for the Simulink model name. By default, the
%   Simulink model name is |hdl_nfp_single_ops_benchmark|. The name of the
%   subsystem needs to start with |op_|.
% 
% * TargetFrequency - Numeric value of target frequency in MHz. The default
%   value is 500 MHz.
% 
% * HardwareTool - Cell array that specifies hardware applications for
%   generating result.
%   The default setting is to run all HardwareTool - {'Vivado','Quartus'}.
% 
% * LatencyStrategy - Cell array that specifies latency strategy.
%   The default setting is to run all latency strategy - {'Min','Max','Zero','Custom'}.
% 
% * VivadoHardwareDetails/QuartusHardwareDetails - Struct that consists of five
%   fields: synthesis tool name, chip family, device name, package name,
%   and the speed value. This struct needs to be in the exact format with the 
%   same field names as the default struct shown below:  
%
%%
% 
%   vivado_hardware_details.Tool = 'Xilinx Vivado';
%   vivado_hardware_details.ChipFamily = 'Virtex7';
%   vivado_hardware_details.DeviceName = 'xc7v2000t';
%   vivado_hardware_details.PackageName = 'fhg1761';
%   vivado_hardware_details.SpeedValue = '-2';
%   vivado_hardware_details = 
% 
%       struct with fields:
% 
%                Tool: 'Xilinx Vivado'
%          ChipFamily: 'Virtex7'
%          DeviceName: 'xc7v2000t'
%         PackageName: 'fhg1761'
%          SpeedValue: '-2'
%
%
%   quartus_hardware_details.Tool = 'Altera QUARTUS II';
%   quartus_hardware_details.ChipFamily = 'Stratix V';
%   quartus_hardware_details.DeviceName = '5SGSMD4E1H29C1';
%   quartus_hardware_details.PackageName = '';
%   quartus_hardware_details.SpeedValue = '';
%   quartus_hardware_details = 
% 
%       struct with fields:
% 
%                Tool: 'Altera QUARTUS II'
%          ChipFamily: 'Stratix V'
%          DeviceName: '5SGSMD4E1H29C1'
%         PackageName: ''
%          SpeedValue: ''
%

%% 
% To call the functions with the input arguments, use the following syntax: 
%
%%
%
%   runNFPBenchmarkResults = runBenchmarkNFPSingle('ModelName','hdl_nfp_single_ops_benchmark',...
%                                                  'TargetFrequency',500,...
%                                                  'VivadoHardwareDetails', vivado_hardware_details,...
%                                                  'QuartusHardwareDetails', quartus_hardware_details,...
%                                                  'HardwareTool',{'Vivado','Quartus'},...
%                                                  'LatencyStrategy',{'Min','Max','Zero','Custom'});
%   

%% Customize Synthesis Results
% Running synthesis with the default model takes several days to finish
% benchmarking. For the following scenarios, changes can be applied to the
% Simulink model or the functions. 
%

%%
% 
% * Only a section of operators needs to be benchmarked - you can make a
% copy of the Simulink model |hdl_nfp_single_ops_benchmark.slx| and
% delete the DUTs that are not required. 
% 
% If you need to benchmark synthesis results with your own model, the
% following requirements need to be met to use the above two functions:
%%
% 
% * Each DUT or subsystem needs to have name that start with |op_|
% * For custom latency benchmarking, it runs synthesis only on DUTs that
% start with |op_| and also contain certain characters to get the list of
% operators that support custom latency. Please see |purgeDutList| function
% in |runBenchmarkNFPSingle_Vivado| and |runBenchmarkNFPSingle_Quartus| for
% more information. 


displayEndOfDemoMessage(mfilename)
