Introduction

The model shown in this example detects and demodulates 5G NR synchronization signal blocks (SSBs). It is an HDL optimized implementation of the PSS search, OFDM demodulation, and SSS search steps shown in the NR Synchronization Procedures (5G Toolbox) example. The model also includes a digital down converter (DDC) for correcting frequency offsets in the received signal. This figure shows a block diagram of the algorithm. The SS Block Detector searches for SSBs in time at a given frequency offset and subcarrier spacing. It is designed to be used as part of a larger cell search system that implements carrier frequency offset recovery and subcarrier spacing detection. A controller must be used co-ordinate the overall cell search as shown in the 5G NR Cell Search Using Analog Devices AD9361/AD9364 (Communications Toolbox Support Package for Xilinx Zynq-Based Radio) example.

The NR HDL Cell Search MATLAB Reference example describes the SS block detector and the overall cell search algorithm. The MATLAB reference is created during development of the cell search reference application to evaluate hardware-friendly algorithms and verify the SS block detection HDL implementation. This example describes the Simulink HDL implementation of the SS block detector, shows how to use the detector, and how to verify the detector by using 5G Toolbox™ functions and the MATLAB reference code.

File Structure

This example uses these files.

This example also uses helper functions from the nrhdlexamples package. The Simulink models and the nrhdlexamples package are on the MATLAB path. To open one of the models, enter its name at the MATLAB command prompt.

nrhdlCellSearch

To open a function or script from the nrhdlexamples package, use the edit command.

edit nrhdlexamples.runCellSearchModel

NR HDL Cell Search Model

This figure shows the nrhdlCellSearch model. The top level of the model reads signals from the MATLAB base workspace, passes them to the SS Block Detection subsystem, and writes the outputs back to the workspace. To run the model, call the nrhdlexamples.runCellSearchModel script in MATLAB.

SS Block Detection Interface

The SS Block Detection subsystem contains a Model block that references the nrhdlSSBlockDetection model. This section describes the inputs and outputs of that model.

Inputs

Outputs

Status Signal States

SS Block Detection Model Reference Structure

This diagram shows the top level of the nrhdlSSBlockDetection model. The input signal (dataIn) is 14-bit signed complex-valued data sampled at 61.44 Msps. The Input Scaling subsystem increases the word length to 16 bits by sign-extending the values by one bit and adding one LSB. This increase provides headroom and extra accuracy for subsequent processing stages. The DDC corrects the frequency offset and decimates the samples by eight (to 7.68 Msps) by using halfband filters. The output of the DDC is the input to the SS Block Core subsystem. The Detection Status block keeps track of progress and generates the status output.

SS Block Core Subsystem Structure

The SS Block Core subsystem performs SS block detection and demodulation. Its internal sampling rate varies depending on the subcarrier spacing (SCS). The subsystem uses 7.68 Msps for SCS30 and 3.84 Msps for SCS15. The subcarrier spacing selection logic on the left is responsible for changing the sampling rate. The rate can change only when a new operation is triggered by the start input.

The receiver has an internal timing reference system that keeps track of time by using counters at key points in the datapath. Time is measured in samples at 61.44 Msps modulo 1228800. Since the actual sampling rate is either 7.84 Msps or 3.84 Msps, the timing reference counters increment by either 8 or 16, respectively, for each sample. When a new operation is triggered by the start input, the Start Controller records the start time and passes the time to the other timing references in the model. This signal tells the other timing references when a new subcarrier spacing and corresponding sampling rate applies. The other timing references wait until the start time before changing their increment. This design is possible only because hardware latency means the other timing references lag behind the Start Controller. This architecture enables the receiver to keep track of time consistently, even when a sampling rate change occurs.

The SS Block Core subsystem contains these main subsystems.

Simulation Setup

This block diagram shows the simulation setup implemented by the nrhdlexamples.runCellSearchModel function. The function uses 5G Toolbox functions to generate a test waveform that has these parameters.

The function passes the test waveform to the MATLAB and Simulink implementations of the SS block detector in search mode and then in demodulation mode. Key diagnostic signals from each detector are compared in terms of their relative mean-squared error (MSE) and the final outputs are compared. The function calls 5G Toolbox functions to decode the BCH, recover the MIB, and measure the EVM of the resource grid returned by the Simulink implementation.

To run the simulation, call the nrhdlexamples.runCellSearchModel function. This diagram shows the actions performed by the script.

Search Mode Simulation

The simulation starts by generating a test waveform as previously described. The plot shows the combined resource grid of all eight SSBs in the transmitted waveform.

In search mode, the detector looks for PSS symbols within a 20 ms time window, which begins after a pulse on the start input triggers the search operation. If no PSS symbols are found after 20 ms, the detector sets the status output to 2. In this example, the detector finds all eight SSBs. The status output is set to 1 during the search, and a report is returned for each SSB by asserting the reportValid signal. View these signals by opening the Simulink Logic Analyzer tool after the search mode simulation is complete. The simulation runs for 5 ms. If the simulation ran for more than 20 ms, then the status output is eventually set to 3.

The script generates a plot that shows the PSS correlation outputs and the PSS detection threshold. Tables are displayed at the command line showing the parameters of each SSB. The final table shows the MSE between the MATLAB and Simulink implementations for each correlator output and for the detection threshold. These results show that the MATLAB and Simulink implementations match very closely. The small differences between the two implementations are due to quantization errors. These errors occur because the MATLAB reference uses floating-point data types, and the Simulink model uses fixed-point data types.

Demodulation Mode Simulation

In demodulation mode, the detector recovers the specified SSB by searching for its PSS, OFDM-demodulating the resource grid, and searching for the SSS within the appropriate resource elements. If the PSS is not found within 20 ms, the detector sets the status output to 5 and stops searching.

In this example, the detector recovers the specified SSB. The test bench in the nrhdlexamples.runCellSearchModel function chooses the SSB with the strongest PSS from the initial search. The frequency offset measurement from this SSB is used as a frequency offset estimate and passed back into the detector. The Simulink Logic Analyzer tool shows the detector output as it progresses through these steps.

If the detector is unable to determine the SSS, then it sets the status output to 7.

These plots show the PSS and SSS correlation signals for both detector implementations. The PSS correlation levels are stronger in demod mode than in search mode because the frequency offset is corrected. The final reports are displayed at the command line, showing that both detectors returned similar parameters and determined the cell ID is 249. The table shows the relative MSE for the PSS and SSS correlation signals and the resource grid.

Resource Grid Verification

The plot shows the demodulated resource grids returned by MATLAB and Simulink. The demodulator returns only symbols 1, 2 and 3 of the grid.

As a final verification step, the script decodes the BCH from the Simulink output by calling 5G Toolbox functions. The command line output displays the EVM measurement, shows that the CRC check passed, and confirms that the MIB content matches that of the transmitted waveform.

HDL Code Generation and Implementation Results

To generate the HDL code for this example, you must have an HDL Coder™ license. Use the makehdl and makehdltb commands to generate HDL code and an HDL test bench for the nrhdlCellSearch/SS Block Detection subsystem. The resulting HDL code was synthesized for a Xilinx® Zynq®-7000 ZC706 evaluation board. The table shows the post place and route resource utilization results. The design meets timing with a clock frequency of 230 MHz.

       Resource        Usage
    _______________    _____

    Slice Registers    83300
    Slice LUTs         47560
    RAMB18                 7
    RAMB36                 1
    DSP48                206