The generated HDL code complies with the following standards:
VHDL-1993 (IEEE® 1076-1993)
Verilog-2001 (IEEE 1364-2001)
The HDL Workflow Advisor is tested with the following third-party FPGA synthesis tools:
Intel® Quartus Prime 18.1
Intel Quartus Pro 19.2
Xilinx® Vivado® Design Suite 2019.1
Microsemi® Libero® SoC 11.8
Xilinx ISE 14.7
To use third-party synthesis tools with HDL Coder™, a supported synthesis tool must be installed, and the synthesis tool executable must be on the system path. For details, see Tool Setup.
The FPGAs supported for FPGA-in-the-loop simulation with HDL Verifier™ are listed in the HDL Verifier documentation.
You can also add custom FPGA boards using the FPGA Board Manager. See FPGA Board Customization for details.
For FPGA-in-the-Loop or Customization for USRP® Device using the HDL Workflow Advisor, a supported synthesis tool must be installed, and the synthesis tool executable must be on the system path. For details, see Tool Setup.
Speedgoat I/O Module | FPGA Device | Synthesis Tool |
---|---|---|
IO342 | Xilinx Kintex UltraScale | Warning
For more information and to learn about the synthesis tool requirements, see Xilinx HDL Support with Speedgoat IO Modules. |
IO333, IO334, IO335 | Xilinx Kintex-7 | |
IO332, IO397 | Xilinx Artix-7 | |
IO323, IO331 | Xilinx Spartan-6 |
The following hardware is supported for the Generic ASIC/FPGA workflow:
Synthesis Tool | Device Family |
---|---|
Xilinx Vivado | Kintex7 |
Artix7 | |
Kintex UltraScale+ | |
KintexU | |
Spartan7 | |
Virtex UltraScale+ | |
Virtex7 | |
VirtexU | |
Zynq | |
Zynq UltraScale+ | |
Xilinx ISE | Virtex6 |
Virtex5 | |
Virtex4 | |
Spartan-3A DSP | |
Spartan 3E | |
Spartan3 | |
Spartan6 | |
Altera® Quartus® II | Cyclone® III |
Cyclone IV | |
Arria® II GX and GZ | |
Stratix® IV | |
Stratix V | |
Cyclone III | |
Arria 10 | |
Arria V GX | |
MAX 10 | |
Intel Quartus Pro | Arria 10 |
Cyclone 10 GX | |
Stratix 10 | |
Microsemi Libero SoC | SmartFusion2 SoC |
RTG4 | |
IGLOO2 |
The following hardware is supported for the IP Core Generation workflow:
Synthesis Tool | Target Platform |
---|---|
Xilinx Vivado | ZedBoard and with FMC-HDMI-CAM and FMCOMMS2/3/4/ |
ZC706 and with FMC-HDMI-CAM and FMCOMMS2/3/4/ and FMCOMMS5 | |
ZC702 with FMC-HDMI-CAM | |
Zynq ZC706 evaluation kit | |
Zynq ZC702 evaluation kit | |
PicoZed FMC-HDMI-CAM | |
Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit | |
Altera Quartus II | Arria 10 SoC development kit |
Cyclone V SoC development kit Rev. C and Rev. D | |
Arrow DECA Max 10 FPGA development board | |
Arrow SoCKit development board | |
Arria 10 GX FPGA development kit |
The following hardware is supported for the FPGA Turnkey workflow:
Altera Arria II GX FPGA development kit
Altera Cyclone III FPGA development kit
Altera Cyclone IV GX FPGA development kit
Altera DE2–115 development and education board
XUP Atlys Spartan-6 development board
Xilinx Spartan-3A DSP 1800A development board
Xilinx Spartan-6 SP605 development board
Xilinx Virtex-4 ML401 development board
Xilinx Virtex-4 ML402 development board
Xilinx Virtex-5 ML506 development board
Xilinx Virtex-6 ML605 development board
For FPGA development boards that have more than one FPGA device, only one such device can be used with FPGA Turnkey.
You can also add custom FPGA boards using the FPGA Board Manager. HDL Coder supports the following FPGA device families for board customization; that is, when you create your own board definition file. See FPGA Board Customization (HDL Verifier).
Device Family | |
---|---|
Xilinx | Kintex7 |
Artix7 | |
Spartan-3A DSP | |
Spartan3 | |
Spartan3A and Spartan3AN | |
Spartan3E | |
Spartan6 | |
Virtex4 | |
Virtex5 | |
Virtex6 | |
Virtex7 | |
Altera | Cyclone III |
Cyclone IV | |
Arria II | |
Stratix IV | |
Stratix V |