Comparator

Behavioral model of a comparator integrated circuit

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  • Comparator block

Description

The Comparator block is an abstracted behavioral model of a comparator integrated circuit. It does not model an internal transistor-level implementation. Therefore, the block runs quickly during simulation but retains the correct I/O behavior. The block models differential inputs electrically as having infinite resistance and a finite or zero capacitance.

The block models the gate output as a voltage source driving a series resistor and a capacitor that connects to ground. The output pin connects to the resistor-capacitor connection node. If the difference in the inputs is greater than the input threshold voltage, then the output is equal to the High level output voltage (VOL). Otherwise, the output is equal to the Low level output voltage (VOH).

The output model is shown in the following illustration.

Assumptions and Limitations

Modeling of the output as a controlled voltage source is representative of a totem-pole or push-pull output stage. To model a device with an open-collector:

  1. Connect the output pin to the base of an NPN Bipolar Transistor or PNP Bipolar Transistor block.

  2. Set the Output resistance parameter to a suitable value.

Ports

Conserving

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Electrical conserving port associated with the comparator non-inverting input.

Electrical conserving port associated with the comparator inverting input.

Electrical conserving port associated with the comparator output

Parameters

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Input

The voltage which the difference in the input voltages must be greater than so that the comparator gives a logic output 1.

You can usually find this capacitance value on a manufacturer datasheet. Setting this value to zero can result in faster simulation times.

Output

The steady-state output voltage, VOL, when the voltage difference across the inputs is less than or equal to the threshold voltage, and the output current is zero.

The steady-state output voltage, VOH, when the voltage difference across the inputs is greater than the threshold voltage, and the output current is zero.

This parameter is the ratio of output voltage drop to output current. Set this parameter to (VOH−VOH1)/IOH1, where VOH1 is the reduced output high voltage when the output current is IOH1.

Set this value based on the high-to-low and low-to-high propagation delays.

Model Examples

Phase-Locked Loop

Phase-Locked Loop

How to model a phase-locked loop. The charge pump and filter are modeled using discrete analog components whereas the oscillator is represented as behavioral component using the Simscape™ Electrical™ Voltage-Controlled Oscillator block. The D-type flip-flops in the phase detector are represented in a simplified form using Simulink® blocks to define the behavior, and electrical components are used just at the interface. Non-zero initial conditions are applied to C1 and C2 in order to start the VCO out of phase and test the tracking ability.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

See Also

Introduced in R2009b

Simscape Electrical Documentation

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