hdl.RAM, dsp.Delay, persistent
array variables, and user-definedSystem object™ private properties
can map to RAM, but have different attributes. The following table
summarizes the differences.
| Attribute | hdl.RAM | dsp.Delay | Persistent Arrays and User-Defined System object Properties |
|---|---|---|---|
| RAM mapping criteria | Unconditionally maps to RAM | Maps to RAM in HDL code under specific conditions. See RAM Mapping Requirements for dsp.Delay System Objects. | Maps to RAM in HDL code under specific conditions. See RAM Mapping Requirements for Persistent Arrays and System object Properties. |
| Address generation and port mapping | User specified | Automatic | Automatic |
| Access scheduling | User specified | Automatically inferred | Automatically inferred |
| Overclocking | None | None | Local multirate if access schedule requires it. |
| Latency with respect to simulation in MATLAB®. | 0 | 0 | 2 cycles if local multirate; 1 cycle otherwise. |
| RAM type | User specified | Dual port | Dual port |