Guidelines for HDL Code Generation Using Stateflow Charts

These guidelines illustrate the recommended settings when using Stateflow® charts in your model. The Stateflow Chart block is available in the Stateflow block library. By using Stateflow charts, you can model delays in your Simulink® model.

Each guideline has a severity level that indicates the level of compliance requirements. To learn more, see HDL Modeling Guidelines Severity Levels.

Choose State Machine Type based on HDL Implementation Requirements

Guideline ID

2.9.1

Severity

Strongly Recommended

Description

HDL Coder™ supports code generation for Mealy and Moore Stateflow charts. Do not use MATLAB Function blocks to model either Mealy or Moore state machines.

To specify whether you want a Mealy or Moore state machine, in the Chart (Stateflow) properties, specify the State Machine Type. Do not use Classic because it affects readability of the generated HDL code. Choose the State Machine Type depending on how you want the Stateflow semantics to map to a hardware implementation. See Hardware Realization of Stateflow Semantics.

When you use Mealy charts, the outputs depend on the current state and inputs. By using Mealy charts, you can more easily define state transitions which makes these charts more flexible to use. The generated HDL code from Mealy charts may be less readable.

For Moore charts, the outputs depend only on the current state. The generated HDL code from Moore charts is more readable. Moore charts restrict flexibility in defining state transitions.

Specify Block Configuration Settings of Stateflow Chart

Guideline ID

2.9.2

Severity

Strongly Recommended

Description

When you use Stateflow Chart (Stateflow) blocks in your model for HDL code generation, use these recommended settings:

  • For Action Language, use MATLAB

  • For Update method, use Discrete or Inherited. Do not use Continuous.

Moore Chart

  • Enable Initialize Outputs Every Time Chart Wakes Up

  • Disable Support Variable-Size Arrays

  • Disable Support Variable-Size Arrays

Mealy Chart

  • Enable Execute (Enter) Chart at Initialization

  • Enable Initialize Outputs Every Time Chart Wakes Up

  • Disable Enable Super Step Semantics

  • Disable Support Variable-Size Arrays

To make sure that these settings are specified for the Stateflow Chart, you can run the check Check for Stateflow chart settings.

Insert Unconditional Transition State for Else Statement in HDL Code

Guideline ID

2.9.3

Severity

Recommended

Description

When you use Stateflow® charts for HDL code generation, insert unconditional states in the chart. The HDL code generated for such a chart contains an else branch with the if statement. The presence of an else branch prevents the third-party tool from inferring a latch when you deploy the HDL code. For example, open the model hdlcoder_chart_ifnelsecond.

open_system('hdlcoder_chart_ifnelsecond')
set_param('hdlcoder_chart_ifnelsecond', 'SimulationCommand', 'Update')
open_system('hdlcoder_chart_ifnelsecond/dut_chart')

The model contains two Stateflow Moore Charts. The chart onlyif_chart implements a simple condition that outputs out1 based on in1.

open_system('hdlcoder_chart_ifnelsecond/dut_chart/onlyif_chart')

The Chart block ifnelse_chart is the same as onlyif_chart and has an unconditional transition state.

open_system('hdlcoder_chart_ifnelsecond/dut_chart/ifnelse_chart')

To generate HDL code for the DUT, run this command:

makehdl('hdlcoder_chart_ifnelsecond/dut_chart')

The HDL code generated for the onlyif_chart does not contain an else condition. Do not deploy this code to a target device because synthesis tools might infer a latch.

The HDL code generated for the ifnelse_chart contains an else statement for the unconditional transition state. This code is recommended for deployment to the target FPGA device.

See Also

Functions

Related Topics