addAXI4StreamInterface

Class: hdlcoder.ReferenceDesign
Package: hdlcoder

Add AXI4-Stream interface

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Syntax

addAXI4StreamInterface('MasterChannelConnection',Master_Channel_Port,'SlaveChannelConnection',Slave_Channel_Port)
addAXI4StreamInterface('MasterChannelConnection',Master_Channel_Port,'SlaveChannelConnection',Slave_Channel_Port), Name,Value

Description

addAXI4StreamInterface('MasterChannelConnection',Master_Channel_Port,'SlaveChannelConnection',Slave_Channel_Port) adds an AXI4-Stream interface to an hdlcoder.ReferenceDesign object.

addAXI4StreamInterface('MasterChannelConnection',Master_Channel_Port,'SlaveChannelConnection',Slave_Channel_Port), Name,Value adds and defines an AXI4-Stream interface, with additional options specified by one or more Name,Value pair arguments.

Input Arguments

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Reference design port connected to the IP core AXI4-Stream master interface, specified as a character vector. This port should be an AXI4-Stream slave interface. If master_channel_enable is true, you must specify master_channel_port.

Example: 'axi_dma_0/S_AXIS_S2MM'

Reference design port connected to the IP core AXI4-Stream slave interface, specified as a character vector. This port should be an AXI4-Stream master interface. If slave_channel_number is true, you must specify slave_channel_port and slave_channel_data_width.

Example: 'axi_dma_0/M_AXIS_MM2S'

Tip

To add more than one AXI4-Stream interface to your reference design, call the addAXI4StreamInterface method multiple times depending on the number of interfaces you want to add. For each additional interface, specify a unique InterfaceID.

Name-Value Pair Arguments

Specify optional comma-separated pairs of Name,Value arguments. Name is the argument name and Value is the corresponding value. Name must appear inside quotes. You can specify several name and value pair arguments in any order as Name1,Value1,...,NameN,ValueN.

Name of the AXI4-Stream interface that you add to the reference design, specified as a character vector. To create multiple AXI4-Stream interfaces, make sure that you use unique names for each interface.

Example: 'AXI4-Stream1','AXI4-Stream2'

Master channel enable signal, specified as either true or false. By default, MasterChannelEnable is true, and you must specify master_channel_port. To use a reference design that has only a Slave channel, set MasterChannelEnable to false and do not specify the master_channel_port.

Example: 'false'

Slave channel enable signal, specified as either true or false. By default, SlaveChannelEnable is true, and you must specify slave_channel_port. To use a reference design that has only a Master channel, set SlaveChannelEnable to false and do not specify the slave_channel_port.

Example: 'false'

Reference design master channel TDATA bit width, specified as a positive integer. By default, the master_channel_data_width is 32 bits.

Example: 32

Reference design slave channel TDATA bit width, specified as a positive integer. By default, slave_channel_data_width is 32 bits.

Example: 32

See Also

Topics

Introduced in R2020a

HDL Coder Documentation

Support