%% Deploy Transfer Learning Network for Lane Detection
% This example shows how to create, compile, and deploy a dlhdl.Workflow object that has a convolutional neural network. The network can detect and output lane marker boundaries as the network object using the Deep Learning HDL Toolbox™ Support Package for Xilinx FPGA and SoC. Use MATLAB® to retrieve the prediction results from the target device.
%% Prerequisites
% Xilinx ZCU102 SoC development kit
% Deep Learning HDL Toolbox™ Support Package for Xilinx FPGA and SoC
% Deep Learning Toolbox™
% Deep Learning HDL Toolbox™
%%
%
%% Load the Pretrained SeriesNetwork
% To load the pretrained series network lanenet, enter:

snet = getLaneDetectionNetwork();

%
%% Normalize the Input Layer
% To normalize the input layer by modifying its type, enter:

inputlayer = imageInputLayer(snet.Layers(1).InputSize, 'Normalization','none');
snet = SeriesNetwork([inputlayer; snet.Layers(2:end)]);

%
% To view the layers of the pretrained series network, enter:

analyzeNetwork(snet)
% The saved network contains 23 layers including input, convolution, ReLU, cross channel normalization,
% max pool, fully connected, and the regression output layers.

%
%
%
%% Create Target Object
% Create a target object that has a custom name for your target device and an interface to connect your target device to the host computer. Interface options are JTAG AND Ethernet.

hTarget = dlhdl.Target('Xilinx','Interface','Ethernet');

%
%% Create WorkFlow Object
% Create an object of the dlhdl.Workflow class. When you create the class, specify the network and the bitstream name. Specify the saved pretrained lanenet neural network, snet, as the network. Make sure that the bitstream name matches the data type and the FPGA board that you are targeting. In this example the target FPGA board is the Xilinx ZCU102 SOC board. The bitstream uses a single data type.

hW = dlhdl.Workflow('network', snet, 'Bitstream', 'zcu102_single','Target',hTarget);
% If running on Xilinx ZC706 board, instead of the above command, 
% uncomment the command below.
%
% hW = dlhdl.Workflow('Network', snet, 'Bitstream', 'zc706_single','Target',hTarget);

%
%% Compile the Lanenet series Network
% To compile the lanenet series network, run the compile function of the dlhdl.Workflow object.

dn = hW.compile;

%
%% Program Bitstream onto FPGA and Download Network Weights
% To deploy the network on the Xilinx ZCU102 SoC hardware, run the deploy function of the dlhdl.Workflow object. This function uses the output of the compile function to program the FPGA board by using the programming file. It also downloads the network weights and biases. The deploy function starts programming the FPGA device, displays progress messages, and the time it takes to deploy the network.

 hW.deploy;

%
%% Run Prediction for Example Video
% Run the demoOnVideo function for the dlhdl.Workflow class object. This function loads the example video, executes the predict function of the dlhdl.Workflow object, and then plots the result.

demoOnVideo(hW,1);

% Copyright 2020 The MathWorks, Inc.