%% Using |verify| Statement with Test Sequence Block to Test Projector Controller
% This example demonstrates how to test a projector control system using model simulation, and how to generate a DPI component 
% for some of the controller's high level requirements that are specified in a Test Sequence block. This will allow the requirement
% verification used for model simulation to be reused in the HDL simulator with minimal effort.
%
% The model was taken from the example 
% <matlab:helpview(fullfile(docroot,'sltest','examples','real-time-tests-for-a-projector-controller-using-verify.html'))
% Projector Controller Testing Using verify and Real-Time Tests> shipped
% with Simulink Test(TM). And simplified to show only Requirement Scenario 4.
%
% To learn more about verify statements, see
% <matlab:helpview(fullfile(docroot,'sltest/helptargets.map'),'sltest_verify_statement_topicID')
% Assess Simulation Using Logical Statements>

%% Requirements and Prerequisites
% Products required for this example:
%
% * MATLAB(R)
% * Simulink(R)
% * Stateflow(R)
% * Simulink Test(TM)
% * Simulink Coder(TM)
% * Mentor Graphics(R) ModelSim(R)/QuestaSim(R)
% * One of the supported C compilers: Microsoft(R) Visual C++, or GNU GCC

%% Overview
% The test verifies
% the controller against its requirements using test sequences that
% exercise the top-level controller model. The controller uses a push button
% input and a temperature sensor input, and outputs signals controlling the
% fan, fan speed, and projector lamp.
% 
% The objective is to generate a DPI component that captures high level
% requirement number 4 of the controller. For more information about the
% requirements refer to the word document |sltestProjectorCtrlReqs.docx| in
% the example referred above.
%
% Requirement 4 tries to turn on and off the projector when the projector
% temperature (Tproj) is high. The scenario has the following steps in the
% Test Sequence block:
%
% # Set projector temperature to 50 degree Celsius.
% # Try to turn on.
% # The system should not turn on.
% # Set the temperature to 50 degree Celsius.
% # Try to turn off.
% # The system should turn off.
%
% The picture below shows the test bench for the above requirement and how
% |verify| is used to check that the projector turns on or off depending on
% the scenario.
%
% <<../svdpi_tsverify_tsreq4.png>>
%

%% Set Up Model for Code Generation
%
% The model and test bench are preconfigured with one of the DPI system target files
% (systemverilog_dpi_grt.tlc). Open the test harness |Req_scenario_4| by executing:
%
%% 
%   testFile = 'svdpi_sltestProjectorCtrlTests.mldatx';
%   testHarness = 'Req_scenario_4';
%   model = 'svdpi_sltestProjectorController';
%   open_system(model)
%
%%
%   sltest.harness.open(model,testHarness)
%

%% Generate SystemVerilog DPI Component
%
% # In the *Req_scenario_4* test bench, right click the *Req_4* subsystem block  
% which contains the test sequence block and select.
% *C/C++ Code -> Build This Subsystem*.
% # Click *Build* in the dialog box that appears.
% # The build generates C code for the *Req_4* subsystem, and a SystemVerilog
% DPI wrapper and package file named
% "Req_4_build/Req_4_dpi.sv" and 
% "Req_4_build/Req_4_dpi_pkg.sv".
%
% Note that some verification warnings will be triggered, this will be
% explained later.
%
% Alternatively you can generate the component by executing:
%
%%
%   rtwbuild('Req_scenario_4/Req_4');
%

%% Run Generated Testbench in HDL Simulator
%
% For this example ModelsSim/QuestaSim simulator will be used. To get more
% detailed instructions on how to run the testbench refer to
% <matlab:helpview(fullfile(docroot,'hdlverifier/examples/getting-started-with-systemverilog-dpi-component-generation.html'))
% Getting started with SystemVerilog DPI component generation>
%
% After running the testbench notice the error that is
% being thrown by the DPI component.
%
% <<../svdpi_tsverify_error_in_mq.png>>
%
% This error is consistent with the simulation results in Simulink (below). 
% Opening the Test Manager reveals that the controller fails to shut off
% when the on_off button is pressed when the temperature is above a limit.
% To open test manager you can execute:
%
%%
%   sltest.testmanager.load(testFile);
%   sltest.testmanager.view;
%
% Resolving the failure would require to modify the OnOff check subsystem
% in the main model.On the other hand the requirement |verify_sc4_on| is satisfied, since
% no errors were generated for this verify statement.
%
% <<../svdpi_tsverify_testmngr_and_warn.png>>
%

%% Tracing a SystemVerilog Error Back to Simulink
%
% If you want to trace the verify statement that generated the error back
% to Simulink you need to find the Simulink Identifier (SID) from the 
% error message as shown below:
%
% <<../svdpi_tsverify_sid.png>>
%
% Once you find the SID for the step id in the test sequence block you can use 
% <matlab:helpview(fullfile(docroot,'simulink','ug','approach-modeling-programmatically.html'))
% Simulink programmatic API's> 
% to highlight the corresponding block. Execute:
%
%%
%   Simulink.ID.hilite('Req_scenario_4:32:60');
%
% This will highlight the relevant block as shown below.
%
% <<../svdpi_tsverify_hilite.png>>
%

%% Filter a Specific Verify Assessment
%
% To filter a verify assessment in the HDL simulator, supply the
% SID of the assessment you want to filter as a plusargs argument to the
% HDL simulator. 
%
% For instance you can filter the error that |verify_sc4_off| gives by
% supplying the argument "+Req_scenario_4:32:60" to the HDL simulator. 
%
% For this example in ModelSim/QuestaSim the simulation command would be:
%
%  vsim -classdebug -c -voptargs=+acc -sv_lib ../Req_4 work.Req_4_dpi_tb +Req_scenario_4:32:60
%
% If you are on the Windows platform, the suffix _win64 is needed:
%
%  vsim -classdebug -c -voptargs=+acc -sv_lib ../Req_4_win64 work.Req_4_dpi_tb +Req_scenario_4:32:60
%
%% Unfilter All Verify Assessments in the HDL Simulator
%
% To check whether a verify assessment was tested, 
% enable verbose mode by specifying "VERBOSE_VERIFY" as a
% plusargs argument to the HDL simulator.
%
% For this example in ModelSim/QuestaSim the simulation command would be:
%
%  vsim -classdebug -c -voptargs=+acc -sv_lib ../Req_4 work.Req_4_dpi_tb +VERBOSE_VERIFY
%
% The simulation log and waveforms show the verbose output and how it maps to Simulink Test(TM) Test
% Manager plot.
%
% <<../svdpi_tsverify_verbose.png>>

%% Conclusion
%
% DPI component generation and the Test Sequence block from Simulink Test(TM)
% can be used to migrate verification logic from Simulink to a HDL simulator 
% with minimal effort.
%
% Copyright 2019 The MathWorks, Inc.