Intel® MPI Library is a multi-fabric message passing library that implements the Message Passing Interface, version 3.1 (MPI-3.1) specification. Use the library to develop applications that can run on multiple cluster interconnects.
Intel® MPI Library has the following features:
Intel® MPI Library is available as a standalone product and as part of the Intel® Parallel Studio XE Cluster Edition.
The product comprises the following main components:
Runtime Environment (RTO) includes the tools you need to run programs, including the scalable process management system (Hydra*), supporting utilities, shared (.so) libraries, and documentation.
Software Development Kit (SDK) includes all of the Runtime Environment components plus compilation tools, including compiler drivers such as mpiicc, include files and modules, static (.a) libraries, debug libraries, and test codes.
Besides the SDK and RTO components, Intel® MPI Library also includes Intel® MPI Benchmarks, which enable you to measure MPI operations on various cluster architectures and MPI implementations. For details, see the Intel® MPI Benchmarks User Guide.
Before you start using Intel® MPI Library make sure to complete the following steps:
clusternode1 clusternode2
After completing these steps, you are ready to use Intel® MPI Library.
For detailed system requirements, see the System Requirements section in Release Notes.
If you have the SDK component installed, you can build your MPI programs with Intel® MPI Library. Do the following:
$ which icc /opt/intel/compilers_and_libraries_<version>.<update>.<package>/linux/bin/intel64/icc
$ mpiicc -o myprog <installdir>/test/test.c
Use the previously created hostfile and run your program with the mpirun command as follows:
$ mpirun -n <# of processes> -ppn <# of processes per node> -f ./hostfile ./myprog
For example:
$ mpirun -n 2 -ppn 1 -f ./hostfile ./myprog
The test program above produces output in the following format:
Hello world: rank 0 of 2 running on clusternode1 Hello world: rank 1 of 2 running on clusternode2
This output indicates that you properly configured your environment and Intel® MPI Library successfully ran the test MPI program on the cluster.
Intel® MPI Library has the following major features:
If you encounter problems when using Intel® MPI Library, go through the following general procedures to troubleshoot them:
Check system requirements and known issues in the Release Notes.
Check hosts accessibility. Run a simple non-MPI application (for example, hostname utility) on the problem hosts with mpirun. This check helps you reveal the environmental problem (for example, SSH is not configured properly), or connectivity problem (for example, unreachable hosts).
Run the MPI application with debug information enabled. To enable the debug information, set the environment variable I_MPI_DEBUG=6. You can also set a different debug level to get more detailed information. This action helps you find out the problem component.
See more details in the Troubleshooting section of the Developer Guide.
Resource | Description |
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Online Training | The online training site is an excellent resource for learning the Intel® MPI Library capabilities through various guides, videos, webinars, and more. |
This page contains the most up-to-date information about the product, including: what's new, key features, system requirements and known limitations. |
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Online Documentation |
This page provides links to all available Intel® MPI Library documents. |
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Optimization Notice |
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Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804 |