Intel® Threading Building Blocks (Intel® TBB) is a runtime-based parallel programming model for C++ code that uses threads. It consists of a template-based runtime library to help you harness the latent performance of multicore processors. Use Intel TBB to write scalable applications that:
Specify logical parallel structure instead of threads
Emphasize data parallel programming
Take advantage of concurrent collections and parallel algorithms
Intel TBB is available as a standalone product as well as part of the following products:
After installing Intel TBB, you need to set the environment variables. This may be done as part of an
edition-level command-line, or you can set just the Intel TBB environment variables, by running tbbvars.sh, or tbbvars.csh in
<install_dir>/{linux|mac}/tbb/bin.
<install_dir> is the installation directory, by default, it is:
/opt/intel/compilers_and_libraries_<version>$HOME/intel/compilers_and_libraries_<version>The following table lists the documentation and other resources to help you get started using Intel® TBB.
| Document | Description |
|---|---|
| Online Training | The online training site is an excellent resource for training materials on Parallel Studio XE tools. |
|
Brief tutorial that uses a simple example to demonstrate how to use Intel® Threading Building Blocks (Intel® TBB) from start to finish. |
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| Documentation | Developer Guide and Reference for Intel® Threading Building Blocks The Developer Guide section provides instructions on how to use the major features of the library in addition to a Design Patterns section that explains how to implement common parallel programming idioms using Intel® TBB. The Developer Reference section provides detailed information on all the functions and interfaces provided by Intel® TBB. Includes information on the following topics:
|
Detailed, cross-linked documentation on the class hierarchy with several views. Includes the following major views:
|
|
Detailed notes and errata for this release. |
| Optimization Notice |
|---|
| Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804 |
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