Index of /nchou/p/cad/synopsys/doc/syn/examples/rtl_analyzer/verilog/report

	Name	Last modified	Size	Description
	Parent Directory		-
	top.rep_area	1998-01-06 19:05	692
	top.rep_timing	1998-01-06 19:05	5.4K
	top_.rpt	1998-01-06 19:00	66