In Processor-In-the-Loop (PIL) simulation, the control algorithm executes in the target hardware but the plant model runs on the host machine. The plant model (running on the host machine) simulates the input and output signals for the controller (running on the target hardware) and communicates with the controller by using serial communication interface. Therefore, you can use PIL simulation to determine the execution time on the target hardware, which you can compare with the execution time for simulating the model on the host machine.
The execution time or the performance metrics of an algorithm that you get from PIL simulation, helps you to detect algorithm overrun in the target hardware. The PIL profiling report indicates the average and maximum execution time of an algorithm on the target hardware. As an example, we explain PIL profiling on the LAUNCHXL-F28379D hardware board.
We use the example "mcb_pmsm_foc_sim.slx" to demonstrate code verification in PIL. This example shows PIL profiling for the "Current Control" subsystem available in the model. This subsystem includes Field-Oriented Control (FOC), current scaling (per-unit conversion), speed measurement, and rotor position scaling (computation of angle from the encoder position counts) algorithms. The PIL profiling report shows the average execution and maximum execution times of the control algorithm in the target hardware.
This section addresses these tasks:
Verify code execution by using PIL testing by comparing the algorithm in the simulation and target hardware operating modes.
Perform PIL profiling by measuring the algorithm execution time in the target hardware and generate the PIL profiling report.
Embedded Coder®
Embedded Coder Support Package for Texas Instruments C2000 Processors
LAUNCHXL-F28379D controller hardware board
BOOSTXL-DRV8305 and BOOSTXL-3PHGANINV (supported inverters)
Teknic motor M-2310P, BLY171D, and BLY172S (supported motors with Hall sensors) or Teknic motor M-2310P and BLY171D (motors that support quadrature encoder)
DC power supply (24V)
Use these steps to prepare the PIL model for profiling:
Open the model "mcb_pmsm_foc_sim.slx" by using this command:
open_system('mcb_pmsm_foc_sim.slx');
This model simulates the PMSM motor and FOC algorithm for closed-loop speed control.
Click Hardware Settings in the Hardware tab of the Simulink tool strip.
Select TI Delfino F2837xD
in the
Hardware board field available in the
Hardware Implementation tab of the
Configuration Paramters window.
Use these steps to verify the code in PIL:
Open the script file "mcb_PIL_config_TI.m" to set the configuration parameters:
edit('mcb_PIL_config_TI.m');
Update the communication port number that you are using.
Run the script to update the configuration parameters of the simulation model and the PIL preferences.
Right-click the "Current Control" subsystem of the "mcb_pmsm_foc_sim.slx" example model and select Deploy this Subsystem to Hardware in the C/C++ Code menu.
The system displays the Build code for Subsystem
dialog box. Select Inlined
storage class for all
parameters.
Click Build to create a model named "untitiled" that includes a PIL subsystem called "Current Control."
Rename the "Current Control" subsystem to "Current Control (PIL)."
Copy the "Current Control (PIL" subsystem and replace the "Current Control" subsystem in the "mcb_pmsm_foc_sim.slx" example model.
In the PIL mode, the system deploys the "Current Control (PIL)" subsystem to the target and executes the subsystem in the target hardware.
To compare the algorithm execution in the host machine simulation and the PIL simulation, connect the "Current Control" subsystem in parallel to the "Current Control (PIL)" subsystem. In addition, enable signal logging in the subsystem outputs.
In the Simulink toolstrip, select the SIL/PIL Manager app in the Apps tab.
In the SIL/PIL toolstrip, select SIL/PIL
Sim Only
.
Select Model blocks in SIL/PIL mode
in the
System Under Test field.
Click Run SIL/PIL on the SIL/PIL toolstrip to build the "Current Control (PIL)" subsystem and deploy it to the target.
After the system deploys the subsystem, the "Current Control (PIL)" subsystem executes on the target hardware processor, whereas the plant model runs on the host machine.
When PIL simulation ends, the system generates a profiling report.
The PIL simulation takes more time than the host machine based simulation. This happens because of the serial communications (related to inputs and outputs of the "Current Control (PIL)") between the host machine and subsystem that runs on the target hardware.
The profiling report shows the maximum and average execution times of the "Current Control (PIL)" subsystem running on the target hardware.
You can use Data Inspector on the Simulink tab to compare the signals logged during the host machine based simulation and the PIL simulation (executed on the target). Therefore, you can verify the accuracy of the host machine based simulation and PIL simulation.
This plot compares the "speed feedback" signals from the "Current Control (PIL)" and "Current Control" subsystems.
If the execution time exceeds 60% of the budgeted time, we recommend you optimize the algorithm by one of the following techniques:
Execute from RAM.
Offload some functionalities to CLA or other CPU.
Scale the algorithm for every alternate cycle.
Move the less critical functionalities like speed calculation, to a slower rate.
For more details on SIL/PIL code verification, see: