Specify the architecture name for your DUT in the generated HDL code.
Default:
'rtl'
Specify the VHDL architecture name for your DUT in the generated HDL code as a character vector.
Property:
VHDLArchitectureName |
| Type: character vector |
Default:
'rtl' |
To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.
Specify the target library name for the generated VHDL® code.
Default:
'work'
Target library name for generated VHDL code.
Property:
VHDLLibraryName |
| Type: character vector |
Default:
'work' |
To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.